diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2003-09-28 16:01:13 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2003-09-28 16:01:13 +0000 |
| commit | accf8693c700cfe5bc8ccbeb048253afe0339e60 (patch) | |
| tree | fa518104df55f252db680dd62d9dba2a6d691bed /sys/arch/mvme88k | |
| parent | 3ac8d3d448ecb61162e8b6ea13609beee2e4ceba (diff) | |
Remove duplicate CMMU address definitions.
Diffstat (limited to 'sys/arch/mvme88k')
| -rw-r--r-- | sys/arch/mvme88k/include/board.h | 5 | ||||
| -rw-r--r-- | sys/arch/mvme88k/include/mvme188.h | 11 |
2 files changed, 2 insertions, 14 deletions
diff --git a/sys/arch/mvme88k/include/board.h b/sys/arch/mvme88k/include/board.h index 6b7d828a644..4b69c4e73ce 100644 --- a/sys/arch/mvme88k/include/board.h +++ b/sys/arch/mvme88k/include/board.h @@ -1,4 +1,4 @@ -/* $OpenBSD: board.h,v 1.16 2003/09/16 20:52:19 miod Exp $ */ +/* $OpenBSD: board.h,v 1.17 2003/09/28 16:01:11 miod Exp $ */ /* * Copyright (c) 1996 Nivas Madhur * All rights reserved. @@ -66,8 +66,6 @@ handles the CMMU's. */ #define CMMU_SIZE 0x1000 -#ifndef CMMU_DEFS -#define CMMU_DEFS #define SBC_CMMU_I 0xFFF77000 /* Single Board Computer code CMMU */ #define SBC_CMMU_D 0xFFF7F000 /* Single Board Computer data CMMU */ @@ -79,7 +77,6 @@ #define VME_CMMU_D1 0xFFF5F000 /* MVME188 data CMMU 1 */ #define VME_CMMU_D2 0xFFF3F000 /* MVME188 data CMMU 2 */ #define VME_CMMU_D3 0xFFF7F000 /* MVME188 data CMMU 3 */ -#endif /* CMMU_DEFS */ /* These are the hardware exceptions. */ #define INT_BIT 0x1 /* interrupt exception */ diff --git a/sys/arch/mvme88k/include/mvme188.h b/sys/arch/mvme88k/include/mvme188.h index 64d75c8670a..16186a0daef 100644 --- a/sys/arch/mvme88k/include/mvme188.h +++ b/sys/arch/mvme88k/include/mvme188.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mvme188.h,v 1.13 2003/09/16 20:52:19 miod Exp $ */ +/* $OpenBSD: mvme188.h,v 1.14 2003/09/28 16:01:12 miod Exp $ */ /* * Copyright (c) 1999 Steve Murphree, Jr. * All rights reserved. @@ -46,15 +46,6 @@ #ifndef __MACHINE_MVME188_H__ #define __MACHINE_MVME188_H__ -#define VME_CMMU_I0 0xFFF7E000 /* MVME188 code CMMU 0 */ -#define VME_CMMU_I1 0xFFF7D000 /* MVME188 code CMMU 1 */ -#define VME_CMMU_I2 0xFFF7B000 /* MVME188 code CMMU 2 */ -#define VME_CMMU_I3 0xFFF77000 /* MVME188 code CMMU 3 */ -#define VME_CMMU_D0 0xFFF6F000 /* MVME188 data CMMU 0 */ -#define VME_CMMU_D1 0xFFF5F000 /* MVME188 data CMMU 1 */ -#define VME_CMMU_D2 0xFFF3F000 /* MVME188 data CMMU 2 */ -#define VME_CMMU_D3 0xFFF7F000 /* MVME188 data CMMU 3 */ - #define MVME188_EPROM 0xFFC00000 #define MVME188_EPROM_SIZE 0x00080000 #define MVME188_SRAM 0xFFE00000 |