diff options
author | Miod Vallat <miod@cvs.openbsd.org> | 2003-08-12 19:33:28 +0000 |
---|---|---|
committer | Miod Vallat <miod@cvs.openbsd.org> | 2003-08-12 19:33:28 +0000 |
commit | 32c9a73d8d598b75d850b671c7ef6165e8582ca4 (patch) | |
tree | e3af5860872667f97a91dc63c41f390e0f30432b /sys/arch/mvme88k | |
parent | 6fef1e5de549a239328ef66b613224fc81445d7e (diff) |
Get rid of unused code, and KNF/ELF-sanitize the remaining code.
Diffstat (limited to 'sys/arch/mvme88k')
-rw-r--r-- | sys/arch/mvme88k/mvme88k/m88110_fp.S | 227 |
1 files changed, 37 insertions, 190 deletions
diff --git a/sys/arch/mvme88k/mvme88k/m88110_fp.S b/sys/arch/mvme88k/mvme88k/m88110_fp.S index 8c69952419d..91ed4c2f44d 100644 --- a/sys/arch/mvme88k/mvme88k/m88110_fp.S +++ b/sys/arch/mvme88k/mvme88k/m88110_fp.S @@ -1,4 +1,4 @@ -/* $OpenBSD: m88110_fp.S,v 1.10 2003/08/11 20:45:17 miod Exp $ */ +/* $OpenBSD: m88110_fp.S,v 1.11 2003/08/12 19:33:27 miod Exp $ */ /* * Copyright (c) 1999 Steve Murphree, Jr. * All rights reserved. @@ -39,7 +39,7 @@ /* * This is cheesy. I'm using the TCFP features of the mc88110 - * because it was easy. It is not 100% IEEE. But it may be + * because it was easy. It is not 100% IEEE. But it may be * close enough. We shall see... XXXsmurph * Err... TCFP == "Time Critical Floating Point" * @@ -57,203 +57,50 @@ ASENTRY(m88110_Xfp_precise) subu r31, r31, 40 st r1, r31, 32 st r29, r31, 36 - - ld r2, r29, EF_FPSR * 4 - ld r3, r29, EF_FPCR * 4 + + ld r2, r29, EF_FPSR * 4 + ld r3, r29, EF_FPCR * 4 ld r4, r29, EF_FPECR * 4 - - /* Load into r1 the return address for the 0 handlers. Looking */ - /* at FPECR, branch to the appropriate 0 handler. However, */ - /* if none of the 0 bits are enabled, then a floating point */ - /* instruction was issued with the floating point unit disabled. This */ - /* will cause an unimplemented opcode 0. */ - -1: bb0 6,r4, 2f /* branch to m88110_FPunimp if bit set */ - br m88110_FPuimp -2: bb0 5,r4, 3f /* branch to m88110_FPpriviol if bit set */ - br m88110_FPpriviol -3: + + /* + * Load into r1 the return address for the 0 handlers. Looking + * at FPECR, branch to the appropriate 0 handler. However, + * if none of the 0 bits are enabled, then a floating point + * instruction was issued with the floating point unit disabled. This + * will cause an unimplemented opcode 0. + */ + + bb0 6,r4, 2f /* branch to m88110_FPunimp if bit set */ + br _ASM_LABEL(m88110_FPuimp) +2: bb0 5,r4, 3f /* branch to m88110_FPpriviol if bit set */ + br _ASM_LABEL(m88110_FPpriviol) +3: or.u r4, r4, 0xffff -ASGLOBAL(m88110_FPuimp) - subu r31,r31,40 /* allocate stack */ - st r1,r31,36 /* save return address */ - st r3,r31,32 /* save exception frame */ - or r2,r0,T_FPEPFLT /* load trap type */ +ASLOCAL(m88110_FPuimp) + subu r31,r31,40 /* allocate stack */ + st r1,r31,36 /* save return address */ + st r3,r31,32 /* save exception frame */ + or r2,r0,T_FPEPFLT /* load trap type */ or r3, r29, r0 - bsr _C_LABEL(m88110_trap) /* trap */ - ld r1,r31,36 /* recover return address */ - addu r31,r31,40 /* deallocate stack */ + bsr _C_LABEL(m88110_trap) /* trap */ + ld r1,r31,36 /* recover return address */ + addu r31,r31,40 /* deallocate stack */ jmp r1 -ASGLOBAL(m88110_FPpriviol) - subu r31,r31,40 /* allocate stack */ - st r1,r31,36 /* save return address */ - st r3,r31,32 /* save exception frame */ - or r2,r0,T_PRIVINFLT /* load trap type */ +ASLOCAL(m88110_FPpriviol) + subu r31,r31,40 /* allocate stack */ + st r1,r31,36 /* save return address */ + st r3,r31,32 /* save exception frame */ + or r2,r0,T_PRIVINFLT /* load trap type */ or r3, r29, r0 - bsr _C_LABEL(m88110_trap) /* trap */ - ld r1,r31,36 /* recover return address */ - addu r31,r31,40 /* deallocate stack */ - jmp r1 + bsr _C_LABEL(m88110_trap) /* trap */ + ld r1,r31,36 /* recover return address */ + jmp.n r1 + addu r31,r31,40 /* deallocate stack */ ENTRY(set_tcfp) - or.u r2, r0, hi16(0x200000) or r2, r2, lo16(0x200000) jmp.n r1 - fstcr r2, fcr0 - - -/************************************************************************* - ************************************************************************* - ** - ** void set_mmureg(unsigned reg_const, unsigned value); - ** - ** Sets the given mmu register on the mc88110 chip to the given value. - ** - ** Input: - ** r1 return address - ** r2 the register - ** r3 the value - ** - ** Other registers used: - ** r5 jumptable address - ** r6 calculated jumptable address - ** - ** Output: - ** none - **/ -ENTRY(set_mmureg) - /* calculate address to jump to */ - or.u r5, r0, hi16(regmark) - or r5, r5, lo16(regmark) - mul r2, r2, 0x08 - /* and go there (after adjusting the offset via ".n") */ - jmp.n r6 - subu r6, r5, r2 - - jmp.n r1 - stcr r3, cr51 - jmp.n r1 - stcr r3, cr50 - jmp.n r1 - stcr r3, cr49 - jmp.n r1 - stcr r3, cr48 - jmp.n r1 - stcr r3, cr47 - jmp.n r1 - stcr r3, cr46 - jmp.n r1 - stcr r3, cr45 - jmp.n r1 - stcr r3, cr44 - jmp.n r1 - stcr r3, cr43 - jmp.n r1 - stcr r3, cr42 - jmp.n r1 - stcr r3, cr41 - jmp.n r1 - stcr r3, cr40 - jmp.n r1 - stcr r3, cr36 - jmp.n r1 - stcr r3, cr35 - jmp.n r1 - stcr r3, cr34 - jmp.n r1 - stcr r3, cr33 - jmp.n r1 - stcr r3, cr32 - jmp.n r1 - stcr r3, cr31 - jmp.n r1 - stcr r3, cr30 - jmp.n r1 - stcr r3, cr29 - jmp.n r1 - stcr r3, cr28 - jmp.n r1 - stcr r3, cr27 - jmp.n r1 - stcr r3, cr26 -regmark: jmp.n r1 - stcr r3, cr25 - -/************************************************************************* - ************************************************************************* - ** - ** unsigned get_mmureg(unsigned reg_const); - ** - ** Get the given mmu register's value. - ** - ** Input: - ** r1 return address - ** r2 the register/return value - ** - ** Other registers used: - ** r5 jumptable address - ** r6 calculated jumptable address - ** - ** Output: - ** r2 return value - **/ -ENTRY(get_mmureg) - /* calculate address to jump to */ - or.u r5, r0, hi16(regmark2) - or r5, r5, lo16(regmark2) - mul r2, r2, 0x08 - /* and go there (after adjusting the offset via ".n") */ - jmp.n r6 - subu r6, r5, r2 - - jmp.n r1 - ldcr r2, cr51 - jmp.n r1 - ldcr r2, cr50 - jmp.n r1 - ldcr r2, cr49 - jmp.n r1 - ldcr r2, cr48 - jmp.n r1 - ldcr r2, cr47 - jmp.n r1 - ldcr r2, cr46 - jmp.n r1 - ldcr r2, cr45 - jmp.n r1 - ldcr r2, cr44 - jmp.n r1 - ldcr r2, cr43 - jmp.n r1 - ldcr r2, cr42 - jmp.n r1 - ldcr r2, cr41 - jmp.n r1 - ldcr r2, cr40 - jmp.n r1 - ldcr r2, cr36 - jmp.n r1 - ldcr r2, cr35 - jmp.n r1 - ldcr r2, cr34 - jmp.n r1 - ldcr r2, cr33 - jmp.n r1 - ldcr r2, cr32 - jmp.n r1 - ldcr r2, cr31 - jmp.n r1 - ldcr r2, cr30 - jmp.n r1 - ldcr r2, cr29 - jmp.n r1 - ldcr r2, cr28 - jmp.n r1 - ldcr r2, cr27 - jmp.n r1 - ldcr r2, cr26 -regmark2: jmp.n r1 - ldcr r2, cr25 + fstcr r2, fcr0 |