diff options
| author | Todd C. Miller <millert@cvs.openbsd.org> | 1998-05-18 00:28:38 +0000 |
|---|---|---|
| committer | Todd C. Miller <millert@cvs.openbsd.org> | 1998-05-18 00:28:38 +0000 |
| commit | 567b8d71a84ccbfec00fb59d52dfd6867296f64d (patch) | |
| tree | dfcd7958d893ae00faf51af7d859bc02ab0528b1 /sys/arch/pmax/include/psl.h | |
| parent | d414ee5831ad97169bd77cf57b15b084f79e46f2 (diff) | |
new cpureg.h from NetBSD plus modifications to use the changed macro names
Diffstat (limited to 'sys/arch/pmax/include/psl.h')
| -rw-r--r-- | sys/arch/pmax/include/psl.h | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/sys/arch/pmax/include/psl.h b/sys/arch/pmax/include/psl.h index d67c78239bb..cc349db4d61 100644 --- a/sys/arch/pmax/include/psl.h +++ b/sys/arch/pmax/include/psl.h @@ -40,31 +40,31 @@ #include <machine/machConst.h> -#define PSL_LOWIPL (MACH_INT_MASK | MACH_SR_INT_ENA_CUR) +#define PSL_LOWIPL (MIPS_INT_MASK | MIPS_SR_INT_ENA_CUR) #define PSL_USERSET ( \ - MACH_SR_KU_OLD | \ - MACH_SR_INT_ENA_OLD | \ - MACH_SR_KU_PREV | \ - MACH_SR_INT_ENA_PREV | \ - MACH_INT_MASK) + MIPS_SR_KU_OLD | \ + MIPS_SR_INT_ENA_OLD | \ + MIPS_SR_KU_PREV | \ + MIPS_SR_INT_ENA_PREV | \ + MIPS_INT_MASK) #define PSL_USERCLR ( \ - MACH_SR_COP_USABILITY | \ - MACH_SR_BOOT_EXC_VEC | \ - MACH_SR_TLB_SHUTDOWN | \ - MACH_SR_PARITY_ERR | \ - MACH_SR_CACHE_MISS | \ - MACH_SR_PARITY_ZERO | \ - MACH_SR_SWAP_CACHES | \ - MACH_SR_ISOL_CACHES | \ - MACH_SR_KU_CUR | \ - MACH_SR_INT_ENA_CUR | \ - MACH_SR_MBZ) + MIPS_SR_COP_USABILITY | \ + MIPS_SR_BOOT_EXC_VEC | \ + MIPS_SR_TLB_SHUTDOWN | \ + MIPS_SR_PARITY_ERR | \ + MIPS_SR_CACHE_MISS | \ + MIPS_SR_PARITY_ZERO | \ + MIPS_SR_SWAP_CACHES | \ + MIPS_SR_ISOL_CACHES | \ + MIPS_SR_KU_CUR | \ + MIPS_SR_INT_ENA_CUR | \ + MIPS_SR_MBZ) /* * Macros to decode processor status word. */ -#define USERMODE(ps) ((ps) & MACH_SR_KU_PREV) -#define BASEPRI(ps) (((ps) & (MACH_INT_MASK | MACH_SR_INT_ENA_PREV)) \ - == (MACH_INT_MASK | MACH_SR_INT_ENA_PREV)) +#define USERMODE(ps) ((ps) & MIPS_SR_KU_PREV) +#define BASEPRI(ps) (((ps) & (MIPS_INT_MASK | MIPS_SR_INT_ENA_PREV)) \ + == (MIPS_INT_MASK | MIPS_SR_INT_ENA_PREV)) |