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authorDale Rahn <drahn@cvs.openbsd.org>2003-10-31 03:06:18 +0000
committerDale Rahn <drahn@cvs.openbsd.org>2003-10-31 03:06:18 +0000
commit7c2e57a9b5986b6fb19c6bc4ebf5050a6a1743d0 (patch)
treeb0897f49dea0a6939c73f563ad0526aa61b0de3a /sys/arch/powerpc/include/pmap.h
parent9f5ab21dd6d83943475eff08f950c17219786400 (diff)
Fix ppc segment register restores, this fixes the 1GB ram limit and
cleans up pieces in the pmap code. tested otto, brad, miod, pval.
Diffstat (limited to 'sys/arch/powerpc/include/pmap.h')
-rw-r--r--sys/arch/powerpc/include/pmap.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/sys/arch/powerpc/include/pmap.h b/sys/arch/powerpc/include/pmap.h
index d61d9e2c378..efcab9e177c 100644
--- a/sys/arch/powerpc/include/pmap.h
+++ b/sys/arch/powerpc/include/pmap.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.h,v 1.31 2002/09/15 09:01:59 deraadt Exp $ */
+/* $OpenBSD: pmap.h,v 1.32 2003/10/31 03:06:16 drahn Exp $ */
/* $NetBSD: pmap.h,v 1.1 1996/09/30 16:34:29 ws Exp $ */
/*-
@@ -71,7 +71,9 @@ typedef u_int sr_t;
#define VP_IDX2_MASK (VP_IDX2_SIZE-1)
#define VP_IDX2_POS 12
-void pmap_kenter_cache( vaddr_t va, paddr_t pa, vm_prot_t prot, int cacheable);
+/* functions used by the bus layer for device accesses */
+void pmap_kenter_cache(vaddr_t va, paddr_t pa, vm_prot_t prot, int cacheable);
+void pmap_kremove_pg(vaddr_t va);
/* cache flags */
#define PMAP_CACHE_DEFAULT 0 /* WB cache managed mem, devices not */