Changes for imac support. support for VI computers and MCG Powerstack

will need to be merged back in. Both are currently untested.
mac interrupt support is currently a big hack and needs to be redesigned
as part of the system, several of the mac drivers need busified also.

1 files changed, 67 insertions, 33 deletions

diff --git a/sys/arch/powerpc/pci/mpc106reg.h b/sys/arch/powerpc/pci/mpc106reg.h
index edc27ff5486..1a442cf606f 100644
--- a/sys/arch/powerpc/pci/mpc106reg.h
+++ b/sys/arch/powerpc/pci/mpc106reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mpc106reg.h,v 1.3 1998/10/09 02:09:19 rahnds Exp $ */
+/*	$OpenBSD: mpc106reg.h,v 1.4 1999/11/08 23:49:00 rahnds Exp $ */
 
 /*
  * Copyright (c) 1997 Per Fogelstrom
@@ -38,95 +38,129 @@
 #ifndef _MACHINE_MPC106REG_H_
 #define _MACHINE_MPC106REG_H_
 
-/* Where we map the PCI memory space */
+/* Where we map the PCI memory space - MAP A*/
 #define MPC106_V_PCI_MEM_SPACE	0xc0000000	/* Viritual */
 #define MPC106_P_PCI_MEM_SPACE	0xc0000000	/* Physical */
 
-/* Where we map the PCI I/O space */
+/* Where we map the PCI I/O space - MAP A*/
 #define MPC106_P_ISA_IO_SPACE	0x80000000
 #define MPC106_V_ISA_IO_SPACE	0x80000000
 #define MPC106_V_PCI_IO_SPACE	0x80000000
+#define MPC106_P_PCI_IO_SPACE	0x80000000
 
 /* Where we map the config space */
 #define MPC106_PCI_CONF_SPACE	(MPC106_V_ISA_IO_SPACE + 0x00800000)
 
+/* Where we map the PCI memory space - MAP B*/
+#define MPC106_P_PCI_MEM_SPACE_MAP_B	0x80000000	/* Physical */
+
+/* Where we map the PCI I/O space - MAP B*/
+#define MPC106_P_PCI_IO_SPACE_MAP_B	0xf0000000
+
+/* Where we map the config space */
+#define MPC106_PCI_CONF_SPACE_MAP_B \
+	(MPC106_V_ISA_IO_SPACE_MAP_B + 0x00800000)
+
 /* offsets from base pointer */
-#define MPC106_CONF_BASE	(MPC106_V_ISA_IO_SPACE + 0x0cf8)
-#define MPC106_CONF_DATA	(MPC106_V_ISA_IO_SPACE + 0x0cfc)
-#define	MPC106_REGOFFS(x)	((x << 24) | 0x80)
+#define	MPC106_REGOFFS(x)	((x) | 0x80000000)
 
 /* Where PCI devices sees CPU memory. */
 #define	MPC106_PCI_CPUMEM	0x80000000
 
+#if 0
 static __inline void
-mpc_cfg_write_1(reg, val)
+mpc_cfg_write_1(iot, ioh, reg, data)
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
 	u_int32_t reg;
 	u_int8_t val;
 {
-	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
-	outb(MPC106_CONF_DATA + (reg & 3), val);
+	bus_space_write_4(iot, ioh, 0xcf8, MPC106_REGOFFS(reg));
+	bus_space_write_1(iot, ioh, 0xcfc, val);
+
+	u_int32_t addr;
+	int device;
+	int s;
+	int handle; 
+	int tag = 0;
+	printf("mpc_cfg_write tag %x offset %x data %x\n", tag, offset, data);
+
+	device = (tag >> 11) & 0x1f;
+	addr = (0x800 << device) | (tag & 0x380) | MPC106_REGOFFS(reg);
+
+	handle = ppc_open_pci_bridge();
+	s = splhigh();
+
+	OF_call_method("config-l!", handle, 1, 1,
+		0x80000000 | addr, &data);
+	splx(s);
+	ppc_close_pci_bridge(handle);
 }
 
 static __inline void
-mpc_cfg_write_2(reg, val)
+mpc_cfg_write_2(iot, ioh, reg, val)
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
 	u_int32_t reg;
 	u_int16_t val;
 {
-        u_int32_t _p_ = MPC106_CONF_DATA + (reg & 2);
-
-	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
-	__asm__ volatile("sthbrx %0, 0, %1\n" :: "r"(val), "r"(_p_));
-	__asm__ volatile("sync"); __asm__ volatile("eieio");
+	bus_space_write_4(iot, ioh, 0xcf8, MPC106_REGOFFS(reg));
+	bus_space_write_2(iot, ioh, 0xcfc, val);
 }
 
 static __inline void
-mpc_cfg_write_4(reg, val)
+mpc_cfg_write_4(iot, ioh, reg, val)
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
 	u_int32_t reg;
 	u_int32_t val;
 {
-        u_int32_t _p_ = MPC106_CONF_DATA;
 
-	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
-	__asm__ volatile("stwbrx %0, 0, %1\n" :: "r"(val), "r"(_p_));
-	__asm__ volatile("sync"); __asm__ volatile("eieio");
+	bus_space_write_4(iot, ioh, 0xcf8, MPC106_REGOFFS(reg));
+	bus_space_write_4(iot, ioh, 0xcfc, val);
 }
+#endif
 
 static __inline u_int8_t
-mpc_cfg_read_1(reg)
+mpc_cfg_read_1(iot, ioh, reg)
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
 	u_int32_t reg;
 {
 	u_int8_t _v_;
 
-	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
-	_v_ = inb(MPC106_CONF_DATA);
+	bus_space_write_4(iot, ioh, 0xcf8, MPC106_REGOFFS(reg));
+	_v_ = bus_space_read_1(iot, ioh, 0xcfc);
 	return(_v_);
 }
 
+#if 0
 static __inline u_int16_t
-mpc_cfg_read_2(reg)
+mpc_cfg_read_2(iot, ioh, reg)
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
 	u_int32_t reg;
 {
 	u_int16_t _v_;
-        u_int32_t _p_ = MPC106_CONF_DATA + (reg & 2);
 
-	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
-	__asm__ volatile("lhbrx %0, 0, %1\n" : "=r"(_v_) : "r"(_p_));
-	__asm__ volatile("sync"); __asm__ volatile("eieio");
+	bus_space_write_4(iot, ioh, 0xcf8, MPC106_REGOFFS(reg));
+	_v_ = bus_space_read_2(iot, ioh, 0xcfc);
 	return(_v_);
 }
 
 static __inline u_int32_t
-mpc_cfg_read_4(reg)
+mpc_cfg_read_4(iot, ioh, reg)
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
 	u_int32_t reg;
 {
 	u_int32_t _v_;
-        u_int32_t _p_ = MPC106_CONF_DATA;
 
-	out32(MPC106_CONF_BASE, MPC106_REGOFFS(reg));
-	__asm__ volatile("lwbrx %0, 0, %1\n" : "=r"(_v_) : "r"(_p_));
-	__asm__ volatile("sync"); __asm__ volatile("eieio");
+	bus_space_write_4(iot, ioh, 0xcf8, MPC106_REGOFFS(reg));
+	_v_ = bus_space_read_4(iot, ioh, 0xcfc);
 	return(_v_);
 }
+#endif
 
 #define MPC106_PCI_VENDOR		0x00
 #define MPC106_PCI_DEVICE		0x02