Pass both the virtual address and the physical address of the memory range

when invoking the cache functions. The physical address is needed when
operating on physically-indexed caches, such as the L2 cache on Loongson
processors.

Preprocessor abuse makes sure that the physical address computation gets
compiled out when running on a kernel compiled for virtually-indexed
caches only, such as the sgi kernel.

3 files changed, 85 insertions, 19 deletions

diff --git a/sys/arch/sgi/include/autoconf.h b/sys/arch/sgi/include/autoconf.h
index abaf1715f3a..f3466677cea 100644
--- a/sys/arch/sgi/include/autoconf.h
+++ b/sys/arch/sgi/include/autoconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.h,v 1.26 2009/11/12 19:46:46 miod Exp $ */
+/*	$OpenBSD: autoconf.h,v 1.27 2009/12/25 21:02:18 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -58,11 +58,11 @@ struct sys_rec {
 
 	/* Published cache operations. */
 	void    (*_SyncCache)(void);
-	void    (*_InvalidateICache)(vaddr_t, int);
+	void    (*_InvalidateICache)(vaddr_t, size_t);
 	void    (*_SyncDCachePage)(vaddr_t);
-	void    (*_HitSyncDCache)(vaddr_t, int);
-	void    (*_IOSyncDCache)(vaddr_t, int, int);
-	void    (*_HitInvalidateDCache)(vaddr_t, int);
+	void    (*_HitSyncDCache)(vaddr_t, size_t);
+	void    (*_IOSyncDCache)(vaddr_t, size_t, int);
+	void    (*_HitInvalidateDCache)(vaddr_t, size_t);
 
 	/* Serial console configuration. */
 	struct mips_bus_space console_io;
diff --git a/sys/arch/sgi/include/bus.h b/sys/arch/sgi/include/bus.h
index 6d14065c540..f74d4d354b2 100644
--- a/sys/arch/sgi/include/bus.h
+++ b/sys/arch/sgi/include/bus.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bus.h,v 1.21 2009/07/30 21:39:15 miod Exp $	*/
+/*	$OpenBSD: bus.h,v 1.22 2009/12/25 21:02:18 miod Exp $	*/
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB Sweden.  All rights reserved.
@@ -334,7 +334,8 @@ struct machine_bus_dma_segment {
 	bus_addr_t	ds_addr;	/* DMA address */
 	bus_size_t	ds_len;		/* length of transfer */
 
-	bus_addr_t	_ds_vaddr;	/* CPU address */
+	paddr_t		_ds_paddr;	/* CPU address */
+	vaddr_t		_ds_vaddr;	/* CPU address */
 };
 typedef struct machine_bus_dma_segment	bus_dma_segment_t;
 
diff --git a/sys/arch/sgi/include/cpu.h b/sys/arch/sgi/include/cpu.h
index da585d19f37..56d0188192f 100644
--- a/sys/arch/sgi/include/cpu.h
+++ b/sys/arch/sgi/include/cpu.h
@@ -1,29 +1,94 @@
-/*	$OpenBSD: cpu.h,v 1.5 2009/11/25 17:39:51 syuu Exp $ */
+/*	$OpenBSD: cpu.h,v 1.6 2009/12/25 21:02:18 miod Exp $ */
+/*-
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell and Rick Macklem.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	Copyright (C) 1989 Digital Equipment Corporation.
+ *	Permission to use, copy, modify, and distribute this software and
+ *	its documentation for any purpose and without fee is hereby granted,
+ *	provided that the above copyright notice appears in all copies.
+ *	Digital Equipment Corporation makes no representations about the
+ *	suitability of this software for any purpose.  It is provided "as is"
+ *	without express or implied warranty.
+ *
+ *	from: @(#)cpu.h	8.4 (Berkeley) 1/4/94
+ */
 
 #ifndef _SGI_CPU_H_
 #define _SGI_CPU_H_
 
 #ifdef _KERNEL
+
 #ifdef MULTIPROCESSOR
+
 #if defined(TGT_OCTANE)
 #define HW_CPU_NUMBER_REG 0x900000000ff50000 /* HEART_PRID */
-#else /* TGT_OCTANE */
+#else
 #error MULTIPROCESSOR kernel not supported on this configuration
-#endif /* TGT_OCTANE */
-#define hw_cpu_number() (*(uint64_t *)HW_CPU_NUMBER_REG)
-#else/* MULTIPROCESSOR */
-#define hw_cpu_number() 0
-#endif/* MULTIPROCESSOR */
-#endif/* _KERNEL */
+#endif
 
-#include <mips64/cpu.h>
-
-#if defined(_KERNEL) && defined(MULTIPROCESSOR) && !defined(_LOCORE)
+#if !defined(_LOCORE)
 void hw_cpu_boot_secondary(struct cpu_info *);
 void hw_cpu_hatch(struct cpu_info *);
 void hw_cpu_spinup_trampoline(struct cpu_info *);
 int  hw_ipi_intr_establish(int (*)(void *), u_long);
 void hw_ipi_intr_set(u_long);
 void hw_ipi_intr_clear(u_long);
-#endif/* _KERNEL && MULTIPROCESSOR && !_LOCORE */
+#endif
+
+#define hw_cpu_number() (*(uint64_t *)HW_CPU_NUMBER_REG)
+
+#else	/* MULTIPROCESSOR */
+
+#define hw_cpu_number() 0
+
+#endif	/* MULTIPROCESSOR */
+
+/*
+ * Define soft selected cache functions.
+ */
+#define	Mips_SyncCache()			\
+	(*(sys_config._SyncCache))()
+#define	Mips_InvalidateICache(va, l)		\
+	(*(sys_config._InvalidateICache))((va), (l))
+#define	Mips_SyncDCachePage(va, pa)		\
+	(*(sys_config._SyncDCachePage))((va))
+#define	Mips_HitSyncDCache(va, pa, l)		\
+	(*(sys_config._HitSyncDCache))((va), (l))
+#define	Mips_IOSyncDCache(va, pa, l, h)		\
+	(*(sys_config._IOSyncDCache))((va), (l), (h))
+#define	Mips_HitInvalidateDCache(va, pa, l)	\
+	(*(sys_config._HitInvalidateDCache))((va), (l))
+
+#endif/* _KERNEL */
+
+#include <mips64/cpu.h>
+
 #endif /* !_SGI_CPU_H_ */