diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2012-09-29 18:54:40 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2012-09-29 18:54:40 +0000 |
| commit | a2cee032ec1afe36876c84a6d3e297d71022838f (patch) | |
| tree | c90e9fd6a8fd3e64954b624dc8a0a34eecf12f72 /sys/arch/sgi/localbus/int.c | |
| parent | 67aac14886c5fb28e1445da5a9874ff7a03aa0c4 (diff) | |
Proide a mips_sync() macro to wrap asm("sync"), and replace gazillions of
such statements with it.
Diffstat (limited to 'sys/arch/sgi/localbus/int.c')
| -rw-r--r-- | sys/arch/sgi/localbus/int.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/sys/arch/sgi/localbus/int.c b/sys/arch/sgi/localbus/int.c index 076ea6f17c5..7ca9437d126 100644 --- a/sys/arch/sgi/localbus/int.c +++ b/sys/arch/sgi/localbus/int.c @@ -1,4 +1,4 @@ -/* $OpenBSD: int.c,v 1.6 2012/07/18 19:56:02 miod Exp $ */ +/* $OpenBSD: int.c,v 1.7 2012/09/29 18:54:39 miod Exp $ */ /* $NetBSD: int.c,v 1.24 2011/07/01 18:53:46 dyoung Exp $ */ /* @@ -245,8 +245,8 @@ int2_splx(int newipl) __asm__ (".set noreorder"); ci->ci_ipl = newipl; - __asm__ ("sync" ::: "memory"); - __asm__ (".set reorder"); + mips_sync(); + __asm__ (".set reorder\n"); sr = disableintr(); /* XXX overkill? */ int2_write(INT2_LOCAL1_MASK, (int2_intem >> 8) & ~int2_l1imask[newipl]); @@ -350,7 +350,7 @@ int2_attach(struct device *parent, struct device *self, void *aux) TIMER_SEL1 | TIMER_16BIT | TIMER_SWSTROBE); int2_write(INT2_TIMER_CONTROL, TIMER_SEL2 | TIMER_16BIT | TIMER_SWSTROBE); - __asm__ __volatile__ ("sync" ::: "memory"); + mips_sync(); delay(4); int2_write(INT2_TIMER_CLEAR, 0x03); @@ -493,7 +493,7 @@ int_8254_cal(void) int2_write(INT2_TIMER_CONTROL, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); int2_write(INT2_TIMER_0, freq & 0xff); - __asm__ ("sync" ::: "memory"); + mips_sync(); delay(4); int2_write(INT2_TIMER_0, freq >> 8); @@ -501,7 +501,7 @@ int_8254_cal(void) int2_write(INT2_TIMER_CONTROL, TIMER_SEL2 | TIMER_RATEGEN | TIMER_16BIT); int2_write(INT2_TIMER_2, 2); - __asm__ ("sync" ::: "memory"); + mips_sync(); delay(4); int2_write(INT2_TIMER_2, 0); |