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authorJoel Sing <jsing@cvs.openbsd.org>2009-11-10 15:50:11 +0000
committerJoel Sing <jsing@cvs.openbsd.org>2009-11-10 15:50:11 +0000
commit42e7e00ce7a678ceec19dc5a6ac06b3843a864ad (patch)
tree0262c62afeb2aaadada4e718c3a0df3fc06d2327 /sys/arch/sgi/pci
parentf7e62eaf140ea59e3123dfa40ef750d1012293c4 (diff)
Add iockbc(4), a driver for the PS/2 keyboard and mouse interface found on
ioc(4) devices. Joint work with miod@. Committed from the glass console on an SGI Fuel.
Diffstat (limited to 'sys/arch/sgi/pci')
-rw-r--r--sys/arch/sgi/pci/iocreg.h27
1 files changed, 26 insertions, 1 deletions
diff --git a/sys/arch/sgi/pci/iocreg.h b/sys/arch/sgi/pci/iocreg.h
index 3c2826680f2..0029793595e 100644
--- a/sys/arch/sgi/pci/iocreg.h
+++ b/sys/arch/sgi/pci/iocreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: iocreg.h,v 1.7 2009/11/08 13:11:19 miod Exp $ */
+/* $OpenBSD: iocreg.h,v 1.8 2009/11/10 15:50:10 jsing Exp $ */
/*
* Copyright (c) 2008 Joel Sing.
@@ -43,6 +43,13 @@
#define IOC3_GPPR_BASE 0x00000040 /* 9 GPIO pin registers */
#define IOC3_GPPR(x) (IOC3_GPPR_BASE + (x) * 4)
+/* Keyboard controller registers. */
+#define IOC3_KBC_CTRL_STATUS 0x0000009c
+#define IOC3_KBC_KBD_RX 0x000000a0
+#define IOC3_KBC_AUX_RX 0x000000a4
+#define IOC3_KBC_KBD_TX 0x000000a8
+#define IOC3_KBC_AUX_TX 0x000000ac
+
/* Non-16550 mode UART registers */
#define IOC3_UARTA_SSCR 0x000000b8 /* control register */
#define IOC3_UARTA_STPIR 0x000000bc /* TX producer index register */
@@ -101,6 +108,24 @@
/* bits in SSCR */
#define IOC3_SSCR_RESET 0x80000000
+/* bits in KBC_CTRL_STATUS */
+#define IOC3_KBC_STATUS_KBD_WRITE_PENDING 0x00000001
+#define IOC3_KBC_STATUS_AUX_WRITE_PENDING 0x00000002
+
+/* bits in KBC_*_RX */
+#define IOC3_KBC_DATA_0_VALID 0x80000000
+#define IOC3_KBC_DATA_1_VALID 0x40000000
+#define IOC3_KBC_DATA_2_VALID 0x20000000
+#define IOC3_KBC_DATA_VALID (IOC3_KBC_DATA_0_VALID | \
+ IOC3_KBC_DATA_1_VALID | \
+ IOC3_KBC_DATA_2_VALID)
+#define IOC3_KBC_DATA_0_MASK 0x00ff0000
+#define IOC3_KBC_DATA_0_SHIFT 16
+#define IOC3_KBC_DATA_1_MASK 0x0000ff00
+#define IOC3_KBC_DATA_1_SHIFT 8
+#define IOC3_KBC_DATA_2_MASK 0x000000ff
+#define IOC3_KBC_DATA_2_SHIFT 0
+
/* bits in ENET_MCR */
#define IOC3_ENET_MCR_DUPLEX 0x00000001
#define IOC3_ENET_MCR_PROMISC 0x00000002