Decide once for all whether IP22/IP28 systems are running with the ECC memory

controller or not, and store this in a global variable. This is better than
checking for the IP number everytime, especially since, according to IRIX
header files, not all IP26 use the ECC memory controller (not that it matters
much for us since we do not run on them yet)

3 files changed, 62 insertions, 46 deletions

diff --git a/sys/arch/sgi/localbus/imc.c b/sys/arch/sgi/localbus/imc.c
index c8d1a8c85d6..e60237d69eb 100644
--- a/sys/arch/sgi/localbus/imc.c
+++ b/sys/arch/sgi/localbus/imc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: imc.c,v 1.8 2012/05/25 18:17:20 miod Exp $	*/
+/*	$OpenBSD: imc.c,v 1.9 2012/05/27 14:12:55 miod Exp $	*/
 /*	$NetBSD: imc.c,v 1.32 2011/07/01 18:53:46 dyoung Exp $	*/
 
 /*
@@ -535,9 +535,8 @@ imc_attach(struct device *parent, struct device *self, void *aux)
 
 	/*
 	 * Enable parity reporting on GIO/main memory transactions, except
-	 * on systems with the ECC memory board (IP26 and IP28), where
-	 * enabling parity interferes with regular operation and causes
-	 * sticky false errors.
+	 * on systems with the ECC memory controller, where enabling parity
+	 * interferes with regular operation and causes sticky false errors.
 	 *
 	 * Disable parity checking on CPU bus transactions (as turning
 	 * it on seems to cause spurious bus errors), but enable parity
@@ -548,15 +547,10 @@ imc_attach(struct device *parent, struct device *self, void *aux)
 	 */
 	reg = imc_read(IMC_CPUCTRL0);
 	reg &= ~IMC_CPUCTRL0_NCHKMEMPAR;
-	switch (sys_config.system_type) {
-	case SGI_IP26:
-	case SGI_IP28:
+	if (ip22_ecc)
 		reg &= ~(IMC_CPUCTRL0_GPR | IMC_CPUCTRL0_MPR);
-		break;
-	default:
+	else
 		reg |= IMC_CPUCTRL0_GPR | IMC_CPUCTRL0_MPR;
-		break;
-	}
 	reg |= IMC_CPUCTRL0_INTENA;
 	imc_write(IMC_CPUCTRL0, reg);
 
@@ -895,15 +889,8 @@ imc_disable_sysad_parity(void)
 {
 	uint32_t reg;
 
-	switch (sys_config.system_type) {
-	case SGI_IP20:
-	case SGI_IP22:
-		break;
-	case SGI_IP26:
-	case SGI_IP28:
-	default:
+	if (ip22_ecc)
 		return;
-	}
 
 	reg = imc_read(IMC_CPUCTRL0);
 	reg |= IMC_CPUCTRL0_NCHKMEMPAR;
@@ -915,15 +902,8 @@ imc_enable_sysad_parity(void)
 {
 	uint32_t reg;
 
-	switch (sys_config.system_type) {
-	case SGI_IP20:
-	case SGI_IP22:
-		break;
-	case SGI_IP26:
-	case SGI_IP28:
-	default:
+	if (ip22_ecc)
 		return;
-	}
 
 	reg = imc_read(IMC_CPUCTRL0);
 	reg &= ~IMC_CPUCTRL0_NCHKMEMPAR;
@@ -936,18 +916,10 @@ imc_is_sysad_parity_enabled(void)
 {
 	uint32_t reg;
 
-	switch (sys_config.system_type) {
-	case SGI_IP20:
-	case SGI_IP22:
-		break;
-	case SGI_IP26:
-	case SGI_IP28:
-	default:
+	if (ip22_ecc)
 		return 0;
-	}
 
 	reg = imc_read(IMC_CPUCTRL0);
-
-	return reg & IMC_CPUCTRL0_NCHKMEMPAR;
+	return ~reg & IMC_CPUCTRL0_NCHKMEMPAR;
 }
 #endif
diff --git a/sys/arch/sgi/sgi/ip22.h b/sys/arch/sgi/sgi/ip22.h
index abd8f1064d0..e6531f9d959 100644
--- a/sys/arch/sgi/sgi/ip22.h
+++ b/sys/arch/sgi/sgi/ip22.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip22.h,v 1.4 2012/04/15 20:38:10 miod Exp $	*/
+/*	$OpenBSD: ip22.h,v 1.5 2012/05/27 14:13:00 miod Exp $	*/
 
 /*
  * Copyright (c) 2012 Miodrag Vallat.
@@ -34,3 +34,4 @@
 
 extern int hpc_old;	/* nonzero if at least one HPC 1.x device found */
 extern int bios_year;
+extern int ip22_ecc;	/* nonzero if runinng with an ECC memory system */
diff --git a/sys/arch/sgi/sgi/ip22_machdep.c b/sys/arch/sgi/sgi/ip22_machdep.c
index 53b60ee1d30..3a5542d346d 100644
--- a/sys/arch/sgi/sgi/ip22_machdep.c
+++ b/sys/arch/sgi/sgi/ip22_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip22_machdep.c,v 1.8 2012/05/15 18:17:50 miod Exp $	*/
+/*	$OpenBSD: ip22_machdep.c,v 1.9 2012/05/27 14:13:00 miod Exp $	*/
 
 /*
  * Copyright (c) 2012 Miodrag Vallat.
@@ -52,6 +52,7 @@ extern char *hw_prod;
 
 int	hpc_old = 0;
 int	bios_year;
+int	ip22_ecc = 0;
 
 void	ip22_arcbios_walk(void);
 int	ip22_arcbios_walk_component(arc_config_t *);
@@ -121,6 +122,7 @@ ip22_arcbios_walk_component(arc_config_t *cf)
 			 * configured for glass console, it will get
 			 * overwritten anyway.
 			 */
+			ip22_arcwalk_results |= IP22_HAS_ENOUGH_FB;
 		} else {
 			const char *id;
 			size_t idlen;
@@ -175,6 +177,10 @@ ip22_arcbios_walk()
 	(void)ip22_arcbios_walk_component((arc_config_t *)Bios_GetChild(NULL));
 }
 
+/*
+ * Parse memory controller settings.
+ */
+
 #define	IMC_NREGION	3
 
 void
@@ -205,10 +211,11 @@ ip22_memory_setup()
 	memc0 = imc_read(IMC_MEMCFG0);
 	memc1 = imc_read(IMC_MEMCFG1);
 
-	shift = IMC_MEMC_LSHIFT;
 	/* Revision D onwards uses larger units, to allow for more memory */
 	if ((imc_read(IMC_SYSID) & IMC_SYSID_REVMASK) >= 5)
 		shift = IMC_MEMC_LSHIFT_HUGE;
+	else
+		shift = IMC_MEMC_LSHIFT;
 
 	for (bank = 0; bank < IMC_NREGION; bank++) {
 		memc = (bank & 2) ? memc1 : memc0;
@@ -339,7 +346,7 @@ ip22_video_setup()
 	 *
 	 * Verified addresses:
 	 * grtwo	slot + 0x00000000
-	 * impact	?
+	 * impact	slot + 0x00000000
 	 * light	?
 	 * newport	slot + 0x000f0000 (NEWPORT_REX3_OFFSET)
 	 */
@@ -366,7 +373,7 @@ void
 ip22_setup()
 {
 	u_long cpuspeed;
-	volatile uint32_t *sysid;
+	uint8_t ip22_sysid;
 
 	/*
 	 * Get CPU information.
@@ -381,6 +388,20 @@ ip22_setup()
 	bootcpu_hwinfo.clock = cpuspeed * 1000000;
 	bootcpu_hwinfo.type = (bootcpu_hwinfo.c0prid >> 8) & 0xff;
 
+	switch (sys_config.system_type) {
+	case SGI_IP20:
+		ip22_sysid = 0;
+		break;
+	default:
+	case SGI_IP22:
+	case SGI_IP26:
+	case SGI_IP28:
+		ip22_sysid = (uint8_t)*(volatile uint32_t *)
+		    PHYS_TO_XKPHYS(HPC_BASE_ADDRESS_0 + IOC_BASE + IOC_SYSID,
+		      CCA_NC);
+		break;
+	}
+
 	/*
 	 * Scan ARCBios component list for useful information (L2 cache
 	 * configuration, audio device availability)
@@ -398,10 +419,7 @@ ip22_setup()
 			hw_prod = "VME Indigo";
 		break;
 	case SGI_IP22:
-		sysid = (volatile uint32_t *)
-		    PHYS_TO_XKPHYS(HPC_BASE_ADDRESS_0 + IOC_BASE + IOC_SYSID,
-		      CCA_NC);
-		if (*sysid & 0x01) {
+		if (ip22_sysid & 0x01) {
 			sys_config.system_subtype = IP22_INDIGO2;
 			hw_prod = "Indigo2";
 		} else {
@@ -425,6 +443,31 @@ ip22_setup()
 	}
 
 	/*
+	 * Figure out whether we are running on an Indigo2 system with the
+	 * ECC board.
+	 */
+
+	switch (sys_config.system_type) {
+	default:
+		break;
+	case SGI_IP26:
+		/*
+		 * According to IRIX <sys/IP22.h>, earlier IP26 systems
+		 * have an incomplete ECC board, and thus run in parity
+		 * mode.
+		 */
+		if (((ip22_sysid & IOC_SYSID_BOARDREV) >>
+		     IOC_SYSID_BOARDREV_SHIFT) >=
+		    (0x18 >> IOC_SYSID_BOARDREV_SHIFT))
+			ip22_ecc = 1;
+		break;
+	case SGI_IP28:
+		/* All IP28 systems use the ECC board */
+		ip22_ecc = 1;
+		break;
+	}
+
+	/*
 	 * Figure out how many TLB entries are available.
 	 */
 	switch (bootcpu_hwinfo.type) {