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authorMartin Pieuchot <mpi@cvs.openbsd.org>2013-08-07 07:29:21 +0000
committerMartin Pieuchot <mpi@cvs.openbsd.org>2013-08-07 07:29:21 +0000
commit90995fd1f69222c92bffafb661665b88a5668b65 (patch)
tree30806dbdd563ebc9c8dd8c9eb7c1a0b24f41d9c3 /sys/arch/socppc/include
parentc894b994ad2bbf72ae4a92f82b403a148212f1ed (diff)
Mimic what's done on sparc64 and parse the OpenFirmware device tree to
enumerate the pci devices. This allow us to not store the interrupt vector in the interrupt line register and to not try to attach pci devices disabled by firmware. With inputs from and ok kettenis@
Diffstat (limited to 'sys/arch/socppc/include')
-rw-r--r--sys/arch/socppc/include/pci_machdep.h103
1 files changed, 103 insertions, 0 deletions
diff --git a/sys/arch/socppc/include/pci_machdep.h b/sys/arch/socppc/include/pci_machdep.h
new file mode 100644
index 00000000000..2ba90f5d6ef
--- /dev/null
+++ b/sys/arch/socppc/include/pci_machdep.h
@@ -0,0 +1,103 @@
+/* $OpenBSD: pci_machdep.h,v 1.1 2013/08/07 07:29:20 mpi Exp $ */
+
+/*
+ * Copyright (c) 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * Machine-specific definitions for PCI autoconfiguration.
+ */
+
+/*
+ * Types provided to machine-independent PCI code
+ */
+typedef struct ppc_pci_chipset *pci_chipset_tag_t;
+typedef u_long pcitag_t;
+typedef u_long pci_intr_handle_t;
+
+/*
+ * ppc-specific PCI structure and type definitions.
+ * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
+ */
+struct ppc_pci_chipset {
+ void *pc_conf_v;
+ void (*pc_attach_hook)(struct device *,
+ struct device *, struct pcibus_attach_args *);
+ int (*pc_bus_maxdevs)(void *, int);
+ pcitag_t (*pc_make_tag)(void *, int, int, int);
+ void (*pc_decompose_tag)(void *, pcitag_t, int *,
+ int *, int *);
+ int (*pc_conf_size)(void *, pcitag_t);
+ pcireg_t (*pc_conf_read)(void *, pcitag_t, int);
+ void (*pc_conf_write)(void *, pcitag_t, int, pcireg_t);
+
+ void *pc_intr_v;
+ int (*pc_intr_map)(void *, pcitag_t, int, int,
+ pci_intr_handle_t *);
+ const char *(*pc_intr_string)(void *, pci_intr_handle_t);
+ int (*pc_intr_line)(void *, pci_intr_handle_t);
+ void *(*pc_intr_establish)(void *, pci_intr_handle_t,
+ int, int (*)(void *), void *, const char *);
+ void (*pc_intr_disestablish)(void *, void *);
+ int (*pc_ether_hw_addr)(struct ppc_pci_chipset *, u_int8_t *);
+};
+
+/*
+ * Functions provided to machine-independent PCI code.
+ */
+#define pci_attach_hook(p, s, pba) \
+ (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
+#define pci_bus_maxdevs(c, b) \
+ (*(c)->pc_bus_maxdevs)((c)->pc_conf_v, (b))
+#define pci_make_tag(c, b, d, f) \
+ (*(c)->pc_make_tag)((c)->pc_conf_v, (b), (d), (f))
+#define pci_decompose_tag(c, t, bp, dp, fp) \
+ (*(c)->pc_decompose_tag)((c)->pc_conf_v, (t), (bp), (dp), (fp))
+#define pci_conf_size(c, t) \
+ (*(c)->pc_conf_size)((c)->pc_conf_v, (t))
+#define pci_conf_read(c, t, r) \
+ (*(c)->pc_conf_read)((c)->pc_conf_v, (t), (r))
+#define pci_conf_write(c, t, r, v) \
+ (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v))
+#define pci_intr_map(pa, ihp) \
+ (*((pa)->pa_pc)->pc_intr_map)((pa)->pa_pc->pc_intr_v, \
+ (pa)->pa_intrtag, (pa)->pa_intrpin, (pa)->pa_intrline, (ihp))
+#define pci_intr_map_msi(pa, ihp) (-1)
+#define pci_intr_string(c, ih) \
+ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih))
+#define pci_intr_line(c, ih) \
+ (*(c)->pc_intr_line)((c)->pc_intr_v, (ih))
+#define pci_intr_establish(c, ih, l, h, a, nm) \
+ (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), (h), (a), (nm))
+#define pci_intr_disestablish(c, iv) \
+ (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv))
+#define pci_ether_hw_addr(c, s) \
+ (*(c)->pc_ether_hw_addr)((c), (s))
+#define pci_probe_device_hook(c, a) (0)
+
+#define pci_min_powerstate(c, t) (PCI_PMCSR_STATE_D3)
+
+#define pci_dev_postattach(a, b)