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authorMiod Vallat <miod@cvs.openbsd.org>2005-04-19 21:30:21 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2005-04-19 21:30:21 +0000
commitf8113ea52367852315892e656e7e49e3ea7e957c (patch)
treef1a8704d1210070606065840879eea1909dd61cd /sys/arch/solbourne/include
parent21df6903b631dbf2a966418f3e9d09aba3fa262e (diff)
As a late birthday present, a preliminary port to the Solbourne IDT systems
(S3000, S4000 and S4000DX). Currently limited to diskless and serial console, and userland has issues. Things will get better in the near future.
Diffstat (limited to 'sys/arch/solbourne/include')
-rw-r--r--sys/arch/solbourne/include/ansi.h3
-rw-r--r--sys/arch/solbourne/include/asm.h3
-rw-r--r--sys/arch/solbourne/include/autoconf.h3
-rw-r--r--sys/arch/solbourne/include/bppioctl.h3
-rw-r--r--sys/arch/solbourne/include/bsd_openprom.h3
-rw-r--r--sys/arch/solbourne/include/bus.h3
-rw-r--r--sys/arch/solbourne/include/cdefs.h3
-rw-r--r--sys/arch/solbourne/include/conf.h3
-rw-r--r--sys/arch/solbourne/include/cpu.h3
-rw-r--r--sys/arch/solbourne/include/ctlreg.h3
-rw-r--r--sys/arch/solbourne/include/db_machdep.h3
-rw-r--r--sys/arch/solbourne/include/disklabel.h3
-rw-r--r--sys/arch/solbourne/include/eeprom.h3
-rw-r--r--sys/arch/solbourne/include/endian.h3
-rw-r--r--sys/arch/solbourne/include/exec.h3
-rw-r--r--sys/arch/solbourne/include/fbvar.h3
-rw-r--r--sys/arch/solbourne/include/float.h3
-rw-r--r--sys/arch/solbourne/include/frame.h3
-rw-r--r--sys/arch/solbourne/include/fsr.h3
-rw-r--r--sys/arch/solbourne/include/idprom.h3
-rw-r--r--sys/arch/solbourne/include/idt.h188
-rw-r--r--sys/arch/solbourne/include/ieee.h3
-rw-r--r--sys/arch/solbourne/include/ieeefp.h3
-rw-r--r--sys/arch/solbourne/include/instr.h3
-rw-r--r--sys/arch/solbourne/include/internal_types.h3
-rw-r--r--sys/arch/solbourne/include/ioctl_fd.h3
-rw-r--r--sys/arch/solbourne/include/kap.h172
-rw-r--r--sys/arch/solbourne/include/kcore.h3
-rw-r--r--sys/arch/solbourne/include/limits.h3
-rw-r--r--sys/arch/solbourne/include/oldmon.h3
-rw-r--r--sys/arch/solbourne/include/openpromio.h3
-rw-r--r--sys/arch/solbourne/include/param.h187
-rw-r--r--sys/arch/solbourne/include/pcb.h3
-rw-r--r--sys/arch/solbourne/include/pmap.h114
-rw-r--r--sys/arch/solbourne/include/proc.h3
-rw-r--r--sys/arch/solbourne/include/profile.h3
-rw-r--r--sys/arch/solbourne/include/prom.h108
-rw-r--r--sys/arch/solbourne/include/psl.h3
-rw-r--r--sys/arch/solbourne/include/pte.h94
-rw-r--r--sys/arch/solbourne/include/ptrace.h3
-rw-r--r--sys/arch/solbourne/include/reg.h3
-rw-r--r--sys/arch/solbourne/include/reloc.h3
-rw-r--r--sys/arch/solbourne/include/remote-sl.h3
-rw-r--r--sys/arch/solbourne/include/setjmp.h3
-rw-r--r--sys/arch/solbourne/include/signal.h3
-rw-r--r--sys/arch/solbourne/include/spinlock.h3
-rw-r--r--sys/arch/solbourne/include/stdarg.h3
-rw-r--r--sys/arch/solbourne/include/sun_disklabel.h3
-rw-r--r--sys/arch/solbourne/include/svr4_machdep.h3
-rw-r--r--sys/arch/solbourne/include/trap.h3
-rw-r--r--sys/arch/solbourne/include/types.h3
-rw-r--r--sys/arch/solbourne/include/varargs.h3
-rw-r--r--sys/arch/solbourne/include/vmparam.h22
-rw-r--r--sys/arch/solbourne/include/z8530var.h3
54 files changed, 1026 insertions, 0 deletions
diff --git a/sys/arch/solbourne/include/ansi.h b/sys/arch/solbourne/include/ansi.h
new file mode 100644
index 00000000000..d63315413bf
--- /dev/null
+++ b/sys/arch/solbourne/include/ansi.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: ansi.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/ansi.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/asm.h b/sys/arch/solbourne/include/asm.h
new file mode 100644
index 00000000000..4f19a2ca879
--- /dev/null
+++ b/sys/arch/solbourne/include/asm.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: asm.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/asm.h>
diff --git a/sys/arch/solbourne/include/autoconf.h b/sys/arch/solbourne/include/autoconf.h
new file mode 100644
index 00000000000..14845976c9a
--- /dev/null
+++ b/sys/arch/solbourne/include/autoconf.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: autoconf.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/autoconf.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/bppioctl.h b/sys/arch/solbourne/include/bppioctl.h
new file mode 100644
index 00000000000..147f603d740
--- /dev/null
+++ b/sys/arch/solbourne/include/bppioctl.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: bppioctl.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/bppioctl.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/bsd_openprom.h b/sys/arch/solbourne/include/bsd_openprom.h
new file mode 100644
index 00000000000..73378837778
--- /dev/null
+++ b/sys/arch/solbourne/include/bsd_openprom.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: bsd_openprom.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/bsd_openprom.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/bus.h b/sys/arch/solbourne/include/bus.h
new file mode 100644
index 00000000000..cd5a4088e98
--- /dev/null
+++ b/sys/arch/solbourne/include/bus.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: bus.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/bus.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/cdefs.h b/sys/arch/solbourne/include/cdefs.h
new file mode 100644
index 00000000000..35b4252fa22
--- /dev/null
+++ b/sys/arch/solbourne/include/cdefs.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: cdefs.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/cdefs.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/conf.h b/sys/arch/solbourne/include/conf.h
new file mode 100644
index 00000000000..d14fe138f7f
--- /dev/null
+++ b/sys/arch/solbourne/include/conf.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: conf.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/conf.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/cpu.h b/sys/arch/solbourne/include/cpu.h
new file mode 100644
index 00000000000..ac5fb9b7c09
--- /dev/null
+++ b/sys/arch/solbourne/include/cpu.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: cpu.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/cpu.h>
diff --git a/sys/arch/solbourne/include/ctlreg.h b/sys/arch/solbourne/include/ctlreg.h
new file mode 100644
index 00000000000..e396e936d25
--- /dev/null
+++ b/sys/arch/solbourne/include/ctlreg.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: ctlreg.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/ctlreg.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/db_machdep.h b/sys/arch/solbourne/include/db_machdep.h
new file mode 100644
index 00000000000..31a6854b8f3
--- /dev/null
+++ b/sys/arch/solbourne/include/db_machdep.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: db_machdep.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/db_machdep.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/disklabel.h b/sys/arch/solbourne/include/disklabel.h
new file mode 100644
index 00000000000..2b1ab7758f8
--- /dev/null
+++ b/sys/arch/solbourne/include/disklabel.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: disklabel.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/disklabel.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/eeprom.h b/sys/arch/solbourne/include/eeprom.h
new file mode 100644
index 00000000000..2541fd0dcd1
--- /dev/null
+++ b/sys/arch/solbourne/include/eeprom.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: eeprom.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/eeprom.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/endian.h b/sys/arch/solbourne/include/endian.h
new file mode 100644
index 00000000000..fd88a29fd41
--- /dev/null
+++ b/sys/arch/solbourne/include/endian.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: endian.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/endian.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/exec.h b/sys/arch/solbourne/include/exec.h
new file mode 100644
index 00000000000..a7b96d61aff
--- /dev/null
+++ b/sys/arch/solbourne/include/exec.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: exec.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/exec.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/fbvar.h b/sys/arch/solbourne/include/fbvar.h
new file mode 100644
index 00000000000..b7787b5af5b
--- /dev/null
+++ b/sys/arch/solbourne/include/fbvar.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: fbvar.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/fbvar.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/float.h b/sys/arch/solbourne/include/float.h
new file mode 100644
index 00000000000..ba0bb6f316e
--- /dev/null
+++ b/sys/arch/solbourne/include/float.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: float.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/float.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/frame.h b/sys/arch/solbourne/include/frame.h
new file mode 100644
index 00000000000..32f5ade4615
--- /dev/null
+++ b/sys/arch/solbourne/include/frame.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: frame.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/frame.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/fsr.h b/sys/arch/solbourne/include/fsr.h
new file mode 100644
index 00000000000..c8d5b061ad1
--- /dev/null
+++ b/sys/arch/solbourne/include/fsr.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: fsr.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/fsr.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/idprom.h b/sys/arch/solbourne/include/idprom.h
new file mode 100644
index 00000000000..9cf6b8d241c
--- /dev/null
+++ b/sys/arch/solbourne/include/idprom.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: idprom.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/idprom.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/idt.h b/sys/arch/solbourne/include/idt.h
new file mode 100644
index 00000000000..523f178f2ba
--- /dev/null
+++ b/sys/arch/solbourne/include/idt.h
@@ -0,0 +1,188 @@
+/* $OpenBSD: idt.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/*
+ * Copyright (c) 2005, Miodrag Vallat
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SOLBOURNE_IDT_H_
+#define _SOLBOURNE_IDT_H_
+
+/*
+ * Definitions for the core chips found on the IDT motherboard.
+ *
+ * All addresses are physical.
+ */
+
+/*
+ * iGLU: GLUE Logic
+ */
+
+#define GLU_BASE 0x60000000
+
+/* profiling timer (level 14) */
+#define GLU_L14_DIVISOR 0x60000000
+#define GLU_L14_RESOLUTION (256 / 5) /* in microseconds */
+#define GLU_L14_ENABLE 0x60000008
+#define GLU_L14_IACK 0x6000000c
+
+/* scheduling timer (level 10) */
+#define GLU_L10_IACK 0x60000800
+
+/* board status register */
+#define GLU_BSR 0x60001800
+#define GBSR_LED_MASK 0x07
+#define GBSR_LED_OFF 00
+#define GBSR_LED_AMBER 02
+#define GBSR_LED_AMBER_BLINK 03
+#define GBSR_LED_GREEN 04
+#define GBSR_LED_GREEN_BLINK 05
+#define GBSR_LED_BOTH_BLINK 07
+#define GBSR_DIAG 0x08
+#define GBSR_WARM 0x10
+#define GBSR_NMI 0x20
+
+/* board diagnostic register */
+#define GLU_DIAG 0x60001808
+#define GD_EXTRA_MEMORY 0x10
+#define GD_36MHZ 0x20
+#define GD_L2_CACHE 0x40
+
+/* interrupt control register */
+#define GLU_ICR 0x60002000
+#define GICR_DISPATCH_MASK 0x0000000f /* post a software interrupt */
+#define GICR_DISABLE_ALL 0x00000010
+
+/* programmable interrupt levels for sbus and onboard audio */
+#define GLU_SBUS1 0x60002008
+#define GLU_SBUS2 0x60002010
+#define GLU_SBUS3 0x60002018
+#define GLU_SBUS4 0x60002020
+#define GLU_SBUS5 0x60002028
+#define GLU_SBUS6 0x60002030
+#define GLU_SBUS7 0x60002038
+#define GLU_AUDIO 0x60002040
+
+/* reset register */
+#define GLU_RESET 0x60002800
+
+/* programmable base for on-board i/o devices */
+#define GLU_IOBASE 0x60003800
+
+/*
+ * iMC: Memory Controller
+ */
+
+#define MC_BASE 0x70000000
+
+#define MC0_MCR 0x70000001
+#define MC1_MCR 0x71000001 /* may be missing */
+#define MCR_BANK1_AVAIL 0x08
+#define MCR_BANK0_AVAIL 0x04
+#define MCR_BANK1_32M 0x02
+#define MCR_BANK0_32M 0x01
+
+/*
+ * iCU: DMA and Interrupt Controller
+ */
+
+#define ICU_BASE 0x50000000
+
+/* interrupt status register */
+#define ICU_ISR 0x50000000
+#define ISR_S0_DMA_SECC 0x00000001
+#define ISR_S0_DMA_MECC 0x00000002
+#define ISR_S0_DMA_SERR 0x00000004
+#define ISR_S1_DMA_SECC 0x00000008
+#define ISR_S1_DMA_MECC 0x00000010
+#define ISR_S1_DMA_SERR 0x00000020
+#define ISR_S2_DMA_SECC 0x00000040
+#define ISR_S2_DMA_MECC 0x00000080
+#define ISR_S2_DMA_SERR 0x00000100
+#define ISR_EN_DMA_SECC 0x00000200
+#define ISR_EN_DMA_MECC 0x00000400
+#define ISR_EN_DMA_SERR 0x00000800
+#define ISR_SCSI_DMA_SECC 0x00001000
+#define ISR_SCSI_DMA_MECC 0x00002000
+#define ISR_SCSI_DMA_SERR 0x00004000
+#define ISR_RIO_NMI_ENABLE 0x00008000
+#define ISR_DMA_NMI_ENABLE 0x00010000
+#define ISR_ICU_INT_ENABLE 0x00020000
+#define ISR_SECC_COUNT 0x003c0000
+#define ISR_SECC_OVERFLOW 0x00400000
+#define ISR_MEMDEC_MISS 0x00800000
+#define ISR_XLAT_INVALID 0x01000000
+#define ISR_WIN_MISS 0x02000000
+#define ISR_FAULT 0x04000000
+#define ISR_S0_RIO_ERR 0x08000000
+#define ISR_S1_RIO_ERR 0x10000000
+#define ISR_S2_RIO_ERR 0x20000000
+#define ISR_EN_RIO_ERR 0x40000000
+#define ISR_RIO_RETRY_TMO 0x80000000
+
+#define ISR_BITS "\020" \
+ "\01S0_SECC\02S0_MECC\03S0_SERR\04S1_SECC\05S1_MECC\06S1_SERR" \
+ "\07S2_SECC\10S2_MECC\11S2_SERR\12EN_SECC\13EN_MECC\14EN_SERR" \
+ "\15SCSI_SECC\16SCSSI_MECC\17SCSI_SERR\20RIO_NMIE\21DMA_NMIE\22ICU_IE" \
+ "\27SECC_OVERFLOW\30MEMDEC_MISS\31XLAT_INVALID\32WIN_MISS\33FAULT" \
+ "\34S0_RIO\35S1_RIO\36S2_RIO\37RIO_TMO"
+
+#define ICU_TIR 0x50000008
+
+#define ICU_TER 0x5000000c
+#define TER_S0 0x00000002
+#define TER_S1 0x00000004
+#define TER_S2 0x00000008
+#define TER_ETHERNET 0x00000010
+#define TER_SCSI 0x00000020
+#define TER_IO_DISABLE 0x00000040
+#define TER_W_COMP_DIS 0x00000080
+
+#define ICU_TWR 0x50000010
+
+#define ICU_TRR 0x50000014
+
+#define ICU_CONF 0x50000018
+#define CONF_ECC_ENABLE 0x00000004
+#define CONF_NO_EXTRA_MEMORY 0x00000008
+#define CONF_SBUS_25MHZ 0x00000020
+#define CONF_SLOW_DMA_WRITE 0x00000080
+#define CONF_SLOW_DMA_READ 0x00000100
+#define CONF_ICACHE_DISABLE 0x00000400
+
+/*
+ * Onboard devices
+ */
+
+#define SE_BASE 0x40000000 /* scsi and ethernet */
+#define NVRAM_BASE 0x80000000
+#define ZS1_BASE 0x80004000
+#define ZS0_BASE 0x80008000
+#define FDC_BASE 0x8000c000
+#define AUDIO_BASE 0x80010000
+#define TODCLOCK_BASE 0x80014000
+
+/* we map the following range 1:1 in kernel space */
+#define OBIO_PA_START 0x80000000
+#define OBIO_PA_END 0x80018000
+
+#endif /* _SOLBOURNE_IDT_H_ */
diff --git a/sys/arch/solbourne/include/ieee.h b/sys/arch/solbourne/include/ieee.h
new file mode 100644
index 00000000000..d4132797949
--- /dev/null
+++ b/sys/arch/solbourne/include/ieee.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: ieee.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/ieee.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/ieeefp.h b/sys/arch/solbourne/include/ieeefp.h
new file mode 100644
index 00000000000..6f46553e3a4
--- /dev/null
+++ b/sys/arch/solbourne/include/ieeefp.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: ieeefp.h,v 1.1 2005/04/19 21:30:17 miod Exp $ */
+/* public domain */
+#include <sparc/ieeefp.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/instr.h b/sys/arch/solbourne/include/instr.h
new file mode 100644
index 00000000000..24466cd7583
--- /dev/null
+++ b/sys/arch/solbourne/include/instr.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: instr.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/instr.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/internal_types.h b/sys/arch/solbourne/include/internal_types.h
new file mode 100644
index 00000000000..abaf26591d0
--- /dev/null
+++ b/sys/arch/solbourne/include/internal_types.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: internal_types.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/internal_types.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/ioctl_fd.h b/sys/arch/solbourne/include/ioctl_fd.h
new file mode 100644
index 00000000000..16547f99c45
--- /dev/null
+++ b/sys/arch/solbourne/include/ioctl_fd.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: ioctl_fd.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/ioctl_fd.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/kap.h b/sys/arch/solbourne/include/kap.h
new file mode 100644
index 00000000000..e8bad326110
--- /dev/null
+++ b/sys/arch/solbourne/include/kap.h
@@ -0,0 +1,172 @@
+/* $OpenBSD: kap.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/*
+ * Copyright (c) 2005, Miodrag Vallat
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SOLBOURNE_KAP_H_
+#define _SOLBOURNE_KAP_H_
+
+/*
+ * KAP specific control registers
+ */
+
+#ifdef _KERNEL
+
+/* TLB handling - write only */
+#define ASI_GTLB_RANDOM 0xc0 /* random TLB drop-in */
+#define ASI_GTLB_DROPIN 0xc1 /* TLB drop-in */
+#define ASI_GTLB_INVAL_ENTRY 0xc2 /* invalidate entry */
+#define ASI_GTLB_INVAL_PID 0xc3 /* invalidate PID */
+#define ASI_GTLB_INVALIDATE 0xc4 /* invalidate entire TLB */
+#define ASI_ITLB_DROPIN 0xc8 /* iTLB drop-in */
+
+/* TLB position addressing */
+#define TLB_SLOT(x) ((x) << 3)
+#define TLB_INCR (1 << 3)
+#define GTLB_SLOTS (128 + 8) /* XXX unsure */
+#define ITLB_SLOTS 8 /* XXX unsure */
+
+/* data cache handling - read only except ASI_DCACHE_RW */
+#define ASI_DCACHE_FLUSH 0xd0 /* flush dcache block */
+#define ASI_DCACHE_LOOKUP 0xd1 /* check for dcache hit */
+#define ASI_DCACHE_RW 0xd2 /* read/write dcache */
+#define ASI_DCACHE_INVAL 0xd3 /* invalidate dcache */
+
+/* cache line addressing (for D flushes) */
+#define DCACHE_LINE(x) ((x) << 2)
+#define DCACHE_INCR (1 << 2)
+#define DCACHE_LINES 256
+
+/* bus access - read/write */
+#define ASI_PHYS_IO 0xd4 /* not cached */
+#define ASI_PHYS_CACHED 0xd5 /* cached */
+#define ASI_PHYS_NBW 0xd6 /* non byte writeable shared */
+#define ASI_PHYS_BW 0xd7 /* byte writeable shared */
+
+/* inst cache handling - read only except ASI_ICACHE_RW */
+#define ASI_ICACHE_LOOKUP 0xd9 /* check for icache hit */
+#define ASI_ICACHE_RW 0xda /* read/write icache */
+#define ASI_ICACHE_INVAL 0xdb /* invalidate icache */
+
+/* MMU registers */
+#define ASI_MMCR 0xe0 /* control register, rw */
+#define ASI_PDBR 0xe1 /* page directory base address, rw */
+#define ASI_FVAR 0xe2 /* fault va, rw */
+#define ASI_PDER 0xe3 /* page directory entry pointer, ro */
+#define ASI_PTOR 0xe4 /* page table offset, ro */
+#define ASI_FPAR 0xe5 /* fault pa, rw */
+#define ASI_FPSR 0xe6 /* fault ASI, rw */
+#define ASI_PIID 0xe7 /* process ID invalidation, rw */
+#define ASI_PID 0xe8 /* process ID, rw */
+#define ASI_BCR 0xe9 /* bus control, rw */
+#define ASI_FCR 0xea /* fault cause, rw */
+#define ASI_PTW0 0xeb /* translation window #0, rw */
+#define ASI_PTW1 0xec /* translation window #0, rw */
+#define ASI_PTW2 0xed /* translation window #0, rw */
+
+/* Hardware watchdog */
+#define ASI_WAR0 0xee /* watchpoint address 0, rw */
+#define ASI_WAR1 0xef /* watchpoint address 1, rw */
+#define ASI_WCR 0xf0 /* watchpoint control register, rw */
+
+/* MMCR fields */
+#define MMCR_ENABLE 0x00000001 /* MMU enable */
+#define MMCR_MATCH_PTW 0x00000002 /* lookup matches PTW */
+#define MMCR_MATCH_ITLB 0x00000004 /* lookup matches ITLB */
+#define MMCR_MATCH_GTLB 0x00000008 /* lookup matches GTLB */
+#define MMCR_ISET0 0x00000080 /* icache set 0 */
+#define MMCR_ISET1 0x00000100 /* icache set 1 */
+#define MMCR_ISET2 0x00000200 /* icache set 2 */
+#define MMCR_DSET0 0x00000400 /* dcache set 0 */
+#define MMCR_DSET1 0x00000800 /* dcache set 1 */
+
+/* BCR fields */
+#define BCR_FAULT_SYNDROME 0x000000ff /* ECC syndrome byte */
+#define BCR_ECC 0x00000100 /* ECC enable */
+#define BCR_FAULT_DISABLE 0x00000200 /* disable ECC faults */
+
+/* FCR fields */
+#define FCR_PROTMASK 0x0000000f
+#define FCR_V 0x00000001 /* page not valid */
+#define FCR_RO 0x00000002 /* write access on read only */
+#define FCR_S 0x00000004 /* user access on sup. only */
+#define FCR_EXTERNAL 0x00000100 /* external fault */
+#define FCR_ECC_SINGLE 0x00000200 /* single bit ECC */
+#define FCR_ECC_MULTIPLE 0x00000400 /* multiple bit ECC */
+
+#define FCR_BITS "\020\01V\02RO\03S\011EXTERNAL\012ECCS\013ECCM"
+
+/* PTW fields */
+#define PTW_V 0x00000001 /* valid */
+#define PTW_RO 0x00000002 /* read only */
+#define PTW_RW 0x00000000
+#define PTW_S 0x00000004 /* supervisor only */
+#define PTW_CACHEABLE 0x00000008
+#define PTW_BYTE_SHARED 0x00000010
+#define PTW_SHARED 0x00000018
+#define PTW_MASK_MASK 0x0000ff00 /* window address mask */
+#define PTW_MASK_SHIFT 8
+#define PTW_PA_MASK 0x00ff0000 /* physical window */
+#define PTW_PA_SHIFT 16
+#define PTW_VA_MASK 0xff000000 /* virtual window */
+#define PTW_VA_SHIFT 24
+
+#define PTW_WINDOW_SIZE 0x01000000
+#define PTW_WINDOW_MASK 0xff000000
+#define PTW_WINDOW_SHIFT 24
+
+#define PTW_TEMPLATE(va,pa,size) \
+ (((va) << PTW_VA_SHIFT) | ((pa) << PTW_PA_SHIFT) | \
+ (((~((size) - 1) >> 24) << PTW_MASK_SHIFT) & PTW_MASK_MASK))
+
+/*
+ * Initial virtual memory settings
+ */
+
+#define ROM_WINDOW 0x00
+#define PTW0_BASE (ROM_WINDOW << PTW_WINDOW_SHIFT)
+#define PHYSMEM_WINDOW 0xf0
+#define PHYSMEM_BASE (PHYSMEM_WINDOW << PTW_WINDOW_SHIFT)
+#define PTW1_WINDOW 0xfd
+#define PTW1_BASE (PTW1_WINDOW << PTW_WINDOW_SHIFT)
+#define PTW2_WINDOW 0xfe
+#define PTW2_BASE (PTW2_WINDOW << PTW_WINDOW_SHIFT)
+#define PTW0_DEFAULT \
+ PTW_TEMPLATE(ROM_WINDOW, ROM_WINDOW, 0x10000000) | PTW_S | PTW_V
+#define PTW1_DEFAULT PTW_CACHEABLE | \
+ PTW_TEMPLATE(PTW1_WINDOW, PHYSMEM_WINDOW, 0x01000000) | PTW_S | PTW_V
+#define PTW2_DEFAULT PTW_SHARED | \
+ PTW_TEMPLATE(PTW2_WINDOW, PHYSMEM_WINDOW, 0x01000000) | PTW_S | PTW_V
+
+#define PTW0_TO_PHYS(va) (va)
+#define PTW1_TO_PHYS(va) ((va) - PTW1_BASE + PHYSMEM_BASE)
+#define PTW2_TO_PHYS(va) ((va) - PTW2_BASE + PHYSMEM_BASE)
+
+#define PHYS_TO_PTW0(pa) (pa)
+#define PHYS_TO_PTW1(pa) ((pa) - PHYSMEM_BASE + PTW1_BASE)
+#define PHYS_TO_PTW2(pa) ((pa) - PHYSMEM_BASE + PTW2_BASE)
+
+#endif /* _KERNEL */
+
+#endif /* _SOLBOURNE_KAP_H_ */
diff --git a/sys/arch/solbourne/include/kcore.h b/sys/arch/solbourne/include/kcore.h
new file mode 100644
index 00000000000..909e135e736
--- /dev/null
+++ b/sys/arch/solbourne/include/kcore.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: kcore.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/kcore.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/limits.h b/sys/arch/solbourne/include/limits.h
new file mode 100644
index 00000000000..16acc457ef4
--- /dev/null
+++ b/sys/arch/solbourne/include/limits.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: limits.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/limits.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/oldmon.h b/sys/arch/solbourne/include/oldmon.h
new file mode 100644
index 00000000000..6156c4a188e
--- /dev/null
+++ b/sys/arch/solbourne/include/oldmon.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: oldmon.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/oldmon.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/openpromio.h b/sys/arch/solbourne/include/openpromio.h
new file mode 100644
index 00000000000..816058e364d
--- /dev/null
+++ b/sys/arch/solbourne/include/openpromio.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: openpromio.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/openpromio.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/param.h b/sys/arch/solbourne/include/param.h
new file mode 100644
index 00000000000..4fb1cea06f5
--- /dev/null
+++ b/sys/arch/solbourne/include/param.h
@@ -0,0 +1,187 @@
+/* $OpenBSD: param.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* OpenBSD: param.h,v 1.29 2004/08/06 22:31:31 mickey Exp */
+
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)param.h 8.1 (Berkeley) 6/11/93
+ */
+
+#ifndef _SOLBOURNE_PARAM_H_
+#define _SOLBOURNE_PARAM_H_
+
+#define _MACHINE solbourne
+#define MACHINE "solbourne"
+#define _MACHINE_ARCH sparc
+#define MACHINE_ARCH "sparc"
+#define MID_MACHINE MID_SPARC
+
+#ifdef _KERNEL /* XXX */
+#ifndef _LOCORE /* XXX */
+#include <machine/cpu.h> /* XXX */
+#endif /* XXX */
+#endif /* XXX */
+
+/*
+ * Round p (pointer or byte index) up to a correctly-aligned value for
+ * the machine's strictest data type. The result is u_int and must be
+ * cast to any desired pointer type.
+ *
+ * ALIGNED_POINTER is a boolean macro that checks whether an address
+ * is valid to fetch data elements of type t from on this architecture.
+ * This does not reflect the optimal alignment, just the possibility
+ * (within reasonable limits).
+ *
+ */
+#define ALIGNBYTES 7
+#define ALIGN(p) (((u_int)(p) + ALIGNBYTES) & ~ALIGNBYTES)
+#define ALIGNED_POINTER(p,t) ((((u_long)(p)) & (sizeof(t)-1)) == 0)
+
+#define SUN4_PGSHIFT 13 /* for a sun4 machine */
+#define SUN4CM_PGSHIFT 12 /* for a sun4c or sun4m machine */
+
+#define KERNBASE 0xfd080000
+#define KERNTEXTOFF 0xfd084000 /* start of kernel text */
+
+#define DEV_BSIZE 512
+#define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */
+#define BLKDEV_IOSIZE 2048
+#define MAXPHYS (64 * 1024)
+
+#define SSIZE 1 /* initial stack size in pages */
+#define USPACE 8192
+#define USPACE_ALIGN (0) /* u-area alignment 0-none */
+
+/*
+ * Constants related to network buffer management.
+ * MCLBYTES must be no larger than the software page size, and,
+ * on machines that exchange pages of input or output buffers with mbuf
+ * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
+ * of the hardware page size.
+ */
+#define MSIZE 256 /* size of an mbuf */
+#define MCLSHIFT 11 /* log2(MCLBYTES) */
+#define MCLBYTES (1 << MCLSHIFT) /* enough for whole Ethernet packet */
+#define MCLOFSET (MCLBYTES - 1)
+#define NMBCLUSTERS 2048 /* map size, max cluster allocation */
+
+#define MSGBUFSIZE PAGE_SIZE /* larger than on sparc! */
+#define MSGBUF_PA PTW1_TO_PHYS(KERNBASE) /* msgbuf physical address */
+
+/*
+ * Minimum and maximum sizes of the kernel malloc arena in PAGE_SIZE-sized
+ * logical pages.
+ */
+#define NKMEMPAGES_MIN_DEFAULT ((6 * 1024 * 1024) >> PAGE_SHIFT)
+#define NKMEMPAGES_MAX_DEFAULT ((6 * 1024 * 1024) >> PAGE_SHIFT)
+
+/* pages ("clicks") to disk blocks */
+#define ctod(x) ((x) << (PGSHIFT - DEV_BSHIFT))
+#define dtoc(x) ((x) >> (PGSHIFT - DEV_BSHIFT))
+
+/* pages to bytes */
+#define ctob(x) ((x) << PGSHIFT)
+#define btoc(x) (((x) + PGOFSET) >> PGSHIFT)
+
+/* bytes to disk blocks */
+#define btodb(x) ((x) >> DEV_BSHIFT)
+#define dbtob(x) ((x) << DEV_BSHIFT)
+
+/*
+ * Map a ``block device block'' to a file system block.
+ * This should be device dependent, and should use the bsize
+ * field from the disk label.
+ * For now though just use DEV_BSIZE.
+ */
+#define bdbtofsb(bn) ((bn) / (BLKDEV_IOSIZE / DEV_BSIZE))
+
+/*
+ * dvmamap manages a range of DVMA addresses intended to create double
+ * mappings of physical memory. In a way, `dvmamap' is a submap of the
+ * VM map `phys_map'. The difference is the use of the `resource map'
+ * routines to manage page allocation, allowing DVMA addresses to be
+ * allocated and freed from within interrupt routines.
+ *
+ * Note that `phys_map' can still be used to allocate memory-backed pages
+ * in DVMA space.
+ */
+#ifdef _KERNEL
+#ifndef _LOCORE
+extern vaddr_t dvma_base;
+extern vaddr_t dvma_end;
+extern struct extent *dvmamap_extent;
+
+extern caddr_t kdvma_mapin(caddr_t, int, int);
+extern caddr_t dvma_malloc_space(size_t, void *, int, int);
+extern void dvma_free(caddr_t, size_t, void *);
+#define dvma_malloc(len,kaddr,flags) dvma_malloc_space(len,kaddr,flags,0)
+
+extern void delay(unsigned int);
+#define DELAY(n) delay(n)
+
+extern int cputyp;
+#if 0
+extern int cpumod;
+extern int mmumod;
+#endif
+
+#endif /* _LOCORE */
+#endif /* _KERNEL */
+
+/*
+ * Values for the cputyp variable.
+ */
+#define CPU_KAP 5
+
+/*
+ * Shorthand CPU-type macros.
+ * Let compiler optimize away code conditional on constants.
+ */
+#define CPU_ISSUN4M (0)
+#define CPU_ISSUN4C (0)
+#define CPU_ISSUN4 (0)
+#define CPU_ISSUN4OR4C (0)
+#define CPU_ISSUN4COR4M (0)
+#define CPU_ISKAP (1)
+#define NBPG 8192
+#define PGOFSET (NBPG - 1)
+#define PGSHIFT SUN4_PGSHIFT
+#define PAGE_SIZE 8192
+#define PAGE_MASK (PAGE_SIZE - 1)
+#define PAGE_SHIFT SUN4_PGSHIFT
+
+#endif /* _SOLBOURNE_PARAM_H_ */
diff --git a/sys/arch/solbourne/include/pcb.h b/sys/arch/solbourne/include/pcb.h
new file mode 100644
index 00000000000..ad263584fa6
--- /dev/null
+++ b/sys/arch/solbourne/include/pcb.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: pcb.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/pcb.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/pmap.h b/sys/arch/solbourne/include/pmap.h
new file mode 100644
index 00000000000..185df8f4afa
--- /dev/null
+++ b/sys/arch/solbourne/include/pmap.h
@@ -0,0 +1,114 @@
+/* $OpenBSD: pmap.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/*
+ * Copyright (c) 2005, Miodrag Vallat
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SOLBOURNE_PMAP_H_
+#define _SOLBOURNE_PMAP_H_
+
+#include <machine/pte.h>
+
+/*
+ * PMAP structure
+ */
+struct pmap {
+ pd_entry_t *pm_segtab; /* first level table */
+ paddr_t pm_psegtab; /* pa of above */
+
+ int pm_refcount; /* reference count */
+ struct simplelock pm_lock;
+ struct pmap_statistics pm_stats; /* pmap statistics */
+};
+
+typedef struct pmap *pmap_t;
+
+/*
+ * Extra constants passed in the low bits of pa in pmap_enter() to
+ * request specific memory attributes.
+ */
+
+#define PMAP_NC 1
+#define PMAP_OBIO PMAP_NC
+#define PMAP_BWS 2
+
+/*
+ * Macro to pass iospace bits in the low bits of pa in pmap_enter().
+ * Provided for source code compatibility - we don't need such bits.
+ */
+
+#define PMAP_IOENC(x) 0
+
+#ifdef _KERNEL
+
+extern struct pmap kernel_pmap_store;
+
+#define kvm_recache(addr, npages) kvm_setcache(addr, npages, 1)
+#define kvm_uncache(addr, npages) kvm_setcache(addr, npages, 0)
+#define pmap_copy(a,b,c,d,e) do { /* nothing */ } while (0)
+#define pmap_deactivate(p) do { /* nothing */ } while (0)
+#define pmap_kernel() (&kernel_pmap_store)
+#define pmap_phys_address(frame) ptoa(frame)
+#define pmap_resident_count(p) ((p)->pm_stats.resident_count)
+#define pmap_update(p) do { /* nothing */ } while (0)
+#define pmap_wired_count(p) ((p)->pm_stats.wired_count)
+
+#define PMAP_PREFER(fo, ap) pmap_prefer((fo), (ap))
+
+struct proc;
+void kvm_setcache(caddr_t, int, int);
+void switchexit(struct proc *); /* locore.s */
+void pmap_activate(struct proc *);
+void pmap_bootstrap(size_t);
+void pmap_cache_enable(void);
+void pmap_changeprot(pmap_t, vaddr_t, vm_prot_t, int);
+boolean_t pmap_clear_modify(struct vm_page *);
+boolean_t pmap_clear_reference(struct vm_page *);
+void pmap_copy_page(struct vm_page *, struct vm_page *);
+pmap_t pmap_create(void);
+void pmap_destroy(pmap_t);
+int pmap_enter(pmap_t, vaddr_t, paddr_t, vm_prot_t, int);
+boolean_t pmap_extract(pmap_t, vaddr_t, paddr_t *);
+void pmap_init(void);
+boolean_t pmap_is_modified(struct vm_page *);
+boolean_t pmap_is_referenced(struct vm_page *);
+void pmap_kenter_pa(vaddr_t, paddr_t, vm_prot_t);
+void pmap_kremove(vaddr_t, vsize_t);
+vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, int);
+int pmap_pa_exists(paddr_t);
+void pmap_page_protect(struct vm_page *, vm_prot_t);
+void pmap_prefer(vaddr_t, vaddr_t *);
+void pmap_proc_iflush(struct proc *, vaddr_t, vsize_t);
+void pmap_protect(pmap_t, vaddr_t, vaddr_t, vm_prot_t);
+void pmap_reference(pmap_t);
+void pmap_release(pmap_t);
+void pmap_redzone(void);
+void pmap_remove(pmap_t, vaddr_t, vaddr_t);
+void pmap_unwire(pmap_t, vaddr_t);
+void pmap_virtual_space(vaddr_t *, vaddr_t *);
+void pmap_writetext(unsigned char *, int);
+void pmap_zero_page(struct vm_page *);
+
+#endif /* _KERNEL */
+
+#endif /* _SOLBOURNE_PMAP_H_ */
diff --git a/sys/arch/solbourne/include/proc.h b/sys/arch/solbourne/include/proc.h
new file mode 100644
index 00000000000..0fe1912ef8e
--- /dev/null
+++ b/sys/arch/solbourne/include/proc.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: proc.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/proc.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/profile.h b/sys/arch/solbourne/include/profile.h
new file mode 100644
index 00000000000..c10d65e80fc
--- /dev/null
+++ b/sys/arch/solbourne/include/profile.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: profile.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/profile.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/prom.h b/sys/arch/solbourne/include/prom.h
new file mode 100644
index 00000000000..1162c4a6586
--- /dev/null
+++ b/sys/arch/solbourne/include/prom.h
@@ -0,0 +1,108 @@
+/* $OpenBSD: prom.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/*
+ * Copyright (c) 2005, Miodrag Vallat
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SOLBOURNE_PROM_H_
+#define _SOLBOURNE_PROM_H_
+
+/*
+ * The following describes the PROM communication structure,
+ * which appears at the beginning of physical memory.
+ */
+
+#define PROM_CODE_PA 0x00000000
+#define PROM_CODE_VA PTW0_BASE
+#define PROM_DATA_PA PHYSMEM_BASE
+#define PROM_DATA_VA PTW1_BASE
+
+struct sb_prom {
+ int sp_interface; /* interface version */
+ int (*sp_interp)(const char *); /* prom commands */
+ char sp_version[128]; /* prom version */
+ int (*sp_eval)(const char *); /* forth commands */
+ int sp_ramdisk; /* ramdisk size if any in MB */
+ int sp_promend; /* first available va */
+ int sp_memsize; /* memory size in pages... */
+ int sp_memsize_mb; /* ...and in MB */
+ int sp_reserve_start; /* reserved area (in pages) */
+ int sp_reserve_len; /* and length (in pages) */
+ vaddr_t sp_msgbufp; /* PROM msgbuf pointer */
+ int sp_sash_usrtrap;
+ int sp_rootnode;
+ int sp_validregs; /* nonzero if registers... */
+ int sp_regs[100]; /* ...array is valid */
+ int sp_revision; /* prom revision */
+};
+
+#define PROM_INTERFACE 4
+
+/*
+ * Reset strings
+ */
+
+#define PROM_RESET_COLD "cold"
+#define PROM_RESET_WARM "warm"
+#define PROM_RESET_HALT "halt"
+
+/*
+ * Environment variables (all upper-case)
+ */
+
+#define ENV_ETHERADDR "ENETADDR"
+#define ENV_INPUTDEVICE "INPUT-DEVICE"
+#define ENV_MODEL "MODEL"
+#define ENV_OUTPUTDEVICE "OUTPUT-DEVICE"
+#define ENV_TTYA "TTYA_MODE"
+#define ENV_TTYB "TTYB_MODE"
+
+/*
+ * Node structures
+ */
+
+struct prom_node {
+ int pn_sibling;
+ int pn_child;
+ vaddr_t pn_props;
+ char *pn_name;
+};
+
+struct prom_prop {
+ struct prom_prop *pp_next;
+ size_t pp_size;
+ char pp_data[0];
+};
+
+/*
+ * System model
+ */
+
+extern int sysmodel;
+
+#define SYS_S4000 0xf4
+#define SYS_S4100 0xf5
+
+const char *prom_getenv(const char *);
+
+#endif /* _SOLBOURNE_PROM_H_ */
diff --git a/sys/arch/solbourne/include/psl.h b/sys/arch/solbourne/include/psl.h
new file mode 100644
index 00000000000..7eff0ac03fa
--- /dev/null
+++ b/sys/arch/solbourne/include/psl.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: psl.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/psl.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/pte.h b/sys/arch/solbourne/include/pte.h
new file mode 100644
index 00000000000..852c8fa92ab
--- /dev/null
+++ b/sys/arch/solbourne/include/pte.h
@@ -0,0 +1,94 @@
+/* $OpenBSD: pte.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/*
+ * Copyright (c) 2005, Miodrag Vallat
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * KAP page table entries.
+ *
+ * Ref/Mod bits are handled in software.
+ */
+
+/*
+ * First-level : Page Directory Tables (topmost 9 bits of a va)
+ *
+ * Page directory entries contain both the pa and the va of the page
+ * tables they point to.
+ */
+
+#define PDT_INDEX_SIZE 9
+#define PDT_INDEX_SHIFT 23
+#define PDT_INDEX_MASK 0xff800000
+
+/*
+ * Second-level: Page Table Entries (middle 10 bits of a va)
+ */
+
+#define PT_INDEX_SIZE 10
+#define PT_INDEX_SHIFT 13
+#define PT_INDEX_MASK 0x007fe000
+
+#define PG_V 0x00000001
+#define PG_NV 0x00000000
+#define PG_RO 0x00000002 /* read only */
+#define PG_RW 0x00000000
+#define PG_PROT (PG_RO | PG_S)
+#define PG_S 0x00000004 /* supervisor only */
+#define PG_MA 0x00000018 /* memory attributes mask */
+#define PG_G 0x00000020 /* global */
+/* software bits from now on... */
+#define PG_W 0x00000040 /* wired */
+#define PG_M 0x00000080 /* modified */
+#define PG_U 0x00000100 /* referenced */
+ /* 0x00001e00 unused */
+#define PG_FRAME 0xffffe000 /* PFN mask */
+
+/* memory attributes */
+#define PG_IO 0x00000000 /* not cached */
+#define PG_CACHE 0x00000008 /* cached */
+#define PG_BYTE_SHARED 0x00000010 /* byte-writeable shared */
+#define PG_SHARED 0x00000018 /* non byte-writeable shared */
+
+/*
+ * Page directory constants
+ */
+
+#define PDT_SIZE 4096 /* size of a page directory table */
+#define PT_SIZE 4096 /* size of a page table */
+
+#define NBR_PDE (PDT_SIZE / 8)
+#define NBR_PTE (PT_SIZE / 4)
+
+#define NBSEG (1 << PDT_INDEX_SHIFT)
+
+#if !defined(_LOCORE)
+
+typedef u_int32_t pt_entry_t;
+
+typedef struct {
+ u_int32_t pde_pa;
+ pt_entry_t* pde_va;
+} pd_entry_t;
+
+#endif
diff --git a/sys/arch/solbourne/include/ptrace.h b/sys/arch/solbourne/include/ptrace.h
new file mode 100644
index 00000000000..f98ebc85393
--- /dev/null
+++ b/sys/arch/solbourne/include/ptrace.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: ptrace.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/ptrace.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/reg.h b/sys/arch/solbourne/include/reg.h
new file mode 100644
index 00000000000..43778ec869d
--- /dev/null
+++ b/sys/arch/solbourne/include/reg.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: reg.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/reg.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/reloc.h b/sys/arch/solbourne/include/reloc.h
new file mode 100644
index 00000000000..9dcc8083866
--- /dev/null
+++ b/sys/arch/solbourne/include/reloc.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: reloc.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/reloc.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/remote-sl.h b/sys/arch/solbourne/include/remote-sl.h
new file mode 100644
index 00000000000..549e4bd9fc4
--- /dev/null
+++ b/sys/arch/solbourne/include/remote-sl.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: remote-sl.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/remote-sl.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/setjmp.h b/sys/arch/solbourne/include/setjmp.h
new file mode 100644
index 00000000000..e6ea931d444
--- /dev/null
+++ b/sys/arch/solbourne/include/setjmp.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: setjmp.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/setjmp.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/signal.h b/sys/arch/solbourne/include/signal.h
new file mode 100644
index 00000000000..ed9a3a7cd59
--- /dev/null
+++ b/sys/arch/solbourne/include/signal.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: signal.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/signal.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/spinlock.h b/sys/arch/solbourne/include/spinlock.h
new file mode 100644
index 00000000000..cf282a73575
--- /dev/null
+++ b/sys/arch/solbourne/include/spinlock.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: spinlock.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/spinlock.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/stdarg.h b/sys/arch/solbourne/include/stdarg.h
new file mode 100644
index 00000000000..fea943b9ac8
--- /dev/null
+++ b/sys/arch/solbourne/include/stdarg.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: stdarg.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/stdarg.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/sun_disklabel.h b/sys/arch/solbourne/include/sun_disklabel.h
new file mode 100644
index 00000000000..39b1b662b75
--- /dev/null
+++ b/sys/arch/solbourne/include/sun_disklabel.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: sun_disklabel.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/sun_disklabel.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/svr4_machdep.h b/sys/arch/solbourne/include/svr4_machdep.h
new file mode 100644
index 00000000000..be706d0bfa5
--- /dev/null
+++ b/sys/arch/solbourne/include/svr4_machdep.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: svr4_machdep.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/svr4_machdep.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/trap.h b/sys/arch/solbourne/include/trap.h
new file mode 100644
index 00000000000..f2532db5cf1
--- /dev/null
+++ b/sys/arch/solbourne/include/trap.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: trap.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/trap.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/types.h b/sys/arch/solbourne/include/types.h
new file mode 100644
index 00000000000..16550ff984b
--- /dev/null
+++ b/sys/arch/solbourne/include/types.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: types.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/types.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/varargs.h b/sys/arch/solbourne/include/varargs.h
new file mode 100644
index 00000000000..ed0bba99118
--- /dev/null
+++ b/sys/arch/solbourne/include/varargs.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: varargs.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/varargs.h> \ No newline at end of file
diff --git a/sys/arch/solbourne/include/vmparam.h b/sys/arch/solbourne/include/vmparam.h
new file mode 100644
index 00000000000..db515f7561b
--- /dev/null
+++ b/sys/arch/solbourne/include/vmparam.h
@@ -0,0 +1,22 @@
+/* $OpenBSD: vmparam.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+
+#ifndef _SOLBOURNE_VMPARAM_H_
+#define _SOLBOURNE_VMPARAM_H_
+
+#include <sparc/vmparam.h>
+
+/*
+ * User/kernel map constants. We slightly differ from sparc here.
+ */
+#undef VM_MIN_KERNEL_ADDRESS
+#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xf8000000)
+#undef VM_MAX_KERNEL_ADDRESS
+#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xfd000000)
+
+#undef IOSPACE_BASE
+#define IOSPACE_BASE ((vaddr_t)0xff000000)
+#undef IOSPACE_LEN
+#define IOSPACE_LEN 0x00f00000 /* 15 MB of iospace */
+
+#endif /* _SOLBOURNE_VMPARAM_H_ */
diff --git a/sys/arch/solbourne/include/z8530var.h b/sys/arch/solbourne/include/z8530var.h
new file mode 100644
index 00000000000..295cb5f5928
--- /dev/null
+++ b/sys/arch/solbourne/include/z8530var.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: z8530var.h,v 1.1 2005/04/19 21:30:18 miod Exp $ */
+/* public domain */
+#include <sparc/z8530var.h> \ No newline at end of file