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authorJason Wright <jason@cvs.openbsd.org>1998-08-26 00:57:08 +0000
committerJason Wright <jason@cvs.openbsd.org>1998-08-26 00:57:08 +0000
commitb8957a20d10b8bea41754a128b781d24771d2a18 (patch)
treed827caefc09f9900a4ea56c60f7bbcaf0704eff7 /sys/arch/sparc/dev/qecreg.h
parentfea06c4caf038d9dc8e6716028b6560bc61fbef6 (diff)
o Fix up address ranges
o Added qec_translate for translating addresses of prom children o Added qec_reset to do a generic reset of the card
Diffstat (limited to 'sys/arch/sparc/dev/qecreg.h')
-rw-r--r--sys/arch/sparc/dev/qecreg.h14
1 files changed, 9 insertions, 5 deletions
diff --git a/sys/arch/sparc/dev/qecreg.h b/sys/arch/sparc/dev/qecreg.h
index f20a5be9431..243ba316b02 100644
--- a/sys/arch/sparc/dev/qecreg.h
+++ b/sys/arch/sparc/dev/qecreg.h
@@ -1,7 +1,8 @@
-/* $OpenBSD: qecreg.h,v 1.1 1998/07/04 07:07:22 deraadt Exp $ */
+/* $OpenBSD: qecreg.h,v 1.2 1998/08/26 00:57:05 jason Exp $ */
/*
- * Copyright (c) 1998 Theo de Raadt. All rights reserved.
+ * Copyright (c) 1998 Theo de Raadt and Jason L. Wright.
+ * All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -11,13 +12,13 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
+ * 3. The name of the authors may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
@@ -36,6 +37,7 @@ struct qecregs {
volatile u_int32_t tsize; /* transmit partition size */
};
+/* qecregs.ctrl: control. */
#define QEC_CTRL_MMODE 0x40000000 /* MACE qec mode */
#define QEC_CTRL_BMODE 0x10000000 /* BE qec mode */
#define QEC_CTRL_EPAR 0x00000020 /* enable parity */
@@ -45,11 +47,13 @@ struct qecregs {
#define QEC_CTRL_B16 0x00000000 /* 16 byte dvma bursts */
#define QEC_CTRL_RESET 0x00000001 /* reset the qec */
+/* qecregs.stat: status. */
#define QEC_STAT_TX 0x00000008 /* bigmac transmit irq */
#define QEC_STAT_RX 0x00000004 /* bigmac receive irq */
#define QEC_STAT_BM 0x00000002 /* bigmac qec irq */
#define QEC_STAT_ER 0x00000001 /* bigmac error irq */
+/* qecregs.stat: packet size. */
#define QEC_PSIZE_2048 0x00 /* 2k packet size */
#define QEC_PSIZE_4096 0x01 /* 4k packet size */
#define QEC_PSIZE_6144 0x10 /* 6k packet size */