diff options
author | Jason Wright <jason@cvs.openbsd.org> | 1999-02-01 13:45:23 +0000 |
---|---|---|
committer | Jason Wright <jason@cvs.openbsd.org> | 1999-02-01 13:45:23 +0000 |
commit | bd0b50c5fc6fb21e3149c54e61969896ee06632a (patch) | |
tree | c0a1464e37916215789e0a30d42c734238dad2ee /sys/arch/sparc/dev/spifreg.h | |
parent | 6d654170d7ad467d265c453859d084f89a594629 (diff) |
modem signal fixups
Diffstat (limited to 'sys/arch/sparc/dev/spifreg.h')
-rw-r--r-- | sys/arch/sparc/dev/spifreg.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/sys/arch/sparc/dev/spifreg.h b/sys/arch/sparc/dev/spifreg.h index f255bbd367c..2d51275167b 100644 --- a/sys/arch/sparc/dev/spifreg.h +++ b/sys/arch/sparc/dev/spifreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: spifreg.h,v 1.1 1999/02/01 00:30:42 jason Exp $ */ +/* $OpenBSD: spifreg.h,v 1.2 1999/02/01 13:45:22 jason Exp $ */ /* * Copyright (c) 1999 Jason L. Wright (jason@thought.net) @@ -241,6 +241,8 @@ struct spifregs { #define CD180_MSVR_DTR 0x02 /* DTR output state */ #define CD180_MSVR_RTS 0x01 /* RTS output state */ +#define CD180_GSCR_CMASK 0x07 /* channel mask */ + #define CD180_GSVR_IMASK 0x07 /* interrupt type mask */ #define CD180_GSVR_NOREQUEST 0x00 /* no request pending */ #define CD180_GSVR_STATCHG 0x01 /* modem signal change */ @@ -252,7 +254,8 @@ struct spifregs { #define CD180_GSVR_RXEXCEPTION 0x07 /* rx exception request */ #define STTY_RX_FIFO_THRESHOLD 6 -#define STTY_RX_DTR_THRESHOLD 9 +#define STTY_RX_DTR_THRESHOLD 7 +#define CD180_TX_FIFO_SIZE 8 /* 8 chars of fifo */ #define CD180_RCSR_TO 0x80 /* time out */ #define CD180_RCSR_SCD2 0x40 /* special char detect 2 */ @@ -263,7 +266,10 @@ struct spifregs { #define CD180_RCSR_FE 0x02 /* framing exception */ #define CD180_RCSR_OE 0x01 /* overrun exception */ -#define CD180_TX_FIFO_SIZE 8 /* 8 chars of fifo */ +#define CD180_MCR_DSR 0x80 /* DSR changed */ +#define CD180_MCR_CD 0x40 /* CD changed */ +#define CD180_MCR_CTS 0x20 /* CTS changed */ + /* * These are the offsets of the MRAR,TRAR, and RRAR in *IACK space. * The high bit must be set as per specs for the MSMR, TSMR, and RSMR. |