Convert sparc console code from rcons and pseudo-devices to rasops and wscons.

For most framebuffers it is faster.

Other changes include:
o 24 bit support in tcx(4) for the S24 framebuffer
o accelerated cgsix(4) text console
o new cgtwelve(4) driver for the GS framebuffer
o improved serial driver code
o better keyboard support

The following framebuffers have not been tested but should work: cgfour,
cgeight and cgfourteen

These changes will require XF4 changes, to use Xwsfb instead of Xsun*, to be
commited later today.

Most of the work by me during the LSM and the week after, with code borrowed
from jason@, NetBSD (new serial code), and feedback from mickey@. Work on
pnozz(4) done by millert@

1 files changed, 47 insertions, 45 deletions

diff --git a/sys/arch/sparc/dev/tcxreg.h b/sys/arch/sparc/dev/tcxreg.h
index ef48a21955c..0324d4c13de 100644
--- a/sys/arch/sparc/dev/tcxreg.h
+++ b/sys/arch/sparc/dev/tcxreg.h
@@ -1,12 +1,13 @@
-/*	$OpenBSD: tcxreg.h,v 1.1 1997/08/08 08:25:32 downsj Exp $	*/
+/*	$OpenBSD: tcxreg.h,v 1.2 2002/08/12 10:44:04 miod Exp $	*/
 /*	$NetBSD: tcxreg.h,v 1.1 1996/06/19 13:17:35 pk Exp $ */
-/* 
+
+/*
  *  Copyright (c) 1996 The NetBSD Foundation, Inc.
  *  All rights reserved.
- * 
+ *
  *  This code is derived from software contributed to The NetBSD Foundation
  *  by Paul Kranenburg.
- * 
+ *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
  *  are met:
@@ -22,7 +23,7 @@
  *  4. Neither the name of The NetBSD Foundation nor the names of its
  *     contributors may be used to endorse or promote products derived
  *     from this software without specific prior written permission.
- * 
+ *
  *  THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  *  TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
@@ -34,7 +35,7 @@
  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  *  POSSIBILITY OF SUCH DAMAGE.
- */ 
+ */
 
 /*
  * A TCX is composed of numerous groups of control registers, all with TLAs:
@@ -73,22 +74,26 @@
  * The layout of the THC.
  */
 struct tcx_thc {
-	u_int	thc_config;
-	u_int	thc_xxx1[31];
-	u_int	thc_sensebus;
-	u_int	thc_xxx2[3];
-	u_int	thc_delay;
-	u_int	thc_strapping;
-	u_int	thc_xxx3[1];
-	u_int	thc_linecount;
-	u_int	thc_xxx4[478];
-	u_int	thc_hcmisc;
-	u_int	thc_xxx5[56];
-	u_int	thc_cursoraddr;
-	u_int	thc_cursorAdata[32];
-	u_int	thc_cursorBdata[32];
+	u_int32_t	thc_config;
+	u_int32_t	thc_xxx1[31];
+	u_int32_t	thc_sensebus;
+	u_int32_t	thc_xxx2[3];
+	u_int32_t	thc_delay;
+	u_int32_t	thc_strapping;
+	u_int32_t	thc_xxx3[1];
+	u_int32_t	thc_linecount;
+	u_int32_t	thc_xxx4[478];
+	u_int32_t	thc_hcmisc;
+	u_int32_t	thc_xxx5[56];
+	u_int32_t	thc_cursoraddr;
+	u_int32_t	thc_cursorAdata[32];
+	u_int32_t	thc_cursorBdata[32];
 
 };
+
+/* cursor x/y position for 'off' */
+#define	THC_CURSOFF		((65536-32) | ((65536-32) << 16))
+
 /* bits in thc_config ??? */
 #define THC_CFG_FBID		0xf0000000	/* id mask */
 #define THC_CFG_FBID_SHIFT	28
@@ -105,47 +110,44 @@ struct tcx_thc {
 #define	THC_MISC_HSYNC_LEVEL	0x04000000	/* hsync level when disabled */
 #define	THC_MISC_VSYNC_DISABLE	0x02000000	/* vsync disable */
 #define	THC_MISC_HSYNC_DISABLE	0x01000000	/* hsync disable */
-#define	THC_MISC_XXX1		0x00ffe000	/* unused */
-#define	THC_MISC_RESET		0x00001000	/* ??? */
-#define	THC_MISC_XXX2		0x00000800	/* unused */
+#define	THC_MISC_RESET		0x00001000	/* reset */
 #define	THC_MISC_VIDEN		0x00000400	/* video enable */
 #define	THC_MISC_SYNC		0x00000200	/* not sure what ... */
 #define	THC_MISC_VSYNC		0x00000100	/* ... these really are */
 #define	THC_MISC_SYNCEN		0x00000080	/* sync enable */
 #define	THC_MISC_CURSRES	0x00000040	/* cursor resolution */
 #define	THC_MISC_INTEN		0x00000020	/* v.retrace intr enable */
-#define	THC_MISC_INTR		0x00000010	/* intr pending / ack bit */
-#define	THC_MISC_DACWAIT	0x0000000f	/* ??? */
+#define	THC_MISC_INTR		0x00000010	/* intr pending / ack */
+#define	THC_MISC_DACWAIT	0x0000000f	/* cycles before transfer */
 
 /*
  * Partial description of TEC.
  */
 struct tcx_tec {
-	u_int	tec_config;	/* what's in it? */
-	u_int	tec_xxx0[35];
-	u_int	tec_delay;	/* */
+	u_int32_t	tec_config;	/* what's in it? */
+	u_int32_t	tec_xxx0[35];
+	u_int32_t	tec_delay;	/* */
 #define TEC_DELAY_SYNC		0x00000f00
-#define TEC_DELAY_WR_F		0x000000c0
-#define TEC_DELAY_WR_R		0x00000030
-#define TEC_DELAY_SOE_F		0x0000000c
-#define TEC_DELAY_SOE_S		0x00000003
-	u_int	tec_strapping;	/* */
+#define TEC_DELAY_WR_F		0x000000c0	/* wr falling */
+#define TEC_DELAY_WR_R		0x00000030	/* wr rising */
+#define TEC_DELAY_SOE_F		0x0000000c	/* soe falling */
+#define TEC_DELAY_SOE_S		0x00000003	/* soe sclk */
+	u_int32_t	tec_strapping;	/* */
 #define TEC_STRAP_FIFO_LIMIT	0x00f00000
 #define TEC_STRAP_CACHE_EN	0x00010000
 #define TEC_STRAP_ZERO_OFFSET	0x00008000
 #define TEC_STRAP_REFRSH_DIS	0x00004000
 #define TEC_STRAP_REF_LOAD	0x00001000
 #define TEC_STRAP_REFRSH_PERIOD	0x000003ff
-	u_int	tec_hcmisc;	/* */
-	u_int	tec_linecount;	/* */
-	u_int	tec_hss;	/* */
-	u_int	tec_hse;	/* */
-	u_int	tec_hds;	/* */
-	u_int	tec_hsedvs;	/* */
-	u_int	tec_hde;	/* */
-	u_int	tec_vss;	/* */
-	u_int	tec_vse;	/* */
-	u_int	tec_vds;	/* */
-	u_int	tec_vde;	/* */
+	u_int32_t	tec_hcmisc;	/* */
+	u_int32_t	tec_linecount;	/* */
+	u_int32_t	tec_hss;	/* */
+	u_int32_t	tec_hse;	/* */
+	u_int32_t	tec_hds;	/* */
+	u_int32_t	tec_hsedvs;	/* */
+	u_int32_t	tec_hde;	/* */
+	u_int32_t	tec_vss;	/* */
+	u_int32_t	tec_vse;	/* */
+	u_int32_t	tec_vds;	/* */
+	u_int32_t	tec_vde;	/* */
 };
-