Fix an ancient problem in how sparc interrupts are handled.

There are many interrupt handlers that assume that they don't need to do
any spl protection in their code because the interrupt of some level can't
be interrupted by an interrupt of the same level. The problem is that some
interrupt handlers have hardware levels that are lower then their "software"
levels.

Fix this by adding an additional field to struct intrhand that specifies which
"software" level an interrupt handler has and blocks that level while handling
the interrupt. This new field is initialized in intr_establish which gets
an additional argument (which can be -1 meaning that the interrupt handler
doesn't need to block any additional level).

ok deraadt@

1 files changed, 3 insertions, 3 deletions

diff --git a/sys/arch/sparc/dev/zs.c b/sys/arch/sparc/dev/zs.c
index d535aa8ae39..939d920573a 100644
--- a/sys/arch/sparc/dev/zs.c
+++ b/sys/arch/sparc/dev/zs.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: zs.c,v 1.34 2002/04/28 03:51:19 art Exp $	*/
+/*	$OpenBSD: zs.c,v 1.35 2002/04/30 01:12:29 art Exp $	*/
 /*	$NetBSD: zs.c,v 1.49 1997/08/31 21:26:37 pk Exp $ */
 
 /*
@@ -296,8 +296,8 @@ zsattach(parent, dev, aux)
 	if (!didintr) {
 		didintr = 1;
 		prevpri = pri;
-		intr_establish(pri, &levelhard);
-		intr_establish(IPL_TTY, &levelsoft);
+		intr_establish(pri, &levelhard, IPL_ZS);
+		intr_establish(IPL_TTY, &levelsoft, IPL_TTY);
 	} else if (pri != prevpri)
 		panic("broken zs interrupt scheme");
 	sc = (struct zs_softc *)dev;