first cut at a bpp driver; mailed to me by downsj eons ago

2 files changed, 445 insertions, 0 deletions

diff --git a/sys/arch/sparc/dev/bpp.c b/sys/arch/sparc/dev/bpp.c
new file mode 100644
index 00000000000..72c34eb881f
--- /dev/null
+++ b/sys/arch/sparc/dev/bpp.c
@@ -0,0 +1,306 @@
+/*
+ * Copyright (c) 1997, Jason Downs.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Jason Downs for the
+ *      OpenBSD system.
+ * 4. Neither the name(s) of the author(s) nor the name OpenBSD
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR(S) BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/buf.h>
+#include <sys/kernel.h>
+#include <sys/uio.h>
+#include <sys/device.h>
+#include <sys/conf.h>
+#include <sys/systm.h>
+
+#include <machine/autoconf.h>
+#include <machine/conf.h>
+
+#include <sparc/dev/bppreg.h>
+
+#define BPP_BSIZE	1024
+
+#define LONG_TIMEOUT	30		/* XXX */
+#define SHORT_TIMEOUT	3		/* XXX */
+
+struct bpp_softc {
+	struct device sc_dev;
+
+	size_t sc_count;
+	struct buf *sc_inbuf;
+	u_int8_t *sc_cp;
+
+	char sc_open;
+
+	volatile struct bppregs *sc_regs;
+};
+
+static int bppmatch __P((struct device *, void *, void *));
+static void bppattach __P((struct device *, struct device *, void *));
+
+#define BPPUNIT(s)	minor(s)
+
+struct cfattach bpp_ca = {
+	sizeof(struct bpp_softc), bppmatch, bppattach
+};
+
+struct cfdriver bpp_cd = {
+	NULL, "bpp", DV_DULL
+};
+
+static __inline__ void bpp_outb __P((struct bpp_softc *, u_int8_t));
+static __inline__ u_int8_t bpp_inb __P((struct bpp_softc *));
+static void bppreset __P((struct bpp_softc *, int));
+static void bppresetmode __P((struct bpp_softc *));
+static int bpppushbytes __P((struct bpp_softc *));
+
+static int
+bppmatch(parent, vcf, aux)
+	struct device *parent;
+	void *aux, *vcf;
+{
+	register struct confargs *ca = aux;
+
+	if (strcmp(ca->ca_ra.ra_name, "SUNW,bpp"))
+		return (0);
+
+	return (1);
+}
+
+static void
+bppattach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct confargs *ca = aux;
+	struct romaux *ra = &ca->ca_ra;
+	struct bpp_softc *bpp = (void *)self;
+
+	bpp->sc_regs = mapiodev(ra->ra_reg, 0, ra->ra_len);
+
+	bppreset(bpp, 0);
+
+	switch (bpp->sc_regs->bpp_csr & BPP_DEV_ID_MASK) {
+	case BPP_DEV_ID_ZEBRA:
+		printf(": Zebra\n");
+		break;
+	case BPP_DEV_ID_L64854:
+		printf(": DMA2\n");
+		break;
+	default:
+		printf(": Unknown type\n");
+		break;
+	}
+
+	bppresetmode(bpp);
+}
+
+static void
+bppreset(bpp, verbose)
+	struct bpp_softc *bpp;
+	int verbose;
+{
+	volatile u_int32_t bpp_csr;
+
+	/* Reset hardware. */
+	bpp_csr = bpp->sc_regs->bpp_csr;
+	if ((bpp_csr & BPP_DRAINING) && !(bpp_csr & BPP_ERR_PEND)) {
+		delay(20);
+
+		bpp_csr = bpp->sc_regs->bpp_csr;
+		if (verbose && (bpp_csr & BPP_DRAINING) &&
+		    !(bpp_csr & BPP_ERR_PEND))
+			printf("%s: draining still active (0x%08x)\n",
+			    bpp->sc_dev.dv_xname, bpp_csr);
+	}
+	bpp->sc_regs->bpp_csr = (bpp_csr | BPP_RESET) & ~BPP_INT_EN;
+	delay(500);
+	bpp->sc_regs->bpp_csr &= ~BPP_RESET;
+}
+
+static void
+bppresetmode(bpp)
+	struct bpp_softc *bpp;
+{
+	bpp->sc_regs->bpp_or = BPP_OR_AFXN|BPP_OR_SLCT_IN;
+	bpp->sc_regs->bpp_tcr = BPP_TCR_DS;
+}
+
+static __inline__ void
+bpp_outb(bpp, byte)
+	struct bpp_softc *bpp;
+	u_int8_t byte;
+{
+	bpp->sc_regs->bpp_dr = byte;
+}
+
+static __inline__ u_int8_t
+bpp_inb(bpp)
+	struct bpp_softc *bpp;
+{
+	return (bpp->sc_regs->bpp_dr);
+}
+
+int
+bppopen(dev, flag, mode, p)
+	dev_t dev;
+	int flag, mode;
+	struct proc *p;
+{
+	int unit = BPPUNIT(dev);
+	struct bpp_softc *bpp;
+
+	if (unit >= bpp_cd.cd_ndevs)
+		return (ENXIO);
+	bpp = bpp_cd.cd_devs[unit];
+	if (!bpp)
+		return (ENXIO);
+
+	if (bpp->sc_open)
+		return (EBUSY);
+
+	bpp->sc_inbuf = geteblk(BPP_BSIZE);
+	bpp->sc_count = 0;
+	bpp->sc_open = 1;
+
+	/* bppreset(bpp, 1); */
+	bppresetmode(bpp);
+
+	return (0);
+}
+
+int
+bppclose(dev, flag, mode, p)
+	dev_t dev;
+	int flag, mode;
+	struct proc *p;
+{
+	struct bpp_softc *bpp = bpp_cd.cd_devs[BPPUNIT(dev)];
+	int error = 0;
+
+	if (bpp->sc_count)
+		(void) bpppushbytes(bpp);
+
+	/* XXX */
+	bppresetmode(bpp);
+	delay(100);
+	bppreset(bpp, 1);
+	delay(100);
+	bppresetmode(bpp);
+
+	brelse(bpp->sc_inbuf);
+
+	bpp->sc_open = 0;
+	return (error);
+}
+
+int
+bpppushbytes(bpp)
+	struct bpp_softc *bpp;
+{
+	int spin, error;
+
+	while (bpp->sc_count > 0) {
+		error = 0;
+
+		/* Wait for BPP_TCR_ACK and BPP_TCR_BUSY to clear. */
+		spin = 0;
+		while ((bpp->sc_regs->bpp_tcr & BPP_TCR_ACK) ||
+		    (bpp->sc_regs->bpp_tcr & BPP_TCR_BUSY)) {
+			delay(1000);
+			if (++spin >= LONG_TIMEOUT)
+				break;
+		}
+		
+		if ((bpp->sc_regs->bpp_tcr & BPP_TCR_ACK) ||
+		    (bpp->sc_regs->bpp_tcr & BPP_TCR_BUSY))
+			return (EBUSY);
+
+		bpp_outb(bpp, *bpp->sc_cp++);
+
+		/* Clear BPP_TCR_DS. */
+		bpp->sc_regs->bpp_tcr &= ~BPP_TCR_DS;
+
+		/* Short wait for BPP_TCR_BUSY. */
+		spin = 0;
+		while (!(bpp->sc_regs->bpp_tcr & BPP_TCR_BUSY)) {
+			delay(1000);
+			if (++spin >= SHORT_TIMEOUT)
+				break;
+		}
+		if (!(bpp->sc_regs->bpp_tcr & BPP_TCR_BUSY))
+			error = EIO;
+
+		/* Set BPP_TCR_DS. */
+		bpp->sc_regs->bpp_tcr |= BPP_TCR_DS;
+
+		if (error)
+			return (error);
+
+		bpp->sc_count--;
+	}
+	return (error);
+}
+
+int
+bppwrite(dev, uio, flags)
+	dev_t dev;
+	struct uio *uio;
+	int flags;
+{
+	struct bpp_softc *bpp = bpp_cd.cd_devs[BPPUNIT(dev)];
+	size_t n;
+	int error = 0;
+
+	while ((n = min(BPP_BSIZE, uio->uio_resid)) != 0) {
+		uiomove(bpp->sc_cp = bpp->sc_inbuf->b_data, n, uio);
+		bpp->sc_count = n;
+		error = bpppushbytes(bpp);
+		if (error) {
+			/*
+			 * Return accurate residual if interrupted or timed
+			 * out.
+			 */
+			uio->uio_resid += bpp->sc_count;
+			bpp->sc_count = 0;
+			return (error);
+		}
+	}
+	return (0);
+}
+
+int
+bppioctl(dev, cmd, data, flag, p)
+	dev_t dev;
+	u_long cmd;
+	caddr_t data;
+	int flag;
+	struct proc *p;
+{
+	return (ENODEV);
+}
diff --git a/sys/arch/sparc/dev/bppreg.h b/sys/arch/sparc/dev/bppreg.h
new file mode 100644
index 00000000000..fe3d7e5c6a4
--- /dev/null
+++ b/sys/arch/sparc/dev/bppreg.h
@@ -0,0 +1,139 @@
+/*
+ * Copyright (c) 1997, Jason Downs.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Jason Downs for the
+ *      OpenBSD system.
+ * 4. Neither the name(s) of the author(s) nor the name OpenBSD
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR(S) BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * based on work by Stephen Williams, Gus Baldauf, and Peter Zaitcev
+ */
+
+/*
+ * BPP Register Block
+ */
+struct bppregs {
+
+	volatile u_int32_t	bpp_csr;
+	volatile u_int32_t	bpp_addr;
+	volatile u_int32_t	bpp_bcnt;
+	volatile u_int32_t	bpp_tst_csr;
+
+	volatile u_int16_t	bpp_hcr;
+	volatile u_int16_t	bpp_ocr;
+	volatile u_int8_t	bpp_dr;
+	volatile u_int8_t	bpp_tcr;
+	volatile u_int8_t	bpp_or;
+	volatile u_int8_t	bpp_ir;
+	volatile u_int16_t	bpp_icr;
+};
+
+
+#define BPP_DEV_ID_MASK		0xf0000000
+#define BPP_DEV_ID_ZEBRA	0x40000000
+#define BPP_DEV_ID_L64854	0xa0000000
+#define BPP_NA_LOADED		0x08000000
+#define BPP_A_LOADED		0x04000000
+#define BPP_DMA_ON		0x02000000
+#define BPP_EN_NEXT		0x01000000
+#define BPP_TCI_DIS		0x00800000
+#define BPP_DIAG		0x00100000
+
+#define BPP_BURST_SIZE		0x000c0000
+#define BPP_BURST_8		0x00000000
+#define BPP_BURST_4		0x00040000
+#define BPP_BURST_1		0x00080000
+#define BPP_TC			0x00004000
+
+#define BPP_EN_CNT		0x00002000
+#define BPP_EN_DMA		0x00000200
+#define BPP_WRITE		0x00000100
+#define BPP_RESET		0x00000080
+#define BPP_SLAVE_ERR		0x00000040
+#define BPP_INVALIDATE		0x00000020
+#define BPP_INT_EN		0x00000010
+#define BPP_DRAINING		0x0000000c
+
+#define BPP_ERR_PEND		0x00000002
+#define BPP_INT_PEND		0x00000001
+
+
+#define BPP_HCR_TEST		0x8000
+#define BPP_HCR_DSW		0x7f00
+#define BPP_HCR_DDS		0x007f
+
+
+#define BPP_OCR_MEM_CLR		0x8000
+#define BPP_OCR_DATA_SRC	0x4000
+#define BPP_OCR_DS_DSEL		0x2000
+#define BPP_OCR_BUSY_DSEL	0x1000
+#define BPP_OCR_ACK_DSEL	0x0800
+#define BPP_OCR_EN_DIAG		0x0400
+#define BPP_OCR_BUSY_OP		0x0200
+#define BPP_OCR_ACK_OP		0x0100
+#define BPP_OCR_SRST		0x0080
+#define BPP_OCR_IDLE		0x0008
+#define BPP_OCR_V_ILCK		0x0002
+#define BPP_OCR_EN_VER		0x0001
+
+
+#define BPP_TCR_DIR		0x08
+#define BPP_TCR_BUSY		0x04
+#define BPP_TCR_ACK		0x02
+#define BPP_TCR_DS		0x01
+
+
+#define BPP_OR_V3		0x20
+#define BPP_OR_V2		0x10
+#define BPP_OR_V1		0x08
+#define BPP_OR_INIT		0x04
+#define BPP_OR_AFXN		0x02
+#define BPP_OR_SLCT_IN		0x01
+
+
+#define BPP_IR_PE		0x04
+#define BPP_IR_SLCT		0x02
+#define BPP_IR_ERR		0x01
+
+
+#define BPP_DS_IRQ		0x8000
+#define BPP_ACK_IRQ		0x4000
+#define BPP_BUSY_IRQ		0x2000
+#define BPP_PE_IRQ		0x1000
+#define BPP_SLCT_IRQ		0x0800
+#define BPP_ERR_IRQ		0x0400
+#define BPP_DS_IRQ_EN		0x0200
+#define BPP_ACK_IRQ_EN		0x0100
+#define BPP_BUSY_IRP		0x0080
+#define BPP_BUSY_IRQ_EN		0x0040
+#define BPP_PE_IRP		0x0020
+#define BPP_PE_IRQ_EN		0x0010
+#define BPP_SLCT_IRP		0x0008
+#define BPP_SLCT_IRQ_EN		0x0004
+#define BPP_ERR_IRP		0x0002
+#define BPP_ERR_IRQ_EN		0x0001