diff options
author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2010-05-09 19:50:08 +0000 |
---|---|---|
committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2010-05-09 19:50:08 +0000 |
commit | 3dff9eca2a7c1d832c3ae18c961265cabc38e4c9 (patch) | |
tree | 92a755e1f832c962fb6c90a8c605efbefb0368a7 /sys/arch/sparc64/fpu | |
parent | 2da43c9c9021477b2c3852460f26ea8ba0bbb4cb (diff) |
Rename round() to fpu_round(). This matches the m68k code from which this
code is derived and makes gcc4 happy by avoiding a conflict with the builtin
for the standard C99 round(3).
ok miod@
Diffstat (limited to 'sys/arch/sparc64/fpu')
-rw-r--r-- | sys/arch/sparc64/fpu/fpu_implode.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/sys/arch/sparc64/fpu/fpu_implode.c b/sys/arch/sparc64/fpu/fpu_implode.c index c693bfef777..66f02b523de 100644 --- a/sys/arch/sparc64/fpu/fpu_implode.c +++ b/sys/arch/sparc64/fpu/fpu_implode.c @@ -1,4 +1,4 @@ -/* $OpenBSD: fpu_implode.c,v 1.6 2006/06/21 19:24:38 jason Exp $ */ +/* $OpenBSD: fpu_implode.c,v 1.7 2010/05/09 19:50:07 kettenis Exp $ */ /* $NetBSD: fpu_implode.c,v 1.7 2000/08/03 18:32:08 eeh Exp $ */ /* @@ -57,7 +57,7 @@ #include <sparc64/fpu/fpu_emu.h> #include <sparc64/fpu/fpu_extern.h> -static int round(register struct fpemu *, register struct fpn *); +static int fpu_round(register struct fpemu *, register struct fpn *); static int toinf(struct fpemu *, int); /* @@ -73,7 +73,7 @@ static int toinf(struct fpemu *, int); * responsibility to fix this if necessary. */ static int -round(register struct fpemu *fe, register struct fpn *fp) +fpu_round(register struct fpemu *fe, register struct fpn *fp) { register u_int m0, m1, m2, m3; register int gr, s; @@ -341,7 +341,7 @@ fpu_ftos(fe, fp) if ((exp = fp->fp_exp + SNG_EXP_BIAS) <= 0) { /* subnormal */ /* -NG for g,r; -SNG_FRACBITS-exp for fraction */ (void) fpu_shr(fp, FP_NMANT - FP_NG - SNG_FRACBITS - exp); - if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(1)) + if (fpu_round(fe, fp) && fp->fp_mant[3] == SNG_EXP(1)) return (sign | SNG_EXP(1) | 0); if ((fe->fe_cx & FSR_NX) || (fe->fe_fsr & (FSR_UF << FSR_TEM_SHIFT))) @@ -354,7 +354,7 @@ fpu_ftos(fe, fp) if ((fp->fp_mant[3] & SNG_EXP(1 << FP_NG)) == 0) panic("fpu_ftos"); #endif - if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(2)) + if (fpu_round(fe, fp) && fp->fp_mant[3] == SNG_EXP(2)) exp++; if (exp >= SNG_EXP_INFNAN) { /* overflow to inf or to max single */ @@ -402,7 +402,7 @@ zero: res[1] = 0; if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) { (void) fpu_shr(fp, FP_NMANT - FP_NG - DBL_FRACBITS - exp); - if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) { + if (fpu_round(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) { res[1] = 0; return (sign | DBL_EXP(1) | 0); } @@ -413,7 +413,7 @@ zero: res[1] = 0; goto done; } (void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - DBL_FRACBITS); - if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(2)) + if (fpu_round(fe, fp) && fp->fp_mant[2] == DBL_EXP(2)) exp++; if (exp >= DBL_EXP_INFNAN) { fe->fe_cx |= FSR_OF | FSR_NX; @@ -463,7 +463,7 @@ zero: res[1] = res[2] = res[3] = 0; if ((exp = fp->fp_exp + EXT_EXP_BIAS) <= 0) { (void) fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS - exp); - if (round(fe, fp) && fp->fp_mant[0] == EXT_EXP(1)) { + if (fpu_round(fe, fp) && fp->fp_mant[0] == EXT_EXP(1)) { res[1] = res[2] = res[3] = 0; return (sign | EXT_EXP(1) | 0); } @@ -474,7 +474,7 @@ zero: res[1] = res[2] = res[3] = 0; goto done; } /* Since internal == extended, no need to shift here. */ - if (round(fe, fp) && fp->fp_mant[0] == EXT_EXP(2)) + if (fpu_round(fe, fp) && fp->fp_mant[0] == EXT_EXP(2)) exp++; if (exp >= EXT_EXP_INFNAN) { fe->fe_cx |= FSR_OF | FSR_NX; |