More debugging stuff.

2 files changed, 23 insertions, 9 deletions

diff --git a/sys/arch/sparc64/fpu/fpu_explode.c b/sys/arch/sparc64/fpu/fpu_explode.c
index 2cc92a1fbef..bf059d82703 100644
--- a/sys/arch/sparc64/fpu/fpu_explode.c
+++ b/sys/arch/sparc64/fpu/fpu_explode.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fpu_explode.c,v 1.1 2001/09/08 22:33:51 jason Exp $	*/
+/*	$OpenBSD: fpu_explode.c,v 1.2 2001/09/10 16:05:17 jason Exp $	*/
 /*	$NetBSD: fpu_explode.c,v 1.5 2000/08/03 18:32:08 eeh Exp $ */
 
 /*
@@ -115,9 +115,9 @@ fpu_xtof(fp, i)
 	register struct fpn *fp;
 	register u_int64_t i;
 {
-
 	if (i == 0)
 		return (FPC_ZERO);
+
 	/*
 	 * The value FP_1 represents 2^FP_LG, so set the exponent
 	 * there and let normalization fix it up.  Convert negative
@@ -258,32 +258,40 @@ fpu_explode(fe, fp, type, reg)
 	s = space[0];
 	fp->fp_sign = s >> 31;
 	fp->fp_sticky = 0;
+	DPRINTF(FPE_INSN, ("fpu_explode: "));
 	switch (type) {
 #ifdef SUN4U
 	case FTYPE_LNG:
+		DPRINTF(FPE_INSN, ("LNG: %llx", l));
 		s = fpu_xtof(fp, l);
 		break;
 #endif /* SUN4U */
 
 	case FTYPE_INT:
+		DPRINTF(FPE_INSN, ("INT: %x", s));
 		s = fpu_itof(fp, s);
 		break;
 
 	case FTYPE_SNG:
+		DPRINTF(FPE_INSN, ("SNG: %x", s));
 		s = fpu_stof(fp, s);
 		break;
 
 	case FTYPE_DBL:
+		DPRINTF(FPE_INSN, ("DBL: %x %x", s, space[1]));
 		s = fpu_dtof(fp, s, space[1]);
 		break;
 
 	case FTYPE_EXT:
+		DPRINTF(FPE_INSN, ("EXT: %x %x %x %x", s, space[1],
+		    space[2], space[3]));
 		s = fpu_qtof(fp, s, space[1], space[2], space[3]);
 		break;
 
 	default:
 		panic("fpu_explode");
 	}
+	DPRINTF(FPE_INSN, ("\n"));
 
 	if (s == FPC_QNAN && (fp->fp_mant[0] & FP_QUIETBIT) == 0) {
 		/*
@@ -299,11 +307,11 @@ fpu_explode(fe, fp, type, reg)
 	}
 	fp->fp_class = s;
 	DPRINTF(FPE_REG, ("fpu_explode: %%%c%d => ", (type == FTYPE_LNG) ? 'x' :
-		((type == FTYPE_INT) ? 'i' : 
-			((type == FTYPE_SNG) ? 's' :
-				((type == FTYPE_DBL) ? 'd' :
-					((type == FTYPE_EXT) ? 'q' : '?')))), 
-		reg));
+	    ((type == FTYPE_INT) ? 'i' : 
+		((type == FTYPE_SNG) ? 's' :
+		    ((type == FTYPE_DBL) ? 'd' :
+			((type == FTYPE_EXT) ? 'q' : '?')))), 
+	    reg));
 	DUMPFPN(FPE_REG, fp);
 	DPRINTF(FPE_REG, ("\n"));
 }
diff --git a/sys/arch/sparc64/fpu/fpu_implode.c b/sys/arch/sparc64/fpu/fpu_implode.c
index dc52cd2ef68..4ca1187b361 100644
--- a/sys/arch/sparc64/fpu/fpu_implode.c
+++ b/sys/arch/sparc64/fpu/fpu_implode.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fpu_implode.c,v 1.2 2001/09/09 00:35:48 jason Exp $	*/
+/*	$OpenBSD: fpu_implode.c,v 1.3 2001/09/10 16:05:17 jason Exp $	*/
 /*	$NetBSD: fpu_implode.c,v 1.7 2000/08/03 18:32:08 eeh Exp $ */
 
 /*
@@ -508,30 +508,36 @@ fpu_implode(fe, fp, type, space)
 	int type;
 	register u_int *space;
 {
-
+	DPRINTF(FPE_INSN, ("fpu_implode: "));
 	switch (type) {
 
 #ifdef SUN4U
 	case FTYPE_LNG:
 		space[0] = fpu_ftox(fe, fp, space);
+		DPRINTF(FPE_INSN, ("LNG %x %x\n", space[0], space[1]));
 		break;
 #endif /* SUN4U */
 
 	case FTYPE_INT:
 		space[0] = fpu_ftoi(fe, fp);
+		DPRINTF(FPE_INSN, ("INT %x\n", space[0]));
 		break;
 
 	case FTYPE_SNG:
 		space[0] = fpu_ftos(fe, fp);
+		DPRINTF(FPE_INSN, ("SNG %x\n", space[0]));
 		break;
 
 	case FTYPE_DBL:
 		space[0] = fpu_ftod(fe, fp, space);
+		DPRINTF(FPE_INSN, ("DBL %x %x\n", space[0], space[1]));
 		break;
 
 	case FTYPE_EXT:
 		/* funky rounding precision options ?? */
 		space[0] = fpu_ftoq(fe, fp, space);
+		DPRINTF(FPE_INSN, ("EXT %x %x %x %x\n", space[0], space[1],
+		    space[2], space[3]));
 		break;
 
 	default: