First step at unifying qe & be drivers:

o qe & be drivers now only access qec globals directly at interrupt time
o more initialization done in qec_reset
o qe & be drivers handle the qec internal buffer identically
o nuked unused variables

7 files changed, 104 insertions, 112 deletions

diff --git a/sys/arch/sparc/dev/be.c b/sys/arch/sparc/dev/be.c
index 0b2b55e1479..16fac1dd2fd 100644
--- a/sys/arch/sparc/dev/be.c
+++ b/sys/arch/sparc/dev/be.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: be.c,v 1.17 1998/10/21 04:12:09 jason Exp $	*/
+/*	$OpenBSD: be.c,v 1.18 1998/11/02 05:50:59 jason Exp $	*/
 
 /*
  * Copyright (c) 1998 Theo de Raadt and Jason L. Wright.
@@ -148,8 +148,9 @@ beattach(parent, self, aux)
 	sc->sc_qr = qec->sc_regs;
 	bestop(sc);
 
-	sc->sc_mem = qec->sc_buffer;
-	sc->sc_memsize = qec->sc_bufsiz;
+	sc->sc_channel = getpropint(ca->ca_ra.ra_node, "channel#", -1);
+	if (sc->sc_channel == -1)
+		sc->sc_channel = 0;
 
 	sc->sc_burst = getpropint(ca->ca_ra.ra_node, "burst-sizes", -1);
 	if (sc->sc_burst == -1)
@@ -682,6 +683,9 @@ void
 beinit(sc)
 	struct besoftc *sc;
 {
+	struct be_bregs *br = sc->sc_br;
+	struct be_cregs *cr = sc->sc_cr;
+	struct qec_softc *qec = sc->sc_qec;
 	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
 	int s = splimp();
 	int i;
@@ -689,21 +693,6 @@ beinit(sc)
 	sc->sc_nticks = 0;
 
 	/*
-	 * init QEC: 'be' specific initializations
-	 */
-	sc->sc_qr->msize = sc->sc_memsize;
-	sc->sc_qr->rsize = sc->sc_memsize / 2;
-	sc->sc_qr->tsize = sc->sc_memsize / 2;
-	sc->sc_qr->psize = QEC_PSIZE_2048;
-	if (sc->sc_burst & SBUS_BURST_64)
-		i = QEC_CTRL_B64;
-	else if (sc->sc_burst & SBUS_BURST_32)
-		i = QEC_CTRL_B32;
-	else
-		i = QEC_CTRL_B16;
-	sc->sc_qr->ctrl = QEC_CTRL_BMODE | i;
-
-	/*
 	 * Allocate descriptor ring and buffers, if not already done
 	 */
 	if (sc->sc_desc == NULL)
@@ -738,62 +727,60 @@ beinit(sc)
 
 	bestop(sc);
 
-	sc->sc_br->mac_addr2 = (sc->sc_arpcom.ac_enaddr[4] << 8) |
+	br->mac_addr2 = (sc->sc_arpcom.ac_enaddr[4] << 8) |
 	    sc->sc_arpcom.ac_enaddr[5];
-	sc->sc_br->mac_addr1 = (sc->sc_arpcom.ac_enaddr[2] << 8) |
+	br->mac_addr1 = (sc->sc_arpcom.ac_enaddr[2] << 8) |
 	    sc->sc_arpcom.ac_enaddr[3];
-	sc->sc_br->mac_addr0 = (sc->sc_arpcom.ac_enaddr[0] << 8) |
+	br->mac_addr0 = (sc->sc_arpcom.ac_enaddr[0] << 8) |
 	    sc->sc_arpcom.ac_enaddr[1];
 
-	sc->sc_br->htable3 = 0;
-	sc->sc_br->htable2 = 0;
-	sc->sc_br->htable1 = 0;
-	sc->sc_br->htable0 = 0;
+	br->htable3 = 0;
+	br->htable2 = 0;
+	br->htable1 = 0;
+	br->htable0 = 0;
 
-	sc->sc_br->rx_cfg = BE_BR_RXCFG_HENABLE | BE_BR_RXCFG_FIFO;
+	br->rx_cfg = BE_BR_RXCFG_HENABLE | BE_BR_RXCFG_FIFO;
 	DELAY(20);
 
-	sc->sc_br->tx_cfg = BE_BR_TXCFG_FIFO;
-	sc->sc_br->rand_seed = 0xbd;
+	br->tx_cfg = BE_BR_TXCFG_FIFO;
+	br->rand_seed = 0xbd;
 
-	sc->sc_br->xif_cfg = BE_BR_XCFG_ODENABLE | BE_BR_XCFG_RESV;
+	br->xif_cfg = BE_BR_XCFG_ODENABLE | BE_BR_XCFG_RESV;
 
-	sc->sc_cr->rxds = (u_int32_t) &sc->sc_desc_dva->be_rxd[0];
-	sc->sc_cr->txds = (u_int32_t) &sc->sc_desc_dva->be_txd[0];
+	cr->rxds = (u_int32_t) &sc->sc_desc_dva->be_rxd[0];
+	cr->txds = (u_int32_t) &sc->sc_desc_dva->be_txd[0];
 
-	sc->sc_cr->rxwbufptr = 0;
-	sc->sc_cr->rxrbufptr = 0;
-	sc->sc_cr->txwbufptr = sc->sc_qr->tsize;
-	sc->sc_cr->txrbufptr = sc->sc_qr->tsize;
+	cr->rxwbufptr = cr->rxrbufptr = sc->sc_channel * qec->sc_msize;
+	cr->txwbufptr = cr->txrbufptr = cr->rxrbufptr + qec->sc_rsize;
 
 	/*
 	 * Turn off counter expiration interrupts as well as
 	 * 'gotframe' and 'sentframe'
 	 */
-	sc->sc_br->imask = BE_BR_IMASK_GOTFRAME	|
-			   BE_BR_IMASK_RCNTEXP	|
-			   BE_BR_IMASK_ACNTEXP	|
-			   BE_BR_IMASK_CCNTEXP	|
-			   BE_BR_IMASK_LCNTEXP	|
-			   BE_BR_IMASK_CVCNTEXP	|
-			   BE_BR_IMASK_SENTFRAME|
-			   BE_BR_IMASK_NCNTEXP	|
-			   BE_BR_IMASK_ECNTEXP	|
-			   BE_BR_IMASK_LCCNTEXP	|
-			   BE_BR_IMASK_FCNTEXP	|
-			   BE_BR_IMASK_DTIMEXP;
-
-	sc->sc_cr->rimask = 0;
-	sc->sc_cr->timask = 0;
-	sc->sc_cr->qmask = 0;
-	sc->sc_cr->bmask = 0;
-
-	sc->sc_br->jsize = 4;
-
-	sc->sc_cr->ccnt = 0;
-
-	sc->sc_br->tx_cfg |= BE_BR_TXCFG_ENABLE;
-	sc->sc_br->rx_cfg |= BE_BR_RXCFG_ENABLE;
+	br->imask = BE_BR_IMASK_GOTFRAME	|
+		    BE_BR_IMASK_RCNTEXP		|
+		    BE_BR_IMASK_ACNTEXP		|
+		    BE_BR_IMASK_CCNTEXP		|
+		    BE_BR_IMASK_LCNTEXP		|
+		    BE_BR_IMASK_CVCNTEXP	|
+		    BE_BR_IMASK_SENTFRAME	|
+		    BE_BR_IMASK_NCNTEXP		|
+		    BE_BR_IMASK_ECNTEXP		|
+		    BE_BR_IMASK_LCCNTEXP	|
+		    BE_BR_IMASK_FCNTEXP		|
+		    BE_BR_IMASK_DTIMEXP;
+
+	cr->rimask = 0;
+	cr->timask = 0;
+	cr->qmask = 0;
+	cr->bmask = 0;
+
+	br->jsize = 4;
+
+	cr->ccnt = 0;
+
+	br->tx_cfg |= BE_BR_TXCFG_ENABLE;
+	br->rx_cfg |= BE_BR_RXCFG_ENABLE;
 
 	ifp->if_flags |= IFF_RUNNING;
 	ifp->if_flags &= ~IFF_OACTIVE;
diff --git a/sys/arch/sparc/dev/bevar.h b/sys/arch/sparc/dev/bevar.h
index 812fee3e34c..ac0b11067c4 100644
--- a/sys/arch/sparc/dev/bevar.h
+++ b/sys/arch/sparc/dev/bevar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bevar.h,v 1.8 1998/10/19 05:39:30 jason Exp $	*/
+/*	$OpenBSD: bevar.h,v 1.9 1998/11/02 05:50:59 jason Exp $	*/
 
 /*
  * Copyright (c) 1998 Theo de Raadt and Jason L. Wright.
@@ -36,14 +36,13 @@ struct besoftc {
 
 	struct	qec_softc *sc_qec;	/* QEC parent */
 	struct	qecregs *sc_qr;		/* QEC registers */
-	struct	be_bregs *sc_br;	/* registers */
-	struct	be_cregs *sc_cr;	/* registers */
-	struct	be_tregs *sc_tr;	/* registers */
+	struct	be_bregs *sc_br;	/* be registers */
+	struct	be_cregs *sc_cr;	/* channel registers */
+	struct	be_tregs *sc_tr;	/* transceiver registers */
 
-	void	*sc_mem;
-	int	sc_memsize;
 	u_int	sc_rev;
 
+	int	sc_channel;		/* channel number */
 	int	sc_promisc;
 	int	sc_burst;
 	int	sc_tcvr_type;
diff --git a/sys/arch/sparc/dev/qe.c b/sys/arch/sparc/dev/qe.c
index 974f9dc45d5..1c436556e35 100644
--- a/sys/arch/sparc/dev/qe.c
+++ b/sys/arch/sparc/dev/qe.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: qe.c,v 1.4 1998/10/21 04:12:10 jason Exp $	*/
+/*	$OpenBSD: qe.c,v 1.5 1998/11/02 05:50:59 jason Exp $	*/
 
 /*
  * Copyright (c) 1998 Jason L. Wright.
@@ -145,9 +145,6 @@ qeattach(parent, self, aux)
 	sc->sc_qr = qec->sc_regs;
 	qestop(sc);
 
-	sc->sc_mem = qec->sc_buffer;
-	sc->sc_memsize = qec->sc_bufsiz;
-
 	sc->sc_channel = getpropint(ca->ca_ra.ra_node, "channel#", -1);
 	sc->sc_burst = qec->sc_burst;
 
@@ -676,27 +673,12 @@ qeinit(sc)
 {
 	struct qe_mregs *mr = sc->sc_mr;
 	struct qe_cregs *cr = sc->sc_cr;
-	struct qecregs *qr = sc->sc_qr;
+	struct qec_softc *qec = sc->sc_qec;
 	struct ifnet *ifp = &sc->sc_arpcom.ac_if;
 	int s = splimp();
 	int i;
 
 	/*
-	 * init QEC: 'qe' specific initializations
-	 */
-	qr->msize = sc->sc_memsize / 4;
-	qr->rsize = sc->sc_memsize / 8;
-	qr->tsize = sc->sc_memsize / 8;
-	qr->psize = QEC_PSIZE_2048;
-	if (sc->sc_burst & SBUS_BURST_64)
-		i = QEC_CTRL_B64;
-	else if (sc->sc_burst & SBUS_BURST_32)
-		i = QEC_CTRL_B32;
-	else
-		i = QEC_CTRL_B16;
-	qr->ctrl = QEC_CTRL_MMODE | i;
-
-	/*
 	 * Allocate descriptor ring and buffers, if not already done
 	 */
 	if (sc->sc_desc == NULL)
@@ -733,8 +715,8 @@ qeinit(sc)
 	cr->timask = 0;
 	cr->qmask = 0;
 	cr->mmask = QE_CR_MMASK_RXCOLL;
-	cr->rxwbufptr = cr->rxrbufptr = sc->sc_channel * sc->sc_qr->msize;
-	cr->txwbufptr = cr->txrbufptr = cr->rxrbufptr + sc->sc_qr->rsize;
+	cr->rxwbufptr = cr->rxrbufptr = sc->sc_channel * qec->sc_msize;
+	cr->txwbufptr = cr->txrbufptr = cr->rxrbufptr + qec->sc_rsize;
 	cr->ccnt = 0;
 	cr->pipg = 0;
 
diff --git a/sys/arch/sparc/dev/qec.c b/sys/arch/sparc/dev/qec.c
index fcf26f1ef4c..f0a3abec994 100644
--- a/sys/arch/sparc/dev/qec.c
+++ b/sys/arch/sparc/dev/qec.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: qec.c,v 1.7 1998/10/21 04:12:10 jason Exp $	*/
+/*	$OpenBSD: qec.c,v 1.8 1998/11/02 05:50:59 jason Exp $	*/
 
 /*
  * Copyright (c) 1998 Theo de Raadt and Jason L. Wright.
@@ -89,13 +89,13 @@ qecattach(parent, self, aux)
 	int sbusburst;
 
 	/*
-	 * The first IO space is the QEC registers, the second IO
-	 * space is the QEC (64K we hope) ram buffer
+	 * The first i/o space is the qec global registers, and
+	 * the second is a buffer used by the qec channels internally.
+	 * (It's not necessary to map the second i/o space, but knowing
+	 * its size is necessary).
 	 */
 	sc->sc_regs = mapiodev(&ca->ca_ra.ra_reg[0], 0,
 	    sizeof(struct qecregs));
-	sc->sc_buffer = mapiodev(&ca->ca_ra.ra_reg[1], 0,
-	    ca->ca_ra.ra_reg[1].rr_len);
 	sc->sc_bufsiz = ca->ca_ra.ra_reg[1].rr_len;
 
 	/*
@@ -226,17 +226,18 @@ qec_translate(sc, ca)
 }
 
 /*
- * Reset the QEC
+ * Reset the QEC and initialize its global registers.
  */
 void
 qec_reset(sc)
 	struct qec_softc *sc;
 {
+	struct qecregs *qr = sc->sc_regs;
 	int i = 200;
 
-	sc->sc_regs->ctrl = QEC_CTRL_RESET;
+	qr->ctrl = QEC_CTRL_RESET;
 	while (--i) {
-		if ((sc->sc_regs->ctrl & QEC_CTRL_RESET) == 0)
+		if ((qr->ctrl & QEC_CTRL_RESET) == 0)
 			break;
 		DELAY(20);
 	}
@@ -244,4 +245,23 @@ qec_reset(sc)
 		printf("%s: reset failed.\n", sc->sc_dev.dv_xname);
 		return;
 	}
+
+	qr->msize = sc->sc_bufsiz / sc->sc_nchannels;
+	sc->sc_msize = qr->msize;
+
+	qr->rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
+	sc->sc_rsize = qr->rsize;
+
+	qr->tsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
+
+	qr->psize = QEC_PSIZE_2048;
+
+        if (sc->sc_burst & SBUS_BURST_64)
+		i = QEC_CTRL_B64;
+	else if (sc->sc_burst & SBUS_BURST_32)
+		i = QEC_CTRL_B32;
+	else
+		i = QEC_CTRL_B16;
+
+	qr->ctrl = (qr->ctrl & QEC_CTRL_MODEMASK) | i;
 }
diff --git a/sys/arch/sparc/dev/qecreg.h b/sys/arch/sparc/dev/qecreg.h
index 243ba316b02..ec2753c5a10 100644
--- a/sys/arch/sparc/dev/qecreg.h
+++ b/sys/arch/sparc/dev/qecreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: qecreg.h,v 1.2 1998/08/26 00:57:05 jason Exp $	*/
+/*	$OpenBSD: qecreg.h,v 1.3 1998/11/02 05:50:59 jason Exp $	*/
 
 /*
  * Copyright (c) 1998 Theo de Raadt and Jason L. Wright.
@@ -38,8 +38,9 @@ struct qecregs {
 };
 
 /* qecregs.ctrl: control. */
-#define QEC_CTRL_MMODE		0x40000000	/* MACE qec mode */
-#define QEC_CTRL_BMODE		0x10000000	/* BE qec mode */
+#define QEC_CTRL_MODEMASK	0xf0000000	/* QEC mode: qe or be */
+#define QEC_CTRL_MMODE		0x40000000		/* MACE qec mode */
+#define QEC_CTRL_BMODE		0x10000000		/* BE qec mode */
 #define QEC_CTRL_EPAR		0x00000020	/* enable parity */
 #define QEC_CTRL_ACNTRL		0x00000018	/* sbus arbitration control */
 #define QEC_CTRL_B64		0x00000004	/* 64 byte dvma bursts */
diff --git a/sys/arch/sparc/dev/qecvar.h b/sys/arch/sparc/dev/qecvar.h
index 53a51cc5d40..4cc437bea63 100644
--- a/sys/arch/sparc/dev/qecvar.h
+++ b/sys/arch/sparc/dev/qecvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: qecvar.h,v 1.5 1998/10/19 05:41:20 jason Exp $	*/
+/*	$OpenBSD: qecvar.h,v 1.6 1998/11/02 05:50:59 jason Exp $	*/
 
 /*
  * Copyright (c) 1998 Theo de Raadt and Jason L. Wright.
@@ -28,17 +28,22 @@
  */
 
 struct qec_softc {
-	struct	device sc_dev;		/* us as a device */
-	struct	sbusdev sc_sd;		/* sbus device */
-	struct	qecregs *sc_regs;	/* QEC registers */
-	int	sc_node;		/* PROM node ID */
-	int	sc_burst;		/* DVMA burst size in effect */
-	caddr_t	sc_buffer;		/* VA of the buffer we provide */
-	int	sc_bufsiz;		/* Size of buffer */
-	int	sc_nrange;		/* number of ranges */
-	int	sc_pri;
-	int	sc_nchannels;		/* number of channels on board */
+	struct	device	sc_dev;		/* us as a device */
+	struct	sbusdev	sc_sd;		/* sbus device */
+	struct	qecregs	*sc_regs;	/* QEC registers */
+	int		sc_node;	/* PROM node ID */
+	int		sc_burst;	/* DVMA burst size in effect */
+	int		sc_bufsiz;	/* Size of buffer */
+	int		sc_pri;		/* interrupt priority */
+	int		sc_nchannels;	/* number of channels on board */
+	int		sc_nrange;	/* number of ranges */
 	struct	rom_range *sc_range;	/* array of ranges */
+
+	/*
+	 * For use by children:
+	 */
+	u_int32_t	sc_msize;	/* qec buffer offset per channel */
+	u_int32_t	sc_rsize;	/* qec buffer size for receive */
 };
 
 void	qec_reset __P((struct qec_softc *));
diff --git a/sys/arch/sparc/dev/qevar.h b/sys/arch/sparc/dev/qevar.h
index 035dab3894e..a23dc9d695b 100644
--- a/sys/arch/sparc/dev/qevar.h
+++ b/sys/arch/sparc/dev/qevar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: qevar.h,v 1.1 1998/10/19 05:41:21 jason Exp $	*/
+/*	$OpenBSD: qevar.h,v 1.2 1998/11/02 05:50:59 jason Exp $	*/
 
 /*
  * Copyright (c) 1998 Jason L. Wright.
@@ -38,8 +38,6 @@ struct qesoftc {
 	struct	qe_mregs *sc_mr;	/* MACE registers */
 	struct	qe_cregs *sc_cr;	/* Channel registers */
 
-	void	*sc_mem;
-	int	sc_memsize;
 	int	sc_channel;
 	u_int	sc_rev;