diff options
author | Theo de Raadt <deraadt@cvs.openbsd.org> | 1995-10-28 14:50:17 +0000 |
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committer | Theo de Raadt <deraadt@cvs.openbsd.org> | 1995-10-28 14:50:17 +0000 |
commit | b631417f003266cab5989450847f0684c80ad563 (patch) | |
tree | b192ab704f180dbce25d5c781a9887dfe5d6ae84 /sys/arch/sparc | |
parent | 1d2c77d72fe4a03b046e2f9a249b6c54452e3b8b (diff) |
move espreadregs() closer to where it is used
Diffstat (limited to 'sys/arch/sparc')
-rw-r--r-- | sys/arch/sparc/dev/esp.c | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/sys/arch/sparc/dev/esp.c b/sys/arch/sparc/dev/esp.c index 658e2c5f3f3..04c29df0121 100644 --- a/sys/arch/sparc/dev/esp.c +++ b/sys/arch/sparc/dev/esp.c @@ -342,36 +342,6 @@ espflush(sc) } /* - * Read the ESP registers, and save their contents for later use. - * ESP_STAT, ESP_STEP & ESP_INTR are mostly zeroed out when reading - * ESP_INTR - so make sure it is the last read. - * - * XXX: TDR: this logic seems unsound - * I think that (from reading the docs) most bits in these registers - * only make sense when the DMA CSR has an interrupt showing. So I have - * coded this to not do anything if there is no interrupt or error - * pending. - */ -void -espreadregs(sc) - struct esp_softc *sc; -{ - struct espregs *espr = sc->sc_regs; - - /* they mean nothing if the is no pending interrupt ??? */ - if (!(dmapending(sc->sc_dma))) - return; - - /* Only the stepo bits are of interest */ - sc->sc_espstep = espr->espr_step & ESPSTEP_MASK; - sc->sc_espstat = espr->espr_stat; - sc->sc_espintr = espr->espr_intr; - - ESP_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ", sc->sc_espintr, - sc->sc_espstat, sc->sc_espstep)); -} - -/* * returns -1 if no byte is available because fifo is empty. */ int @@ -1263,6 +1233,36 @@ esp_timeout(arg) } /* + * Read the ESP registers, and save their contents for later use. + * ESP_STAT, ESP_STEP & ESP_INTR are mostly zeroed out when reading + * ESP_INTR - so make sure it is the last read. + * + * XXX: TDR: this logic seems unsound + * I think that (from reading the docs) most bits in these registers + * only make sense when the DMA CSR has an interrupt showing. So I have + * coded this to not do anything if there is no interrupt or error + * pending. + */ +void +espreadregs(sc) + struct esp_softc *sc; +{ + struct espregs *espr = sc->sc_regs; + + /* they mean nothing if the is no pending interrupt ??? */ + if (!(dmapending(sc->sc_dma))) + return; + + /* Only the stepo bits are of interest */ + sc->sc_espstep = espr->espr_step & ESPSTEP_MASK; + sc->sc_espstat = espr->espr_stat; + sc->sc_espintr = espr->espr_intr; + + ESP_MISC(("regs[intr=%02x,stat=%02x,step=%02x] ", sc->sc_espintr, + sc->sc_espstat, sc->sc_espstep)); +} + +/* * Whatever we do, we must generate an interrupt if we expect to go * to the next state. * Note: this increments the events even if called from esp_poll() |