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authorMiod Vallat <miod@cvs.openbsd.org>2009-03-27 23:21:19 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2009-03-27 23:21:19 +0000
commit9f46dceac4212747ceaf510aa3690bd4eeb831ad (patch)
treed60d55e82c1dcecd70348338e2ec84140cf3715f /sys/arch/sparc
parent7f6d3a31168a634728b1d4c9e25fa4e594244d1e (diff)
When clearing soft interrupts on sun4m, be sure to force the bit clear to
be acked by the hardware before continuing; this makes Ross systems stable when using hme; from NetBSD.
Diffstat (limited to 'sys/arch/sparc')
-rw-r--r--sys/arch/sparc/sparc/locore.s6
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/arch/sparc/sparc/locore.s b/sys/arch/sparc/sparc/locore.s
index 5278ac381df..7b757b773db 100644
--- a/sys/arch/sparc/sparc/locore.s
+++ b/sys/arch/sparc/sparc/locore.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.s,v 1.82 2008/10/10 20:21:39 deraadt Exp $ */
+/* $OpenBSD: locore.s,v 1.83 2009/03/27 23:21:18 miod Exp $ */
/* $NetBSD: locore.s,v 1.73 1997/09/13 20:36:48 pk Exp $ */
/*
@@ -2404,6 +2404,10 @@ _C_LABEL(sparc_interrupt4m):
sethi %hi(ICR_PI_CLR), %l6
sll %l4, 16, %l5
st %l5, [%l6 + %lo(ICR_PI_CLR)]
+ /* Drain hw reg; might be necessary for Ross CPUs */
+ sethi %hi(ICR_PI_PEND), %l6
+ ld [%l6 + %lo(ICR_PI_PEND)], %g0
+
b,a softintr_common
#endif