diff options
| author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2006-10-01 18:07:57 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2006-10-01 18:07:57 +0000 |
| commit | 013ed552bcb9777c1fc4ce1e62e273a49fb6657d (patch) | |
| tree | 645ce1c01b9996ee6763867efbdf84fee2a0613c /sys/arch | |
| parent | 419b286d9c4fec8fff203fcffcc944b2fb68c802 (diff) | |
Switch fpu control word to the hardware default. This makes us use 64-bit
precision instead of 53-bit precision, giving us proper support for
"long double".
ok deraadt@
Diffstat (limited to 'sys/arch')
| -rw-r--r-- | sys/arch/i386/include/npx.h | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/sys/arch/i386/include/npx.h b/sys/arch/i386/include/npx.h index c16157bc847..6db0d05539b 100644 --- a/sys/arch/i386/include/npx.h +++ b/sys/arch/i386/include/npx.h @@ -1,4 +1,4 @@ -/* $OpenBSD: npx.h,v 1.9 2006/07/25 19:16:51 kettenis Exp $ */ +/* $OpenBSD: npx.h,v 1.10 2006/10/01 18:07:56 kettenis Exp $ */ /* $NetBSD: npx.h,v 1.11 1994/10/27 04:16:11 cgd Exp $ */ /*- @@ -136,7 +136,7 @@ struct emcsts { /* Intel prefers long real (53 bit) precision */ #define __iBCS_NPXCW__ 0x262 #define __BDE_NPXCW__ 0x1272 /* FreeBSD */ -#define __OpenBSD_NPXCW__ 0x127f +#define __OpenBSD_NPXCW__ 0x37f /* * The default MXCSR value at reset is 0x1f80, IA-32 Instruction @@ -150,16 +150,6 @@ struct emcsts { * 64-bit precision * all exceptions masked. * - * Now we want: - * affine mode (if we decide to support 287's) - * round to nearest - * 53-bit precision - * all exceptions masked. - * - * 64-bit precision often gives bad results with high level languages - * because it makes the results of calculations depend on whether - * intermediate values are stored in memory or in FPU registers. - * * The iBCS control word has underflow, overflow, zero divide, and invalid * operation exceptions unmasked. But that causes an unexpected exception * in the test program 'paranoia' and makes denormals useless (DBL_MIN / 2 |