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authorMiod Vallat <miod@cvs.openbsd.org>2003-09-16 20:49:06 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2003-09-16 20:49:06 +0000
commit02959a8193908aeb3596ac2d77b20add36477d86 (patch)
treeb70860a0916ed3c830ef746ec2cfd154fa80f28d /sys/arch
parent58aa4929953eab56922da16e08705e1fa947a8e7 (diff)
Clean <machine/db_machdep.h> of unused material. Also, let this file be
includable even without option DDB, in which case it will only define the PC_REGS(), inst_return() and inst_call() macros; this removes the need to declare them a second time in trap.c.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/mvme88k/ddb/db_interface.c7
-rw-r--r--sys/arch/mvme88k/include/db_machdep.h90
-rw-r--r--sys/arch/mvme88k/mvme88k/trap.c24
3 files changed, 33 insertions, 88 deletions
diff --git a/sys/arch/mvme88k/ddb/db_interface.c b/sys/arch/mvme88k/ddb/db_interface.c
index e2480be5cf8..627b74bacea 100644
--- a/sys/arch/mvme88k/ddb/db_interface.c
+++ b/sys/arch/mvme88k/ddb/db_interface.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_interface.c,v 1.26 2002/03/14 03:15:56 millert Exp $ */
+/* $OpenBSD: db_interface.c,v 1.27 2003/09/16 20:49:03 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1991 Carnegie Mellon University
@@ -461,7 +461,8 @@ ddb_nmi_trap(level, eframe)
int level;
db_regs_t *eframe;
{
- NOISY(db_printf("kernel: nmi interrupt\n");)
+ if (db_noisy)
+ db_printf("kernel: nmi interrupt\n");
m88k_db_trap(T_KDB_ENTRY, eframe);
return 0;
@@ -605,7 +606,7 @@ m88k_db_where(addr, have_addr, count, modif)
s = DDB_REGS;
- l = m88k_pc(s); /* clear low bits */
+ l = PC_REGS(s); /* clear low bits */
db_find_xtrn_sym_and_offset((db_addr_t) l,&name, (db_expr_t*)&offset);
if (name && (unsigned)offset <= db_maxoff)
diff --git a/sys/arch/mvme88k/include/db_machdep.h b/sys/arch/mvme88k/include/db_machdep.h
index 1ae049ebddf..1135d957053 100644
--- a/sys/arch/mvme88k/include/db_machdep.h
+++ b/sys/arch/mvme88k/include/db_machdep.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: db_machdep.h,v 1.21 2002/03/14 03:15:57 millert Exp $ */
+/* $OpenBSD: db_machdep.h,v 1.22 2003/09/16 20:49:05 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1991 Carnegie Mellon University
@@ -25,9 +25,6 @@
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*/
-/*
- * HISTORY
- */
/*
* Machine-dependent defined for the new kernel debugger
@@ -49,6 +46,30 @@
#include <uvm/uvm_param.h>
+/*
+ * The low two bits of sxip, snip, sfip have valid bits
+ * in them that need to masked to get the correct addresses
+ */
+#define PC_REGS(regs) cputyp == CPU_88110 ? (regs->exip & ~3) :\
+ ((regs->sxip & 2) ? regs->sxip & ~3 : \
+ (regs->snip & 2 ? regs->snip & ~3 : regs->sfip & ~3))
+
+/* inst_return(ins) - is the instruction a function call return.
+ * Not mutually exclusive with inst_branch. Should be a jmp r1. */
+#define inst_return(I) (((I)&0xfffffbffU) == 0xf400c001U ? TRUE : FALSE)
+
+/*
+ * inst_call - function call predicate: is the instruction a function call.
+ * Could be either bsr or jsr
+ */
+#define inst_call(I) ({ unsigned i = (I); \
+ ((((i) & 0xf8000000U) == 0xc8000000U || /*bsr*/ \
+ ((i) & 0xfffffbe0U) == 0xf400c800U) /*jsr*/ \
+ ? TRUE : FALSE) \
+;})
+
+#ifdef DDB
+
/*
* This is a hack so that mc88100 can use software single step
* and mc88110 can use the wonderful hardware single step
@@ -69,53 +90,9 @@ typedef struct m88100_saved_state db_regs_t;
extern db_regs_t ddb_regs; /* register state */
#define DDB_REGS (&ddb_regs)
-/*
- * the low two bits of sxip, snip, sfip have valid bits
- * in them that need to masked to get the correct addresses
- */
-
-#define m88k_pc(regs) \
-({ \
- int ret; \
- \
- if (cputyp == CPU_88110) \
- ret = regs->exip & ~3; \
- else if (regs->sxip & 2) /* is valid */ \
- ret = regs->sxip & ~3; \
- else if (regs->snip & 2) \
- ret = regs->snip & ~3; \
- else if (regs->sfip & 2) \
- ret = regs->sfip & ~3; \
- /* we are in trouble - none of the program counters is valid */ \
- ret; \
-})
-
-/*
- * This is an actual function due to the fact that the sxip
- * or snip could be nooped out due to a jmp or rte
- */
-#define PC_REGS(regs) cputyp == CPU_88110 ? (regs->exip & ~3) :\
- ((regs->sxip & 2) ? regs->sxip & ~3 : \
- (regs->snip & 2 ? regs->snip & ~3 : regs->sfip & ~3))
-#define l_PC_REGS(regs) cputyp == CPU_88110 ? (regs->exip & ~3) :\
- ((regs->sxip & 2) ? regs->sxip : \
- (regs->snip & 2 ? regs->snip : regs->sfip ))
-
-#define pC_REGS(regs) cputyp == CPU_88110 ? (regs->exip & ~3) :\
- (regs->sxip & 2) ? regs->sxip : (regs->snip & 2 ? \
- regs->snip : regs->sfip)
extern int db_noisy;
-#define NOISY(x) if (db_noisy) x
-#define NOISY2(x) if (db_noisy >= 2) x
-#define NOISY3(x) if (db_noisy >= 3) x
-
extern int quiet_db_read_bytes;
-/* These versions are not constantly doing SPL */
-/*#define cnmaygetc db_getc*/
-/*#define cngetc db_getc*/
-/*#define cnputc db_putc*/
-
unsigned inst_load(unsigned);
unsigned inst_store(unsigned);
boolean_t inst_branch(unsigned);
@@ -164,20 +141,6 @@ void db_clear_single_step(register db_regs_t *);
/* machine specific commands have been added to ddb */
#define DB_MACHINE_COMMANDS 1
-/* inst_return(ins) - is the instruction a function call return.
- * Not mutually exclusive with inst_branch. Should be a jmp r1. */
-#define inst_return(I) (((I)&0xfffffbffU) == 0xf400c001U ? TRUE : FALSE)
-
-#ifdef __GNUC__
-/*
- * inst_call - function call predicate: is the instruction a function call.
- * Could be either bsr or jsr
- */
-#define inst_call(I) ({ unsigned i = (I); \
- ((((i) & 0xf8000000U) == 0xc8000000U || /*bsr*/ \
- ((i) & 0xfffffbe0U) == 0xf400c800U) /*jsr*/ \
- ? TRUE : FALSE) \
-;})
/*
* This routine should return true for instructions that result in unconditonal
@@ -195,12 +158,11 @@ void db_clear_single_step(register db_regs_t *);
/* Return true if the instruction has a delay slot. */
#define db_branch_is_delayed(I) inst_delayed(I)
-#endif /* __GNUC__ */
-
#define db_printf_enter db_printing
int m88k_print_instruction(unsigned iadr, long inst);
+#endif /* DDB */
#endif /* _LOCORE */
#endif /* _M88K_DB_MACHDEP_H_ */
diff --git a/sys/arch/mvme88k/mvme88k/trap.c b/sys/arch/mvme88k/mvme88k/trap.c
index 8c64e67c1bc..7026285ab57 100644
--- a/sys/arch/mvme88k/mvme88k/trap.c
+++ b/sys/arch/mvme88k/mvme88k/trap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: trap.c,v 1.49 2003/09/06 15:07:43 miod Exp $ */
+/* $OpenBSD: trap.c,v 1.50 2003/09/16 20:49:05 miod Exp $ */
/*
* Copyright (c) 1998 Steve Murphree, Jr.
* Copyright (c) 1996 Nivas Madhur
@@ -73,20 +73,9 @@
#include <machine/psl.h> /* FIP_E, etc. */
#include <machine/trap.h>
-#ifdef DDB
#include <machine/db_machdep.h>
+#ifdef DDB
#include <ddb/db_output.h> /* db_printf() */
-#else
- #define PC_REGS(regs) cputyp == CPU_88110 ? (regs->exip & ~3) :\
- ((regs->sxip & 2) ? regs->sxip & ~3 : \
- (regs->snip & 2 ? regs->snip & ~3 : regs->sfip & ~3))
-
-#define inst_return(I) (((I)&0xfffffbffU) == 0xf400c001U ? TRUE : FALSE)
-#define inst_call(I) ({ unsigned i = (I); \
- ((((i) & 0xf8000000U) == 0xc8000000U || /*bsr*/ \
- ((i) & 0xfffffbe0U) == 0xf400c800U) /*jsr*/ \
- ? TRUE : FALSE) \
- ;})
#endif /* DDB */
#define SSBREAKPOINT (0xF000D1F8U) /* Single Step Breakpoint */
@@ -552,14 +541,11 @@ user_fault:
* T_STEPBPT trap.
*/
{
- register unsigned va;
+ unsigned va;
unsigned instr;
struct uio uio;
struct iovec iov;
- /* compute address of break instruction */
- va = pc;
-
/* read break instruction */
copyin((caddr_t)pc, &instr, sizeof(unsigned));
#if 0
@@ -1057,14 +1043,10 @@ m88110_user_fault:
* T_STEPBPT trap.
*/
{
- register unsigned va;
unsigned instr;
struct uio uio;
struct iovec iov;
- /* compute address of break instruction */
- va = pc;
-
/* read break instruction */
copyin((caddr_t)pc, &instr, sizeof(unsigned));
#if 0