Now that pmap_copy_page() no longer needs to flush a couple contiguous tlb

entries, drop the count parameter to cmmu_tlb_inv(), and introduce
cmmu_tlb_inv_all() to drop all user tlb entries (to be used during context
switches).

6 files changed, 58 insertions, 57 deletions

diff --git a/sys/arch/m88k/include/cmmu.h b/sys/arch/m88k/include/cmmu.h
index a818f70693f..ce7aee32b41 100644
--- a/sys/arch/m88k/include/cmmu.h
+++ b/sys/arch/m88k/include/cmmu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cmmu.h,v 1.25 2010/12/31 21:12:16 miod Exp $ */
+/*	$OpenBSD: cmmu.h,v 1.26 2011/01/05 22:14:28 miod Exp $ */
 /*
  * Mach Operating System
  * Copyright (c) 1993-1992 Carnegie Mellon University
@@ -42,7 +42,8 @@ struct cmmu_p {
 	cpuid_t (*cpu_number)(void);
 	void (*set_sapr)(apr_t);
 	void (*set_uapr)(apr_t);
-	void (*tlb_inv)(cpuid_t, u_int, vaddr_t, u_int);
+	void (*tlb_inv)(cpuid_t, u_int, vaddr_t);
+	void (*tlb_inv_all)(cpuid_t);
 	void (*cache_wbinv)(cpuid_t, paddr_t, psize_t);
 	void (*dcache_wb)(cpuid_t, paddr_t, psize_t);
 	void (*icache_inv)(cpuid_t, paddr_t, psize_t);
@@ -77,7 +78,8 @@ extern __cpu_simple_lock_t cmmu_cpu_lock;
 #define	cmmu_cpu_number			(cmmu->cpu_number)
 #define	cmmu_set_sapr(apr)		(cmmu->set_sapr)(apr)
 #define	cmmu_set_uapr(apr)		(cmmu->set_uapr)(apr)
-#define	cmmu_tlb_inv(cpu, k, va, c) 	(cmmu->tlb_inv)(cpu, k, va, c)
+#define	cmmu_tlb_inv(cpu, k, va) 	(cmmu->tlb_inv)(cpu, k, va)
+#define	cmmu_tlb_inv_all(cpu) 		(cmmu->tlb_inv_all)(cpu)
 #define	cmmu_cache_wbinv(cpu, pa, s)	(cmmu->cache_wbinv)(cpu, pa, s)
 #define	cmmu_dcache_wb(cpu, pa, s)	(cmmu->dcache_wb)(cpu, pa, s)
 #define	cmmu_icache_inv(cpu,pa,s)	(cmmu->icache_inv)(cpu, pa, s)
diff --git a/sys/arch/m88k/m88k/db_interface.c b/sys/arch/m88k/m88k/db_interface.c
index 8a554c310cc..0309fd79ec3 100644
--- a/sys/arch/m88k/m88k/db_interface.c
+++ b/sys/arch/m88k/m88k/db_interface.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_interface.c,v 1.16 2010/12/31 20:38:55 miod Exp $	*/
+/*	$OpenBSD: db_interface.c,v 1.17 2011/01/05 22:14:29 miod Exp $	*/
 /*
  * Mach Operating System
  * Copyright (c) 1993-1991 Carnegie Mellon University
@@ -531,13 +531,13 @@ db_write_bytes(db_addr_t addr, size_t size, char *data)
 
 		if (pte != NULL && (opte & PG_RO)) {
 			*pte = opte & ~PG_RO;
-			cmmu_tlb_inv(cpu, TRUE, va, 1);
+			cmmu_tlb_inv(cpu, TRUE, va);
 		}
 		while (len-- != 0)
 			*dst++ = *data++;
 		if (pte != NULL && (opte & PG_RO)) {
 			*pte = opte;
-			cmmu_tlb_inv(cpu, TRUE, va, 1);
+			cmmu_tlb_inv(cpu, TRUE, va);
 		}
 		if (pte != NULL && (opte & (CACHE_INH | CACHE_WT)) == 0) {
 			cmmu_dcache_wb(cpu, pa, olen);
diff --git a/sys/arch/m88k/m88k/m8820x_machdep.c b/sys/arch/m88k/m88k/m8820x_machdep.c
index 8c9f74b878c..a7e6a6fe082 100644
--- a/sys/arch/m88k/m88k/m8820x_machdep.c
+++ b/sys/arch/m88k/m88k/m8820x_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m8820x_machdep.c,v 1.45 2011/01/01 22:09:33 miod Exp $	*/
+/*	$OpenBSD: m8820x_machdep.c,v 1.46 2011/01/05 22:14:29 miod Exp $	*/
 /*
  * Copyright (c) 2004, 2007, 2010, 2011, Miodrag Vallat.
  *
@@ -89,7 +89,8 @@ void	m8820x_cpu_configuration_print(int);
 void	m8820x_shutdown(void);
 void	m8820x_set_sapr(apr_t);
 void	m8820x_set_uapr(apr_t);
-void	m8820x_tlb_inv(cpuid_t, u_int, vaddr_t, u_int);
+void	m8820x_tlb_inv(cpuid_t, u_int, vaddr_t);
+void	m8820x_tlb_inv_all(cpuid_t);
 void	m8820x_cache_wbinv(cpuid_t, paddr_t, psize_t);
 void	m8820x_dcache_wb(cpuid_t, paddr_t, psize_t);
 void	m8820x_icache_inv(cpuid_t, paddr_t, psize_t);
@@ -106,6 +107,7 @@ struct cmmu_p cmmu8820x = {
 	m8820x_set_sapr,
 	m8820x_set_uapr,
 	m8820x_tlb_inv,
+	m8820x_tlb_inv_all,
 	m8820x_cache_wbinv,
 	m8820x_dcache_wb,
 	m8820x_icache_inv,
@@ -539,41 +541,28 @@ m8820x_set_uapr(apr_t ap)
  */
 
 void
-m8820x_tlb_inv(cpuid_t cpu, u_int kernel, vaddr_t vaddr, u_int count)
+m8820x_tlb_inv(cpuid_t cpu, u_int kernel, vaddr_t vaddr)
 {
 	u_int32_t psr;
 
 	psr = get_psr();
 	set_psr(psr | PSR_IND);
 	CMMU_LOCK;
+	m8820x_cmmu_set_cmd(kernel ? CMMU_FLUSH_SUPER_PAGE :
+	    CMMU_FLUSH_USER_PAGE, ADDR_VAL, cpu, 0, vaddr);
+	CMMU_UNLOCK;
+	set_psr(psr);
+}
 
-	/*
-	 * Since segment operations are horribly expensive, don't
-	 * do any here. Invalidations of up to three pages are performed
-	 * as page invalidations, otherwise the entire tlb is flushed.
-	 *
-	 * Note that this code relies upon vaddr being page-aligned.
-	 */
-	switch (count) {
-	default:
-		m8820x_cmmu_set_reg(CMMU_SCR,
-		    kernel ? CMMU_FLUSH_SUPER_ALL : CMMU_FLUSH_USER_ALL,
-		    0, cpu, 0);
-		break;
-	case 2:
-		m8820x_cmmu_set_cmd(
-		    kernel ? CMMU_FLUSH_SUPER_PAGE : CMMU_FLUSH_USER_PAGE,
-		    ADDR_VAL, cpu, 0, vaddr);
-		vaddr += PAGE_SIZE;
-		/* FALLTHROUGH */
-	case 1:			/* most frequent situation */
-	case 0:
-		m8820x_cmmu_set_cmd(
-		    kernel ? CMMU_FLUSH_SUPER_PAGE : CMMU_FLUSH_USER_PAGE,
-		    ADDR_VAL, cpu, 0, vaddr);
-		break;
-	}
+void
+m8820x_tlb_inv_all(cpuid_t cpu)
+{
+	u_int32_t psr;
 
+	psr = get_psr();
+	set_psr(psr | PSR_IND);
+	CMMU_LOCK;
+	m8820x_cmmu_set_reg(CMMU_SCR, CMMU_FLUSH_USER_ALL, 0, cpu, 0);
 	CMMU_UNLOCK;
 	set_psr(psr);
 }
diff --git a/sys/arch/m88k/m88k/pmap.c b/sys/arch/m88k/m88k/pmap.c
index 87fde7da4d7..f5990b034c2 100644
--- a/sys/arch/m88k/m88k/pmap.c
+++ b/sys/arch/m88k/m88k/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.59 2011/01/02 13:40:07 miod Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.60 2011/01/05 22:14:29 miod Exp $	*/
 
 /*
  * Copyright (c) 2001-2004, 2010, Miodrag Vallat.
@@ -354,7 +354,7 @@ tlb_flush(pmap_t pmap, vaddr_t va)
 	if (CPU_IS88100) {
 		CPU_INFO_FOREACH(cpu, ci) {
 			if (kernel || pmap == ci->ci_curpmap)
-				cmmu_tlb_inv(ci->ci_cpuid, kernel, va, 1);
+				cmmu_tlb_inv(ci->ci_cpuid, kernel, va);
 		}
 	}
 
@@ -375,7 +375,7 @@ tlb_flush(pmap_t pmap, vaddr_t va)
 
 	if (kernel || pmap == ci->ci_curpmap) {
 		if (CPU_IS88100)
-			cmmu_tlb_inv(ci->ci_cpuid, kernel, va, 1);
+			cmmu_tlb_inv(ci->ci_cpuid, kernel, va);
 		if (CPU_IS88110)
 			ci->ci_pmap_ipi |= kernel ?
 			    CI_IPI_TLB_FLUSH_KERNEL : CI_IPI_TLB_FLUSH_USER;
@@ -397,17 +397,17 @@ tlb_kflush(vaddr_t va)
 
 	if (CPU_IS88100)
 		CPU_INFO_FOREACH(cpu, ci)
-			cmmu_tlb_inv(ci->ci_cpuid, TRUE, va, 1);
+			cmmu_tlb_inv(ci->ci_cpuid, TRUE, va);
 	if (CPU_IS88110)
 		CPU_INFO_FOREACH(cpu, ci)
-			cmmu_tlb_inv(ci->ci_cpuid, TRUE, 0 ,0);
+			cmmu_tlb_inv(ci->ci_cpuid, TRUE, 0);
 #else	/* MULTIPROCESSOR */	/* } { */
 	ci = curcpu();
 
 	if (CPU_IS88100)
-		cmmu_tlb_inv(ci->ci_cpuid, TRUE, va, 1);
+		cmmu_tlb_inv(ci->ci_cpuid, TRUE, va);
 	if (CPU_IS88110)
-		cmmu_tlb_inv(ci->ci_cpuid, TRUE, 0 ,0);
+		cmmu_tlb_inv(ci->ci_cpuid, TRUE, 0);
 #endif	/* MULTIPROCESSOR */	/* } */
 }
 
@@ -437,9 +437,9 @@ pmap_update(pmap_t pm)
 		/* CPU_INFO_FOREACH(cpu, ci) */ {
 			ipi = atomic_clear_int(&ci->ci_pmap_ipi);
 			if (ipi & CI_IPI_TLB_FLUSH_KERNEL)
-				cmmu_tlb_inv(ci->ci_cpuid, TRUE, 0 ,0);
+				cmmu_tlb_inv(ci->ci_cpuid, TRUE, 0);
 			if (ipi & CI_IPI_TLB_FLUSH_USER)
-				cmmu_tlb_inv(ci->ci_cpuid, FALSE, 0 ,0);
+				cmmu_tlb_inv(ci->ci_cpuid, FALSE, 0);
 		}
 #ifdef M88100
 	}
@@ -464,7 +464,7 @@ pmap_activate(struct proc *p)
 	} else {
 		if (pmap != ci->ci_curpmap) {
 			cmmu_set_uapr(pmap->pm_apr);
-			cmmu_tlb_inv(ci->ci_cpuid, FALSE, 0, -1);
+			cmmu_tlb_inv_all(ci->ci_cpuid);
 			ci->ci_curpmap = pmap;
 		}
 	}
@@ -756,9 +756,7 @@ pmap_bootstrap_cpu(cpuid_t cpu)
 #ifdef MULTIPROCESSOR
 	if (cpu != master_cpu)
 		cmmu_initialize_cpu(cpu);
-	else
 #endif
-		cmmu_tlb_inv(cpu, TRUE, 0, -1);
 
 	/* Load supervisor pointer to segment table. */
 	cmmu_set_sapr(pmap_kernel()->pm_apr);
diff --git a/sys/arch/mvme88k/mvme88k/m197_machdep.c b/sys/arch/mvme88k/mvme88k/m197_machdep.c
index b6e3ae872b8..2aad09c78f7 100644
--- a/sys/arch/mvme88k/mvme88k/m197_machdep.c
+++ b/sys/arch/mvme88k/mvme88k/m197_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m197_machdep.c,v 1.44 2010/12/31 21:38:08 miod Exp $	*/
+/*	$OpenBSD: m197_machdep.c,v 1.45 2011/01/05 22:14:39 miod Exp $	*/
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -573,10 +573,10 @@ m197_ipi_handler(struct trapframe *eframe)
 		arg2 = ci->ci_ipi_arg2;
 
 		if (ipi & CI_IPI_TLB_FLUSH_KERNEL) {
-			cmmu_tlb_inv(ci->ci_cpuid, 1, 0, 0);
+			cmmu_tlb_inv(ci->ci_cpuid, 1, 0);
 		}
 		else if (ipi & CI_IPI_TLB_FLUSH_USER) {
-			cmmu_tlb_inv(ci->ci_cpuid, 0, 0, 0);
+			cmmu_tlb_inv(ci->ci_cpuid, 0, 0);
 		}
 		else if (ipi & CI_IPI_CACHE_FLUSH) {
 			cmmu_cache_wbinv(ci->ci_cpuid, arg1, arg2);
diff --git a/sys/arch/mvme88k/mvme88k/m88110.c b/sys/arch/mvme88k/mvme88k/m88110.c
index d4ea90c86d3..6183761a5c6 100644
--- a/sys/arch/mvme88k/mvme88k/m88110.c
+++ b/sys/arch/mvme88k/mvme88k/m88110.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m88110.c,v 1.71 2011/01/02 17:55:27 miod Exp $	*/
+/*	$OpenBSD: m88110.c,v 1.72 2011/01/05 22:14:39 miod Exp $	*/
 
 /*
  * Copyright (c) 2010, 2011, Miodrag Vallat.
@@ -99,8 +99,8 @@ void	m88110_shutdown(void);
 cpuid_t	m88110_cpu_number(void);
 void	m88110_set_sapr(apr_t);
 void	m88110_set_uapr(apr_t);
-void	m88110_tlb_inv(cpuid_t, u_int, vaddr_t, u_int);
-void	m88410_tlb_inv(cpuid_t, u_int, vaddr_t, u_int);
+void	m88110_tlb_inv(cpuid_t, u_int, vaddr_t);
+void	m88110_tlb_inv_all(cpuid_t);
 void	m88110_cache_wbinv(cpuid_t, paddr_t, psize_t);
 void	m88410_cache_wbinv(cpuid_t, paddr_t, psize_t);
 void	m88110_dcache_wb(cpuid_t, paddr_t, psize_t);
@@ -127,6 +127,7 @@ struct cmmu_p cmmu88110 = {
 	m88110_set_sapr,
 	m88110_set_uapr,
 	m88110_tlb_inv,
+	m88110_tlb_inv_all,
 	m88110_cache_wbinv,
 	m88110_dcache_wb,
 	m88110_icache_inv,
@@ -150,6 +151,7 @@ struct cmmu_p cmmu88410 = {
 	m88110_set_sapr,
 	m88110_set_uapr,
 	m88110_tlb_inv,
+	m88110_tlb_inv_all,
 	m88410_cache_wbinv,
 	m88410_dcache_wb,
 	m88410_icache_inv,
@@ -469,11 +471,8 @@ m88110_set_uapr(apr_t ap)
  *	Functions that invalidate TLB entries.
  */
 
-/*
- *	flush any tlb
- */
 void
-m88110_tlb_inv(cpuid_t cpu, u_int kernel, vaddr_t vaddr, u_int count)
+m88110_tlb_inv(cpuid_t cpu, u_int kernel, vaddr_t vaddr)
 {
 	u_int32_t psr;
 #ifdef MULTIPROCESSOR
@@ -500,6 +499,19 @@ m88110_tlb_inv(cpuid_t cpu, u_int kernel, vaddr_t vaddr, u_int count)
 	set_psr(psr);
 }
 
+void
+m88110_tlb_inv_all(cpuid_t cpu)
+{
+	u_int32_t psr;
+
+	psr = get_psr();
+	set_psr(psr | PSR_IND);
+	/* always invoked on the current processor, no need to check */
+	set_icmd(CMMU_ICMD_INV_UATC);
+	set_dcmd(CMMU_DCMD_INV_UATC);
+	set_psr(psr);
+}
+
 /*
  *	Functions that invalidate caches.
  */