The io clock on Octeon II (CN6xxx) runs at a different rate to the cpu clock.

Program the uarts based on the io clock rate on these platforms.

ok jasper@ pirofti@ yasuoka@

5 files changed, 37 insertions, 6 deletions

diff --git a/sys/arch/octeon/dev/cn30xxuart.c b/sys/arch/octeon/dev/cn30xxuart.c
index efade9b71dd..1715ee0cc68 100644
--- a/sys/arch/octeon/dev/cn30xxuart.c
+++ b/sys/arch/octeon/dev/cn30xxuart.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cn30xxuart.c,v 1.4 2013/06/05 02:45:03 jasper Exp $	*/
+/*	$OpenBSD: cn30xxuart.c,v 1.5 2014/06/17 01:33:04 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -32,6 +32,7 @@
 #include <sys/tty.h>
 #include <sys/conf.h>
 
+#include <machine/octeonvar.h>
 #include <machine/autoconf.h>
 #include <machine/bus.h>
 
@@ -111,7 +112,7 @@ cn30xxuart_attach(struct device *parent, struct device *self, void *aux)
 	sc->sc_iobase = uba->uba_baseaddr;
 	sc->sc_hwflags = 0;
 	sc->sc_swflags = 0;
-	sc->sc_frequency = curcpu()->ci_hw.clock;
+	sc->sc_frequency = octeon_ioclock_speed();
 	sc->sc_uarttype = COM_UART_16550;
 
 	/* if it's in use as console, it's there. */
diff --git a/sys/arch/octeon/include/octeon_model.h b/sys/arch/octeon/include/octeon_model.h
index c5af75b1c8e..83ede5e92c7 100644
--- a/sys/arch/octeon/include/octeon_model.h
+++ b/sys/arch/octeon/include/octeon_model.h
@@ -1,4 +1,4 @@
-/*	$Id: octeon_model.h,v 1.1 2011/06/16 11:22:30 syuu Exp $	*/
+/*	$Id: octeon_model.h,v 1.2 2014/06/17 01:33:04 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2007
@@ -38,6 +38,7 @@
 #define OCTEON_MODEL_CN3005             0x000d0210
 #define OCTEON_MODEL_CN5010		0x000d0600
 #define OCTEON_MODEL_CN5010_PASS1_1	0x000d0601
+#define OCTEON_MODEL_CN61XX_PASS1_0	0x000d9300
 
 #define OCTEON_MODEL_MASK		0x00ffff10
 #define OCTEON_MODEL_REV_MASK		0x00ffff1f
@@ -50,6 +51,7 @@
 #define OCTEON_MODEL_FAMILY_CN31XX	0x000d0100
 #define OCTEON_MODEL_FAMILY_CN30XX	0x000d0200
 #define OCTEON_MODEL_FAMILY_CN50XX	0x000d0600
+#define OCTEON_MODEL_FAMILY_CN61XX	0x000d9300
 
 /*
  *  get chip id
diff --git a/sys/arch/octeon/include/octeonreg.h b/sys/arch/octeon/include/octeonreg.h
index fab692cf753..680dc74d037 100644
--- a/sys/arch/octeon/include/octeonreg.h
+++ b/sys/arch/octeon/include/octeonreg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: octeonreg.h,v 1.3 2013/10/24 20:45:03 pirofti Exp $	*/
+/*	$OpenBSD: octeonreg.h,v 1.4 2014/06/17 01:33:04 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.com).
@@ -164,4 +164,9 @@
 #define CIU_INT0_EN4_1          0x00000C88
 #define CIU_INT1_EN4_1          0x00000C98
 
+#define MIO_RST_BOOT		0x1180000001600ULL
+#define MIO_RST_BOOT_PNR_MUL_SHIFT	24
+#define MIO_RST_BOOT_PNR_MUL_MASK	0x3f
+#define OCTEON_IO_REF_CLOCK	50000000	/* 50MHz */
+
 #endif /* !_MACHINE_OCTEONREG_H_ */
diff --git a/sys/arch/octeon/include/octeonvar.h b/sys/arch/octeon/include/octeonvar.h
index 2441d3fea24..06192de024e 100644
--- a/sys/arch/octeon/include/octeonvar.h
+++ b/sys/arch/octeon/include/octeonvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: octeonvar.h,v 1.16 2014/03/29 18:09:30 guenther Exp $	*/
+/*	$OpenBSD: octeonvar.h,v 1.17 2014/06/17 01:33:04 jmatthew Exp $	*/
 /*	$NetBSD: maltavar.h,v 1.3 2002/03/18 10:10:16 simonb Exp $	*/
 
 /*-
@@ -290,6 +290,9 @@ void	octeon_cal_timer(int);
 void	octeon_dma_init(struct octeon_config *);
 void	octeon_intr_init(void);
 int	octeon_get_ethaddr(int, u_int8_t *);
+
+int	octeon_ioclock_speed(void);
+
 #endif /* _KERNEL */
 
 static inline int
diff --git a/sys/arch/octeon/octeon/machdep.c b/sys/arch/octeon/octeon/machdep.c
index 15be8b47893..65daf78179e 100644
--- a/sys/arch/octeon/octeon/machdep.c
+++ b/sys/arch/octeon/octeon/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.48 2014/05/31 15:49:28 mpi Exp $ */
+/*	$OpenBSD: machdep.c,v 1.49 2014/06/17 01:33:04 jmatthew Exp $ */
 
 /*
  * Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -81,6 +81,7 @@
 #include <octeon/dev/iobusvar.h>
 #include <machine/octeonreg.h>
 #include <machine/octeonvar.h>
+#include <machine/octeon_model.h>
 
 /* The following is used externally (sysctl_hw) */
 char	machine[] = MACHINE;		/* Machine "architecture" */
@@ -566,6 +567,25 @@ octeon_cpuspeed(int *freq)
 	return (0);
 }
 
+int
+octeon_ioclock_speed(void)
+{
+	extern struct boot_info *octeon_boot_info;
+	int chipid;
+	u_int64_t mio_rst_boot;
+
+	chipid = octeon_get_chipid();
+	switch (octeon_model_family(chipid)) {
+	case OCTEON_MODEL_FAMILY_CN61XX:
+		mio_rst_boot = octeon_xkphys_read_8(MIO_RST_BOOT);
+		return OCTEON_IO_REF_CLOCK * ((mio_rst_boot >>
+		    MIO_RST_BOOT_PNR_MUL_SHIFT) & MIO_RST_BOOT_PNR_MUL_MASK);
+		break;
+	default:
+		return octeon_boot_info->eclock;
+	}
+}
+
 static u_int64_t
 get_ncpusfound(void)
 {