diff options
author | Visa Hankala <visa@cvs.openbsd.org> | 2021-07-12 09:29:19 +0000 |
---|---|---|
committer | Visa Hankala <visa@cvs.openbsd.org> | 2021-07-12 09:29:19 +0000 |
commit | 223deb39706d55db7629bd927b952c1529288f7d (patch) | |
tree | 7be1b7b7311e498cc2a3a6244804d9fd16e8deba /sys/arch | |
parent | 4dc7c8f6576293313e815234afa34d57bb0feedf (diff) |
Make hw_cpu_hatch() more similar on loongson and octeon.
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/loongson/loongson/machdep.c | 8 | ||||
-rw-r--r-- | sys/arch/octeon/octeon/machdep.c | 11 |
2 files changed, 10 insertions, 9 deletions
diff --git a/sys/arch/loongson/loongson/machdep.c b/sys/arch/loongson/loongson/machdep.c index 5f13c134231..47a85ab13e3 100644 --- a/sys/arch/loongson/loongson/machdep.c +++ b/sys/arch/loongson/loongson/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.96 2021/05/16 15:10:19 deraadt Exp $ */ +/* $OpenBSD: machdep.c,v 1.97 2021/07/12 09:29:18 visa Exp $ */ /* * Copyright (c) 2009, 2010, 2014 Miodrag Vallat. @@ -1271,14 +1271,14 @@ hw_cpu_hatch(struct cpu_info *ci) */ setcurcpu(ci); - tlb_init(ci->ci_hw.tlbsize); - tlb_set_pid(0); - /* * Make sure we can access the extended address space. */ setsr(getsr() | SR_KX | SR_UX); + tlb_init(ci->ci_hw.tlbsize); + tlb_set_pid(0); + /* * Turn off bootstrap exception vectors. */ diff --git a/sys/arch/octeon/octeon/machdep.c b/sys/arch/octeon/octeon/machdep.c index f9868a58eb0..daca85fc0fb 100644 --- a/sys/arch/octeon/octeon/machdep.c +++ b/sys/arch/octeon/octeon/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.131 2021/05/16 15:12:38 deraadt Exp $ */ +/* $OpenBSD: machdep.c,v 1.132 2021/07/12 09:29:18 visa Exp $ */ /* * Copyright (c) 2009, 2010 Miodrag Vallat. @@ -1312,8 +1312,6 @@ hw_cpu_hatch(struct cpu_info *ci) /* * Make sure we can access the extended address space. - * Note that r10k and later do not allow XUSEG accesses - * from kernel mode unless SR_UX is set. */ setsr(getsr() | SR_KX | SR_UX); @@ -1332,10 +1330,13 @@ hw_cpu_hatch(struct cpu_info *ci) Mips_SyncCache(ci); (*md_startclock)(ci); - ncpus++; - cpuset_add(&cpus_running, ci); + octeon_intr_init(); mips64_ipi_init(); + + ncpus++; + cpuset_add(&cpus_running, ci); + spl0(); (void)updateimask(0); |