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authorMiod Vallat <miod@cvs.openbsd.org>2013-08-18 22:10:59 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2013-08-18 22:10:59 +0000
commit5ce339cd64b39024bdd7773ad7e82415db71ea58 (patch)
treefe7163be30a7944bf9ae4c7024086cc7e9c7fd30 /sys/arch
parentacde6aab3ee3292f4e624e902b0216eb6e1b2db9 (diff)
No need to test for DMT0 being valid a second time in the `save DMT and
clear proper SSBR bits' code path.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/m88k/m88k/eh_common.S17
1 files changed, 8 insertions, 9 deletions
diff --git a/sys/arch/m88k/m88k/eh_common.S b/sys/arch/m88k/m88k/eh_common.S
index 1b4ed9198d0..dd2d6319a45 100644
--- a/sys/arch/m88k/m88k/eh_common.S
+++ b/sys/arch/m88k/m88k/eh_common.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: eh_common.S,v 1.59 2013/08/15 19:29:10 miod Exp $ */
+/* $OpenBSD: eh_common.S,v 1.60 2013/08/18 22:10:58 miod Exp $ */
/*
* Mach Operating System
* Copyright (c) 1993-1991 Carnegie Mellon University
@@ -1069,15 +1069,14 @@ ASLOCAL(pfsr_done)
st TMP2, %r31, EF_DMD1
st TMP3, %r31, EF_DMD2
-/*
- * need to clear "appropriate" bits in the SSBR before
- * we restart the FPU
- */
-
- ldcr TMP2, DMT0
- bb0.n DMT_VALID_BIT, TMP2, 8f
/* make sure an exception in fpu_enable will not see our DMT0 */
- stcr %r0, DMT0
+ stcr %r0, DMT0
+
+ /*
+ * need to clear "appropriate" bits in the SSBR before
+ * we restart the FPU
+ */
+ ld TMP2, %r31, EF_DMT0
bb1 DMT_LOCK_BIT, TMP2, 1f
bb1 DMT_WRITE_BIT, TMP2, 2f
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