diff options
author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2011-06-25 20:45:01 +0000 |
---|---|---|
committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2011-06-25 20:45:01 +0000 |
commit | 679c1b2f549fc3986e9270e9923b6dc17e30f416 (patch) | |
tree | e57029b1221c4fd2ba3dd82311f67c4e5c3db819 /sys/arch | |
parent | 546e0512389677a09cae6c3e088eedea2ca3d9bf (diff) |
Add MSI hypervisor calls.
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/sparc64/include/hypervisor.h | 74 | ||||
-rw-r--r-- | sys/arch/sparc64/sparc64/hvcall.S | 138 |
2 files changed, 210 insertions, 2 deletions
diff --git a/sys/arch/sparc64/include/hypervisor.h b/sys/arch/sparc64/include/hypervisor.h index 240bc31c015..cde4b30864e 100644 --- a/sys/arch/sparc64/include/hypervisor.h +++ b/sys/arch/sparc64/include/hypervisor.h @@ -1,4 +1,4 @@ -/* $OpenBSD: hypervisor.h,v 1.12 2009/12/31 11:50:33 kettenis Exp $ */ +/* $OpenBSD: hypervisor.h,v 1.13 2011/06/25 20:45:00 kettenis Exp $ */ /* * Copyright (c) 2008 Mark Kettenis @@ -172,6 +172,78 @@ int64_t hv_pci_config_put(uint64_t devhandle, uint64_t pci_device, #define PCI_MAP_ATTR_WRITE 0x02 /* To memory */ /* + * PCI MSI services + */ + +int64_t hv_pci_msiq_conf(uint64_t devhandle, uint64_t msiqid, + uint64_t r_addr, uint64_t nentries); +int64_t hv_pci_msiq_info(uint64_t devhandle, uint64_t msiqid, + uint64_t *r_addr, uint64_t *nentries); + +int64_t hv_pci_msiq_getvalid(uint64_t devhandle, uint64_t msiqid, + uint64_t *msiqvalid); +int64_t hv_pci_msiq_setvalid(uint64_t devhandle, uint64_t msiqid, + uint64_t msiqvalid); + +#define PCI_MSIQ_INVALID 0 +#define PCI_MSIQ_VALID 1 + +int64_t hv_pci_msiq_getstate(uint64_t devhandle, uint64_t msiqid, + uint64_t *msiqstate); +int64_t hv_pci_msiq_setstate(uint64_t devhandle, uint64_t msiqid, + uint64_t msiqstate); + +#define PCI_MSIQSTATE_IDLE 0 +#define PCI_MSIQSTATE_ERROR 1 + +int64_t hv_pci_msiq_gethead(uint64_t devhandle, uint64_t msiqid, + uint64_t *msiqhead); +int64_t hv_pci_msiq_sethead(uint64_t devhandle, uint64_t msiqid, + uint64_t msiqhead); +int64_t hv_pci_msiq_gettail(uint64_t devhandle, uint64_t msiqid, + uint64_t *msiqtail); + +int64_t hv_pci_msi_getvalid(uint64_t devhandle, uint64_t msinum, + uint64_t *msivalidstate); +int64_t hv_pci_msi_setvalid(uint64_t devhandle, uint64_t msinum, + uint64_t msivalidstate); + +#define PCI_MSI_INVALID 0 +#define PCI_MSI_VALID 1 + +int64_t hv_pci_msi_getmsiq(uint64_t devhandle, uint64_t msinum, + uint64_t *msiqid); +int64_t hv_pci_msi_setmsiq(uint64_t devhandle, uint64_t msinum, + uint64_t msiqid); + +int64_t hv_pci_msi_getstate(uint64_t devhandle, uint64_t msinum, + uint64_t *msistate); +int64_t hv_pci_msi_setstate(uint64_t devhandle, uint64_t msinum, + uint64_t msistate); + +#define PCI_MSISTATE_IDLE 0 +#define PCI_MSISTATE_DELIVERED 1 + +int64_t hv_pci_msg_getmsiq(uint64_t devhandle, uint64_t msg, + uint64_t *msiqid); +int64_t hv_pci_msg_setmsiq(uint64_t devhandle, uint64_t msg, + uint64_t msiqid); + +int64_t hv_pci_msg_getvalid(uint64_t devhandle, uint64_t msg, + uint64_t *msgvalidstate); +int64_t hv_pci_msg_setvalid(uint64_t devhandle, uint64_t msg, + uint64_t msgvalidstate); + +#define PCIE_MSG_INVALID 0 +#define PCIE_MSG_VALID 1 + +#define PCIE_PME_MSG 0x18 +#define PCIE_PME_ACK_MSG 0x1b +#define PCIE_CORR_MSG 0x30 +#define PCIE_NONFATAL_MSG 0x31 +#define PCIE_FATAL_MSG 0x32 + +/* * Logical Domain Channel services */ diff --git a/sys/arch/sparc64/sparc64/hvcall.S b/sys/arch/sparc64/sparc64/hvcall.S index 390fc4696cf..30f12d08b2f 100644 --- a/sys/arch/sparc64/sparc64/hvcall.S +++ b/sys/arch/sparc64/sparc64/hvcall.S @@ -1,4 +1,4 @@ -/* $OpenBSD: hvcall.S,v 1.9 2009/12/31 11:50:33 kettenis Exp $ */ +/* $OpenBSD: hvcall.S,v 1.10 2011/06/25 20:45:00 kettenis Exp $ */ /* * Copyright (c) 2008 Mark Kettenis @@ -90,6 +90,26 @@ #define PCI_CONFIG_GET 0xb4 #define PCI_CONFIG_PUT 0xb5 +#define PCI_MSIQ_CONF 0xc0 +#define PCI_MSIQ_INFO 0xc1 +#define PCI_MSIQ_GETVALID 0xc2 +#define PCI_MSIQ_SETVALID 0xc3 +#define PCI_MSIQ_GETSTATE 0xc4 +#define PCI_MSIQ_SETSTATE 0xc5 +#define PCI_MSIQ_GETHEAD 0xc6 +#define PCI_MSIQ_SETHEAD 0xc7 +#define PCI_MSIQ_GETTAIL 0xc8 +#define PCI_MSI_GETVALID 0xc9 +#define PCI_MSI_SETVALID 0xca +#define PCI_MSI_GETMSIQ 0xcb +#define PCI_MSI_SETMSIQ 0xcc +#define PCI_MSI_GETSTATE 0xcd +#define PCI_MSI_SETSTATE 0xce +#define PCI_MSG_GETMSIQ 0xd0 +#define PCI_MSG_SETMSIQ 0xd1 +#define PCI_MSG_GETSTATE 0xd2 +#define PCI_MSG_SETSTATE 0xd3 + #define LDC_TX_QCONF 0xe0 #define LDC_TX_QINFO 0xe1 #define LDC_TX_GET_STATE 0xe2 @@ -416,6 +436,122 @@ ENTRY(hv_pci_config_put) retl stx %o1, [%g5] +ENTRY(hv_pci_msiq_conf) + mov PCI_MSIQ_CONF, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msiq_info) + mov %o2, %o4 + mov PCI_MSIQ_INFO, %o5 + ta FAST_TRAP + stx %o1, [%o4] + retl + stx %o2, [%o3] + +ENTRY(hv_pci_msiq_getvalid) + mov PCI_MSIQ_GETVALID, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msiq_setvalid) + mov PCI_MSIQ_SETVALID, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msiq_getstate) + mov PCI_MSIQ_GETSTATE, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msiq_setstate) + mov PCI_MSIQ_SETSTATE, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msiq_gethead) + mov PCI_MSIQ_GETHEAD, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msiq_sethead) + mov PCI_MSIQ_SETHEAD, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msiq_gettail) + mov PCI_MSIQ_GETTAIL, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msi_getvalid) + mov PCI_MSI_GETVALID, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msi_setvalid) + mov PCI_MSI_SETVALID, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msi_getmsiq) + mov PCI_MSI_GETMSIQ, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msi_setmsiq) + mov PCI_MSI_SETMSIQ, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msi_getstate) + mov PCI_MSI_GETSTATE, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msi_setstate) + mov PCI_MSI_SETSTATE, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msg_getmsiq) + mov PCI_MSG_GETMSIQ, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msg_setmsiq) + mov PCI_MSG_SETMSIQ, %o5 + ta FAST_TRAP + retl + nop + +ENTRY(hv_pci_msg_getstate) + mov PCI_MSG_GETSTATE, %o5 + ta FAST_TRAP + retl + stx %o1, [%o2] + +ENTRY(hv_pci_msg_setstate) + mov PCI_MSG_SETSTATE, %o5 + ta FAST_TRAP + retl + nop + ENTRY(hv_ldc_tx_qconf) mov LDC_TX_QCONF, %o5 ta FAST_TRAP |