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authorPer Fogelstrom <pefo@cvs.openbsd.org>1996-05-02 08:18:35 +0000
committerPer Fogelstrom <pefo@cvs.openbsd.org>1996-05-02 08:18:35 +0000
commit69170ad0a923b4ef79e86fcfd09c0a3a37e684cb (patch)
tree33d4ac50c050f84c01afd46d4f87a721482413fe /sys/arch
parent9def54258c3e79f268ef6174ecdb424c4334043b (diff)
New include file.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/pica/include/asm.h171
-rw-r--r--sys/arch/pica/include/bus.h126
-rw-r--r--sys/arch/pica/include/regnum.h136
3 files changed, 433 insertions, 0 deletions
diff --git a/sys/arch/pica/include/asm.h b/sys/arch/pica/include/asm.h
new file mode 100644
index 00000000000..f1dbf9e7b93
--- /dev/null
+++ b/sys/arch/pica/include/asm.h
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
+ * $Id: asm.h,v 1.1 1996/05/02 08:18:33 pefo Exp $
+ */
+
+/*
+ * machAsmDefs.h --
+ *
+ * Macros used when writing assembler programs.
+ *
+ * Copyright (C) 1989 Digital Equipment Corporation.
+ * Permission to use, copy, modify, and distribute this software and
+ * its documentation for any purpose and without fee is hereby granted,
+ * provided that the above copyright notice appears in all copies.
+ * Digital Equipment Corporation makes no representations about the
+ * suitability of this software for any purpose. It is provided "as is"
+ * without express or implied warranty.
+ *
+ * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
+ * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL)
+ * $Id: asm.h,v 1.1 1996/05/02 08:18:33 pefo Exp $
+ */
+
+#ifndef _MACHASMDEFS
+#define _MACHASMDEFS
+
+#include <machine/regdef.h>
+
+#define ABICALLS
+
+#define RCSID(x)
+
+#define _C_LABEL(x) x
+
+/*
+ * Define -pg profile entry code.
+ */
+#if defined(GPROF) || defined(PROF)
+#define MCOUNT .set noreorder; \
+ .set noat; \
+ move $1,$31; \
+ jal _mcount; \
+ subu sp,sp,8; \
+ .set reorder; \
+ .set at;
+#else
+#define MCOUNT
+#endif
+
+/*
+ * LEAF(x)
+ *
+ * Declare a leaf routine.
+ */
+#define LEAF(x) \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, 0, ra; \
+ MCOUNT
+
+/*
+ * NLEAF(x)
+ *
+ * Declare a non-profiled leaf routine.
+ */
+#define NLEAF(x) \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, 0, ra
+
+/*
+ * ALEAF -- declare alternate entry to a leaf routine.
+ */
+#define ALEAF(x) \
+ .globl x; \
+x:
+
+/*
+ * NON_LEAF(x)
+ *
+ * Declare a non-leaf routine (a routine that makes other C calls).
+ */
+#define NON_LEAF(x, fsize, retpc) \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, fsize, retpc; \
+ MCOUNT
+
+/*
+ * NNON_LEAF(x)
+ *
+ * Declare a non-profiled non-leaf routine
+ * (a routine that makes other C calls).
+ */
+#define NNON_LEAF(x, fsize, retpc) \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, fsize, retpc
+
+/*
+ * END(x)
+ *
+ * Mark end of a procedure.
+ */
+#define END(x) \
+ .end x
+
+#define STAND_FRAME_SIZE 24
+#define STAND_RA_OFFSET 20
+
+/*
+ * Macros to panic and printf from assembly language.
+ */
+#define PANIC(msg) \
+ la a0, 9f; \
+ jal panic; \
+ MSG(msg)
+
+#define PRINTF(msg) \
+ la a0, 9f; \
+ jal printf; \
+ MSG(msg)
+
+#define MSG(msg) \
+ .rdata; \
+9: .asciiz msg; \
+ .text
+
+#define ASMSTR(str) \
+ .asciiz str; \
+ .align 3
+
+#endif /* _MACHASMDEFS */
diff --git a/sys/arch/pica/include/bus.h b/sys/arch/pica/include/bus.h
new file mode 100644
index 00000000000..e6a5f66e126
--- /dev/null
+++ b/sys/arch/pica/include/bus.h
@@ -0,0 +1,126 @@
+/* $OpenBSD: bus.h,v 1.1 1996/05/02 08:18:34 pefo Exp $ */
+/* $NetBSD: bus.h,v 1.2 1996/04/05 23:59:37 thorpej Exp $ */
+
+/*
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _I386_BUS_H_
+#define _I386_BUS_H_
+
+#include <machine/pio.h>
+
+/*
+ * I/O addresses (in bus space)
+ */
+typedef u_long bus_io_addr_t;
+typedef u_long bus_io_size_t;
+
+/*
+ * Memory addresses (in bus space)
+ */
+typedef u_long bus_mem_addr_t;
+typedef u_long bus_mem_size_t;
+
+/*
+ * Access methods for bus resources, I/O space, and memory space.
+ */
+typedef void *bus_chipset_tag_t;
+typedef u_long bus_io_handle_t;
+typedef caddr_t bus_mem_handle_t;
+
+#define bus_io_map(t, port, size, iohp) \
+ (*iohp = port, 0)
+#define bus_io_unmap(t, ioh, size)
+
+#define bus_io_read_1(t, h, o) inb((h) + (o))
+#define bus_io_read_2(t, h, o) inw((h) + (o))
+#define bus_io_read_4(t, h, o) inl((h) + (o))
+#if 0 /* Cause a link error for bus_io_read_8 */
+#define bus_io_read_8(t, h, o) !!! bus_io_read_8 unimplemented !!!
+#endif
+
+#define bus_io_read_multi_1(t, h, o, a, c) \
+ insb((h) + (o), (a), (c))
+#define bus_io_read_multi_2(t, h, o, a, c) \
+ insw((h) + (o), (a), (c))
+#define bus_io_read_multi_4(t, h, o, a, c) \
+ insl((h) + (o), (a), (c))
+#if 0 /* Cause a link error for bus_io_read_multi_8 */
+#define bus_io_read_multi_8(t, h, o, a, c) \
+ !!! bus_io_read_multi_8 unimplemented !!!
+#endif
+
+#define bus_io_write_1(t, h, o, v) outb((h) + (o), (v))
+#define bus_io_write_2(t, h, o, v) outw((h) + (o), (v))
+#define bus_io_write_4(t, h, o, v) outl((h) + (o), (v))
+#if 0 /* Cause a link error for bus_io_write_8 */
+#define bus_io_write_8(t, h, o, v) !!! bus_io_write_8 unimplemented !!!
+#endif
+
+#define bus_io_write_multi_1(t, h, o, a, c) \
+ outsb((h) + (o), (a), (c))
+#define bus_io_write_multi_2(t, h, o, a, c) \
+ outsw((h) + (o), (a), (c))
+#define bus_io_write_multi_4(t, h, o, a, c) \
+ outsl((h) + (o), (a), (c))
+#if 0 /* Cause a link error for bus_io_write_multi_8 */
+#define bus_io_write_multi_8(t, h, o, a, c) \
+ !!! bus_io_write_multi_8 unimplimented !!!
+#endif
+
+int bus_mem_map __P((bus_chipset_tag_t t, bus_mem_addr_t bpa,
+ bus_mem_size_t size, int cacheable, bus_mem_handle_t *mhp));
+void bus_mem_unmap __P((bus_chipset_tag_t t, bus_mem_handle_t memh,
+ bus_mem_size_t size));
+
+#define bus_mem_read_1(t, h, o) (*(volatile u_int8_t *)((h) + (o)))
+#define bus_mem_read_2(t, h, o) (*(volatile u_int16_t *)((h) + (o)))
+#define bus_mem_read_4(t, h, o) (*(volatile u_int32_t *)((h) + (o)))
+#define bus_mem_read_8(t, h, o) (*(volatile u_int64_t *)((h) + (o)))
+
+#define bus_mem_write_1(t, h, o, v) \
+ ((void)(*(volatile u_int8_t *)((h) + (o)) = (v)))
+#define bus_mem_write_2(t, h, o, v) \
+ ((void)(*(volatile u_int16_t *)((h) + (o)) = (v)))
+#define bus_mem_write_4(t, h, o, v) \
+ ((void)(*(volatile u_int32_t *)((h) + (o)) = (v)))
+#define bus_mem_write_8(t, h, o, v) \
+ ((void)(*(volatile u_int64_t *)((h) + (o)) = (v)))
+
+/* These are extensions to the general NetBSD bus interface. */
+#define bus_to_host_2(t, v) (v)
+#define bus_to_host_4(t, v) (v)
+#define bus_to_host_8(t, v) (v)
+
+#define bus_from_host_2(t, v) (v)
+#define bus_from_host_4(t, v) (v)
+#define bus_from_host_8(t, v) (v)
+
+#endif /* _I386_BUS_H_ */
diff --git a/sys/arch/pica/include/regnum.h b/sys/arch/pica/include/regnum.h
new file mode 100644
index 00000000000..506646d3b22
--- /dev/null
+++ b/sys/arch/pica/include/regnum.h
@@ -0,0 +1,136 @@
+/* $NetBSD: reg.h,v 1.5 1995/01/18 06:40:12 mellon Exp $ */
+
+/*
+ * Copyright (c) 1988 University of Utah.
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department and Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: Utah Hdr: reg.h 1.1 90/07/09
+ *
+ * @(#)reg.h 8.2 (Berkeley) 1/11/94
+ */
+
+/*
+ * Location of the users' stored
+ * registers relative to ZERO.
+ * Usage is p->p_regs[XX].
+ */
+#define ZERO 0
+#define AST 1
+#define V0 2
+#define V1 3
+#define A0 4
+#define A1 5
+#define A2 6
+#define A3 7
+#define T0 8
+#define T1 9
+#define T2 10
+#define T3 11
+#define T4 12
+#define T5 13
+#define T6 14
+#define T7 15
+#define S0 16
+#define S1 17
+#define S2 18
+#define S3 19
+#define S4 20
+#define S5 21
+#define S6 22
+#define S7 23
+#define T8 24
+#define T9 25
+#define K0 26
+#define K1 27
+#define GP 28
+#define SP 29
+#define S8 30
+#define RA 31
+#define SR 32
+#define PS SR /* alias for SR */
+#define MULLO 33
+#define MULHI 34
+#define BADVADDR 35
+#define CAUSE 36
+#define PC 37
+
+#define FPBASE 38
+#define F0 (FPBASE+0)
+#define F1 (FPBASE+1)
+#define F2 (FPBASE+2)
+#define F3 (FPBASE+3)
+#define F4 (FPBASE+4)
+#define F5 (FPBASE+5)
+#define F6 (FPBASE+6)
+#define F7 (FPBASE+7)
+#define F8 (FPBASE+8)
+#define F9 (FPBASE+9)
+#define F10 (FPBASE+10)
+#define F11 (FPBASE+11)
+#define F12 (FPBASE+12)
+#define F13 (FPBASE+13)
+#define F14 (FPBASE+14)
+#define F15 (FPBASE+15)
+#define F16 (FPBASE+16)
+#define F17 (FPBASE+17)
+#define F18 (FPBASE+18)
+#define F19 (FPBASE+19)
+#define F20 (FPBASE+20)
+#define F21 (FPBASE+21)
+#define F22 (FPBASE+22)
+#define F23 (FPBASE+23)
+#define F24 (FPBASE+24)
+#define F25 (FPBASE+25)
+#define F26 (FPBASE+26)
+#define F27 (FPBASE+27)
+#define F28 (FPBASE+28)
+#define F29 (FPBASE+29)
+#define F30 (FPBASE+30)
+#define F31 (FPBASE+31)
+#define FSR (FPBASE+32)
+
+#ifdef IPCREG
+#define NIPCREG (FSR + 1)
+int ipcreg[NIPCREG] = {
+ ZERO, AST, V0, V1, A0, A1, A2, A3, T0, T1, T2, T3, T4, T5, T6, T7,
+ S0, S1, S2, S3, S4, S5, S6, S7, T8, T9, K0, K1, GP, SP, S8, RA,
+ SR, MULLO, MULHI, BADVADDR, CAUSE, PC,
+ F0, F1, F2, F3, F4, F5, F6, F7,
+ F8, F9, F10, F11, F12, F13, F14, F15,
+ F16, F17, F18, F19, F20, F21, F22, F23,
+ F24, F25, F26, F27, F28, F29, F30, F31, FSR,
+};
+#endif