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authorMiod Vallat <miod@cvs.openbsd.org>2010-04-25 21:02:52 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2010-04-25 21:02:52 +0000
commit7200736961847145d609e3ea8d3029259a057248 (patch)
treed4fd3be93a5c45955ed44a7e76fce56a69fd1942 /sys/arch
parent06c7623928a1702606c72cb47dda74d774010731 (diff)
Simplify the 6:1 pfsr extraction block: process data CMMU first, and do not
bother zeroing fault registers of CMMU which did not report faults.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/aviion/aviion/eh.S41
1 files changed, 18 insertions, 23 deletions
diff --git a/sys/arch/aviion/aviion/eh.S b/sys/arch/aviion/aviion/eh.S
index 99b0de93575..d1492ba1ccc 100644
--- a/sys/arch/aviion/aviion/eh.S
+++ b/sys/arch/aviion/aviion/eh.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: eh.S,v 1.6 2010/04/18 22:04:37 miod Exp $ */
+/* $OpenBSD: eh.S,v 1.7 2010/04/25 21:02:51 miod Exp $ */
/*
* Copyright (c) 2006, 2010 Miodrag Vallat
*
@@ -83,44 +83,39 @@ ENTRY(pfsr_straight)
ENTRY(pfsr_six)
/*
- * 6 CMMU (2D4I) per CPU.
- * This is the worst situation. We handle the data CMMU first,
- * using the cpu_info pointers; and then the instruction CMMU,
- * relying upon them being set up every 0x1000 bytes in the
- * address space.
+ * 6 CMMU (2D4I) per CPU - this is the worst situation.
+ * We handle the instruction CMMU relying upon them being set up
+ * every 0x1000 bytes in the address space. Data CMMU can use
+ * the per-cpu_info pfsr pointers as usual.
*/
- ld TMP2, TMP, CI_PFSR_D0
+ ld TMP2, TMP, CI_PFSR_I0
ld TMP3, TMP2, r0
extu TMP3, TMP3, 3<16>
bcnd ne0, TMP3, 1f
- st r0, TMP2, r0
- ld TMP2, TMP, CI_PFSR_D1
-1:
- ld TMP3, TMP2, r0
- st r0, TMP2, r0
- st TMP3, r31, EF_DPFSR
- ld TMP2, TMP, CI_PFSR_I0
+ addu TMP2, TMP2, 0x1000 /* I1 */
ld TMP3, TMP2, r0
extu TMP3, TMP3, 3<16>
- bcnd ne0, TMP3, 2f
- st r0, TMP2, r0
+ bcnd ne0, TMP3, 1f
- addu TMP2, TMP2, 0x1000 /* I1 */
+ addu TMP2, TMP2, 0x1000 /* I2 */
ld TMP3, TMP2, r0
extu TMP3, TMP3, 3<16>
- bcnd ne0, TMP3, 2f
+ bcnd ne0, TMP3, 1f
+
+ addu TMP2, TMP2, 0x1000 /* I3 */
+1:
+ ld TMP3, TMP2, r0
st r0, TMP2, r0
+ st TMP3, r31, EF_IPFSR
- addu TMP2, TMP2, 0x1000 /* I2 */
+ ld TMP2, TMP, CI_PFSR_D0
ld TMP3, TMP2, r0
extu TMP3, TMP3, 3<16>
bcnd ne0, TMP3, 2f
- st r0, TMP2, r0
-
- addu TMP2, TMP2, 0x1000 /* I3 */
+ addu TMP2, TMP2, 0x1000 /* D1 */
2:
ld TMP3, TMP2, r0
st r0, TMP2, r0
br.n _ASM_LABEL(pfsr_done)
- st TMP3, r31, EF_IPFSR
+ st TMP3, r31, EF_DPFSR