Replace assembly statement triggering 88410 commands with a proper volatile

uint64_t write. While there, implement a real wbinv routine instead of invoking
wb, then inv; this avoids unnecessary busswitch register juggling.

2 files changed, 50 insertions, 27 deletions

diff --git a/sys/arch/mvme88k/include/m88410.h b/sys/arch/mvme88k/include/m88410.h
index ad8201c3297..f52b544c270 100644
--- a/sys/arch/mvme88k/include/m88410.h
+++ b/sys/arch/mvme88k/include/m88410.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m88410.h,v 1.14 2011/03/23 16:54:36 pirofti Exp $ */
+/*	$OpenBSD: m88410.h,v 1.15 2013/02/17 18:10:01 miod Exp $ */
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
  * All rights reserved.
@@ -42,16 +42,10 @@
 
 #include <mvme88k/dev/busswreg.h>
 
-void	mc88410_wb_page(paddr_t);
-void	mc88410_wb(void);
 void	mc88410_inv(void);
-
-static __inline__ void
-mc88410_wbinv(void)
-{
-	mc88410_wb();
-	mc88410_inv();
-}
+void	mc88410_wb(void);
+void	mc88410_wbinv(void);
+void	mc88410_wb_page(paddr_t);
 
 static __inline__ int
 mc88410_present(void)
diff --git a/sys/arch/mvme88k/mvme88k/m88410.c b/sys/arch/mvme88k/mvme88k/m88410.c
index d0fd9df1102..cd4de705ecd 100644
--- a/sys/arch/mvme88k/mvme88k/m88410.c
+++ b/sys/arch/mvme88k/mvme88k/m88410.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: m88410.c,v 1.6 2013/01/05 11:20:56 miod Exp $	*/
+/*	$OpenBSD: m88410.c,v 1.7 2013/02/17 18:10:01 miod Exp $	*/
 /*
  * Copyright (c) 2001 Steve Murphree, Jr.
  * All rights reserved.
@@ -90,18 +90,14 @@ mc88410_wb_page(paddr_t physaddr)
 	*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
 
 	/* send command */
-	__asm__ __volatile__ (
-	    "or   %%r2, %%r0, %0\n\t"
-	    "or   %%r3, %%r0, %%r0\n\t"
-	    "st.d %%r2, %1, 0" :: "i" (XCC_WB_PAGE), "r" (xccaddr) : "r2", "r3");
+	*(volatile uint64_t *)xccaddr = (uint64_t)XCC_WB_PAGE << 32;
 
 	/* spin until the operation is complete */
 	while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
 		;
 
 	/* restore PSR and friends */
-        set_psr(psr);
-	flush_pipeline();
+	set_psr(psr);
 	*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
 	*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
 }
@@ -122,10 +118,7 @@ mc88410_wb(void)
 	*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
 
 	/* send command */
-	__asm__ __volatile__ (
-	    "or   %%r2, %%r0, %0\n\t"
-	    "or   %%r3, %%r0, %%r0\n\t"
-	    "st.d %%r2, %1, 0" :: "i" (XCC_WB_ALL), "r" (XCC_ADDR) : "r2", "r3");
+	*(volatile uint64_t *)XCC_ADDR = (uint64_t)XCC_WB_ALL << 32;
 
 	/* spin until the operation is complete */
 	while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
@@ -139,7 +132,6 @@ void
 mc88410_inv(void)
 {
 	u_int16_t bs_gcsr, bs_romcr;
-	u_int32_t dummy;
 
 	bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
 	bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
@@ -152,17 +144,54 @@ mc88410_inv(void)
 	*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
 
 	/* send command */
-	__asm__ __volatile__ (
-	    "or   %%r2, %%r0, %0\n\t"
-	    "or   %%r3, %%r0, %%r0\n\t"
-	    "st.d %%r2, %1, 0" :: "i" (XCC_INV_ALL), "r" (XCC_ADDR) : "r2", "r3");
+	*(volatile uint64_t *)XCC_ADDR = (uint64_t)XCC_INV_ALL << 32;
 
 	/*
 	 * The 88410 will not let the 88110 access it until the
 	 * invalidate all operation is complete. Simply force a read
 	 * access which will spin as long as necessary.
 	 */
-	dummy = *(volatile u_int32_t *)(BS_BASE + BS_XCCR);
+	(void)*(volatile u_int32_t *)(BS_BASE + BS_XCCR);
+
+	/* just in case it didn't, spin until the operation is complete */
+	while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
+		;
+
+	*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr;
+	*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) = bs_romcr;
+}
+
+void
+mc88410_wbinv(void)
+{
+	u_int16_t bs_gcsr, bs_romcr;
+
+	bs_gcsr = *(volatile u_int16_t *)(BS_BASE + BS_GCSR);
+	bs_romcr = *(volatile u_int16_t *)(BS_BASE + BS_ROMCR);
+
+	/* clear WEN0 and WEN1 in ROMCR (disables writes to FLASH) */
+	*(volatile u_int16_t *)(BS_BASE + BS_ROMCR) =
+	    bs_romcr & ~(BS_ROMCR_WEN0 | BS_ROMCR_WEN1);
+
+	/* set XCC bit in GCSR (0xFF8xxxxx now decodes to mc88410) */
+	*(volatile u_int16_t *)(BS_BASE + BS_GCSR) = bs_gcsr | BS_GCSR_XCC;
+
+	/* send wb command */
+	*(volatile uint64_t *)XCC_ADDR = (uint64_t)XCC_WB_ALL << 32;
+
+	/* spin until the operation is complete */
+	while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)
+		;
+
+	/* send inv command */
+	*(volatile uint64_t *)XCC_ADDR = (uint64_t)XCC_INV_ALL << 32;
+
+	/*
+	 * The 88410 will not let the 88110 access it until the
+	 * invalidate all operation is complete. Simply force a read
+	 * access which will spin as long as necessary.
+	 */
+	(void)*(volatile u_int32_t *)(BS_BASE + BS_XCCR);
 
 	/* just in case it didn't, spin until the operation is complete */
 	while ((*(volatile u_int32_t *)(BS_BASE + BS_XCCR) & BS_XCC_FBSY) != 0)