better faster scooter^Winterrupts; miod@ testing

2 files changed, 119 insertions, 95 deletions

diff --git a/sys/arch/hppa/hppa/intr.c b/sys/arch/hppa/hppa/intr.c
index 8cdf2cf8cf9..ad04d4ad8cb 100644
--- a/sys/arch/hppa/hppa/intr.c
+++ b/sys/arch/hppa/hppa/intr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr.c,v 1.17 2004/04/07 18:24:19 mickey Exp $	*/
+/*	$OpenBSD: intr.c,v 1.18 2004/05/04 23:53:07 mickey Exp $	*/
 
 /*
  * Copyright (c) 2002-2004 Michael Shalayeff
@@ -42,27 +42,31 @@ void softtty(void);
 
 struct hppa_iv {
 	char pri;
-	char bit;
+	char irq;
 	char flags;
 #define	HPPA_IV_CALL	0x01
 #define	HPPA_IV_SOFT	0x02
 	char pad;
+	int pad2;
 	int (*handler)(void *);
 	void *arg;
 	struct hppa_iv *next;
 	struct hppa_iv *share;
-	int pad2[3];
+	u_int bit;
+	int *cnt;
 } __packed;
 
 register_t kpsw = PSL_Q | PSL_P | PSL_C | PSL_D;
+extern int intrcnt[];
 volatile int cpu_inintr, cpl = IPL_NESTED;
 u_long cpu_mask;
-struct hppa_iv *intr_list, intr_store[8*2*CPU_NINTS], *intr_more = intr_store;
-struct hppa_iv intr_table[CPU_NINTS] = {
-	{ IPL_SOFTCLOCK, 0, HPPA_IV_SOFT, 0, (int (*)(void *))&softclock },
-	{ IPL_SOFTNET  , 0, HPPA_IV_SOFT, 0, (int (*)(void *))&softnet },
+struct hppa_iv intr_store[8*2*CPU_NINTS] __attribute__ ((aligned(32))),
+    *intr_more = intr_store, *intr_list;
+struct hppa_iv intr_table[CPU_NINTS] __attribute__ ((aligned(32))) = {
+	{ IPL_SOFTCLOCK, 0, HPPA_IV_SOFT, 0, 0, (int (*)(void *))&softclock },
+	{ IPL_SOFTNET  , 0, HPPA_IV_SOFT, 0, 0, (int (*)(void *))&softnet },
 	{ 0 }, { 0 },
-	{ IPL_SOFTTTY  , 0, HPPA_IV_SOFT, 0, (int (*)(void *))&softtty }
+	{ IPL_SOFTTTY  , 0, HPPA_IV_SOFT, 0, 0, (int (*)(void *))&softtty }
 };
 volatile u_long ipending, imask[NIPL] = {
 	0,
@@ -117,13 +121,13 @@ cpu_intr_init(void)
 			if (!bit--)
 				panic("cpu_intr_init: out of bits");
 
-			iv->bit = 31 - bit;
 			iv->next = NULL;
+			iv->bit = 1 << bit;
 			intr_table[bit] = *iv;
 			mask |= (1 << bit);
 			imask[(int)iv->pri] |= (1 << bit);
 		} else {
-			iv->bit = 31 - bit;
+			iv->bit = 1 << bit;
 			iv->next = intr_table[bit].next;
 			intr_table[bit].next = iv;
 		}
@@ -171,10 +175,11 @@ cpu_intr_map(void *v, int pri, int irq, int (*handler)(void *), void *arg,
 	}
 
 	iv->pri = pri;
-	iv->bit = irq;
+	iv->irq = irq;
 	iv->flags = 0;
 	iv->handler = handler;
 	iv->arg = arg;
+	iv->cnt = &intrcnt[pri];
 	iv->next = intr_list;
 	intr_list = iv;
 
@@ -195,10 +200,12 @@ cpu_intr_establish(int pri, int irq, int (*handler)(void *), void *arg,
 
 	iv = &intr_table[irq];
 	iv->pri = pri;
-	iv->bit = 31 - irq;
+	iv->irq = irq;
+	iv->bit = 1 << irq;
 	iv->flags = 0;
 	iv->handler = handler;
 	iv->arg = arg;
+	iv->cnt = &intrcnt[pri];
 	iv->next = NULL;
 	iv->share = NULL;
 
diff --git a/sys/arch/hppa/hppa/locore.S b/sys/arch/hppa/hppa/locore.S
index 4d5e834d829..a6817273cf6 100644
--- a/sys/arch/hppa/hppa/locore.S
+++ b/sys/arch/hppa/hppa/locore.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.S,v 1.129 2004/04/21 22:25:31 mickey Exp $	*/
+/*	$OpenBSD: locore.S,v 1.130 2004/05/04 23:53:07 mickey Exp $	*/
 
 /*
  * Copyright (c) 1998-2004 Michael Shalayeff
@@ -881,11 +881,10 @@ $syscall_end
 #define	TLABEL(name)	$trap$name
 #define	TELABEL(num)	__CONCAT(trap_ep_,num)
 #define TRAP(name,num) \
-	.import TLABEL(name), code	! \
 	mtctl	r1, tr7			! \
-	ldil	L%TLABEL(name), r1	! \
 	.call				! \
-	be	R%TLABEL(name)(sr7, r1)	! \
+	.import TLABEL(name), code	! \
+	b	TLABEL(name)		! \
 	ldi	num, r1			! \
 	.align	32
 
@@ -952,9 +951,10 @@ LDILDO(tlbd_l)
 	mfctl	isr, r8		/* Space  */			! \
 	depi	0,31,PGSHIFT,r9	/* align offset to page */
 	/* CR28XXX according to a popular belief cr28 should be read here */
+
 #define	HPMCPRE	nop
 #define	INTRPRE	\
-	mfctl	eirr, r8 ! \
+	mfctl	eirr, r8	! \
 	mtctl	r8, eirr
 
 	.align NBPG
@@ -1946,16 +1946,44 @@ ALTENTRY(hppa_pfr_end)
 	.word	0
 EXIT(hppa_pfr)
 
-	.export	TLABEL(intr), entry
+#if 0
+	.align	8
+intr_ticks
+	.word	0, 0
+
+#define	INTR_PROF_PRE \
+	mfctl	itmr, r9		! \
+	mtctl	r9, tr5
+#define	INTR_PROF_AFT \
+	mfctl	itmr, r8		! \
+	mfctl	tr5, r9			! \
+	ldil	L%intr_ticks, r1	! \
+	ldo	R%intr_ticks(r1), r1	! \
+	sub	r8, r9, r8		! \
+	ldw	0(r1), r16		! \
+	ldw	4(r1), r17		! \
+	add	r8, r16, r16		! \
+	addi	1, r17, r17		! \
+	stw	r16, 0(r1)		! \
+	stw	r17, 4(r1)
+#else
+#define	INTR_PROF_PRE	/* */
+#define	INTR_PROF_AFT	/* */
+#endif
+
 	.import	cpl, data
 	.import	ipending, data
 	.import	imask, data
 	.import	intr_table, data
+	.align	32
 ENTRY(TLABEL(intr),0)
-	/* r8 set to eirr in the INTRPRE */
+	/*
+	 * r8 is set to eirr in the INTRPRE
+	 */
+
+	INTR_PROF_PRE
 
 	bb,>=,n	r8, 0, $intr_noclock
-	nop
 
 	/* reload the itmr */
 	ldil	L%cpu_hzticks, r25	/* those both are aligned properly */
@@ -1967,48 +1995,52 @@ ENTRY(TLABEL(intr),0)
 	stw	r16, R%cpu_itmr(r25)
 
 $intr_noclock
+	ldil	L%intr_table + 32*32, r1
+	ldo	R%intr_table + 32*32(r1), r1
 	ldil	L%ipending, r17
+	b	$intr_cont
 	ldw	R%ipending(r17), r24
-	ldil	L%intr_table, r1
-	ldo	R%intr_table(r1), r1
+
 $intr_ffs
-	addi	32, r1, r1
-	bb,>=	r8, 31, $intr_ffs
-	shd	r0, r8, 1, r8
+	addi	-32, r1, r1
+	bb,>=	r8, 0, $intr_ffs
+	zdep	r8, 30, 31, r8
 
-	ldb	2-32(r1), r17
-	ldw	4-32(r1), r9
-	subi,<>	1, r17, r0
-	bv,n	r0(r9)
-	nop
+	ldw	0(r1), r17
+	bb,>=,n	r17, 23, $intr_nocall
 
-	mfctl	sar, r25
-	ldb	1-32(r1), r9
-	mtsar	r9
-	vdepi	1, 1, r24
-	mtsar	r25
+	ldw	2*4(r1), r16	/* func */
+	ldw	3*4(r1), r9	/* arg: ioreg */
+	mtctl	r1, tr7
+	bv	r0(r16)
+	ldw	4*4(r1), r1	/* next: sub-intr_table */
 
-	ldb	0-32(r1), r9
-	ldil	L%intrcnt, r25
-	ldo	R%intrcnt(r25), r25
-	sh2add	r9, r25, r25
-	ldw	0(r25), r17
-	addi	1, r17, r17
-	stw	r17, 0(r25)
+$intr_nocall
+	ldw	6*4(r1), r17	/* bit */
+	ldw	7*4(r1), r25	/* &intrcnt[pri] */
+	or	r17, r24, r24	/* ipending */
 
+	ldw	0(r25), r9
+	addi	1, r9, r9
+	stw	r9, 0(r25)
+
+	/* also return from nested handlers */
 $intr_cont
-	comb,<>	r0, r8, $intr_ffs
-	nop
+	comb,<>,n r0, r8, $intr_ffs
+	ldw	-32(r1), r0	/* preload cache */
 
-	ldil	L%ipending, r17
-	stw	r24, R%ipending(r17)
+	ldil	L%ipending, r25
+	stw	r24, R%ipending(r25)
 	ldil	L%cpl, r17
 	ldw	R%cpl(r17), r17
-	ldil	L%imask, r9
-	ldo	R%imask(r9), r9
-	ldwx,s	r17(r9), r16
+	ldil	L%imask, r16
+	ldo	R%imask(r16), r16
+	ldwx,s	r17(r16), r25
+
+	INTR_PROF_AFT
+
 	ldi	T_INTERRUPT, r1
-	andcm,=	r24, r16, r0
+	andcm,=	r24, r25, r0
 	b	TLABEL(all)
 	nop
 
@@ -2016,15 +2048,20 @@ $intr_cont
 	nop
 EXIT(TLABEL(intr))
 
-	.export	gsc_intr, entry
+/*
+ * called with:
+ *	r1	sub intr_table
+ *	r9	ioregs
+ *	r24	ipending (in/out)
+ *	tr7	saved r1 (restore on return)
+ * free:
+ *	r9, r16, r17, r25
+ */
+	.align	32
 LEAF_ENTRY(gsc_intr)
-
-	ldw	8-32(r1), r9	/* arg: ioreg */
-	mtctl	r1, tr7
 	ldw	0(r9), r16	/* irr */
 
-	ldw	12-32(r1), r1	/* next: sub-intr_table */
-
+	/* we know that first 5 bits are never used ... should skip */
 $gsc_intr_loop
 	comb,=,n r0, r16, $intr_cont
 	mfctl	tr7, r1
@@ -2033,37 +2070,26 @@ $gsc_ffs
 	bb,>=	r16, 31, $gsc_ffs
 	shd	r0, r16, 1, r16
 
-	copy	r1, r9
+	ldo	-32(r1), r9
 $gsc_share
-	mfctl	sar, r25
-	ldb	1-32(r1), r17
-	mtsar	r17
-	vdepi	1, 1, r24
-	mtsar	r25
-
-	ldb	0-32(r1), r17
-	ldil	L%intrcnt, r25
-	ldo	R%intrcnt(r25), r25
-	sh2add	r17, r25, r25
+	ldw	6*4(r9), r17	/* bit */
+	ldw	7*4(r9), r25	/* &intrcnt[pri] */
+	or	r17, r24, r24	/* ipending */
+
 	ldw	0(r25), r17
+	ldw	5*4(r9), r9	/* share */
 	addi	1, r17, r17
+	comb,<>	r0, r9, $gsc_share
 	stw	r17, 0(r25)
 
-	ldw	16-32(r1), r17
-	comb,<>,n r0, r17, $gsc_share
-	ldo	32(r17), r1
-
-	b	$gsc_intr_loop
-	copy	r9, r1
+	b,n	$gsc_intr_loop
 EXIT(gsc_intr)
 
-	.export	dino_intr, entry
+	/* see above for calling conventions */
+	.align	32
 LEAF_ENTRY(dino_intr)
-	ldw	8-32(r1), r9	/* arg: ioreg */
-	mtctl	r1, tr7
-	ldw	12(r9), r16	/* irr0 */
+	ldw	3*4(r9), r16	/* irr0 */
 
-	ldw	12-32(r1), r1	/* next: sub-intr_table */
 $dino_intr_loop
 	comb,=,n r0, r16, $intr_cont
 	mfctl	tr7, r1
@@ -2072,28 +2098,19 @@ $dino_ffs
 	bb,>=	r16, 31, $dino_ffs
 	shd	r0, r16, 1, r16
 
-	copy	r1, r9
+	ldo	-32(r1), r9
 $dino_share
-	mfctl	sar, r25
-	ldb	1-32(r1), r17
-	mtsar	r17
-	vdepi	1, 1, r24
-	mtsar	r25
-
-	ldb	0-32(r1), r17
-	ldil	L%intrcnt, r25
-	ldo	R%intrcnt(r25), r25
-	sh2add	r17, r25, r25
+	ldw	6*4(r9), r17	/* bit */
+	ldw	7*4(r9), r25	/* &intrcnt[pri] */
+	or	r17, r24, r24	/* ipending */
+
 	ldw	0(r25), r17
+	ldw	5*4(r9), r9	/* share */
 	addi	1, r17, r17
+	comb,<>	r0, r9, $dino_share
 	stw	r17, 0(r25)
 
-	ldw	16-32(r1), r17
-	comb,<>,n r0, r17, $dino_share
-	ldo	32(r17), r1
-
-	b	$dino_intr_loop
-	copy	r9, r1
+	b,n	$dino_intr_loop
 EXIT(dino_intr)
 
 	.export	TLABEL(ibrk), entry