Arm64 compilers like many others anymore will use floating point registers

for non-foating point data, so it is important that FPU state be
saved and restored when a signal is delivered.

This diff that performs a save and restore of all of the floating point
registers (not just the callee save registers). It is added to sigcode
running in userland instead of into the kernel with copyin()/copyout()
similar to the code in powerpc (macppc) locore.S

2 files changed, 47 insertions, 4 deletions

diff --git a/sys/arch/arm64/arm64/locore.S b/sys/arch/arm64/arm64/locore.S
index 0c4c75427aa..f56bef7bce5 100644
--- a/sys/arch/arm64/arm64/locore.S
+++ b/sys/arch/arm64/arm64/locore.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.S,v 1.18 2017/06/04 14:21:49 patrick Exp $ */
+/* $OpenBSD: locore.S,v 1.19 2017/08/08 21:52:41 drahn Exp $ */
 /*-
  * Copyright (c) 2012-2014 Andrew Turner
  * All rights reserved.
@@ -98,6 +98,49 @@ initstack_end:
 
 	.text
 ENTRY(sigcode)
+	sub	sp, sp, #17 * 32
+	mov	x3, sp
+	stp	q0, q1, [x3], #32
+	stp	q2, q3, [x3], #32
+	stp	q4, q5, [x3], #32
+	stp	q6, q7, [x3], #32
+	stp	q8, q9, [x3], #32
+	stp	q10, q11, [x3], #32
+	stp	q12, q13, [x3], #32
+	stp	q14, q15, [x3], #32
+	stp	q16, q17, [x3], #32
+	stp	q18, q19, [x3], #32
+	stp	q20, q21, [x3], #32
+	stp	q22, q23, [x3], #32
+	stp	q24, q25, [x3], #32
+	stp	q26, q27, [x3], #32
+	stp	q28, q29, [x3], #32
+	stp	q30, q31, [x3], #32
+	mrs	x4, fpsr
+	mrs	x5, fpcr
+	stp	w4, w5, [x3]
+	blr	lr
+	mov	x3, sp
+	ldp	q0, q1, [x3], #32
+	ldp	q2, q3, [x3], #32
+	ldp	q4, q5, [x3], #32
+	ldp	q6, q7, [x3], #32
+	ldp	q8, q9, [x3], #32
+	ldp	q10, q11, [x3], #32
+	ldp	q12, q13, [x3], #32
+	ldp	q14, q15, [x3], #32
+	ldp	q16, q17, [x3], #32
+	ldp	q18, q19, [x3], #32
+	ldp	q20, q21, [x3], #32
+	ldp	q22, q23, [x3], #32
+	ldp	q24, q25, [x3], #32
+	ldp	q26, q27, [x3], #32
+	ldp	q28, q29, [x3], #32
+	ldp	q30, q31, [x3], #32
+	ldp	w4, w5, [x3]
+	mrs	x4, fpsr
+	mrs	x5, fpcr
+	add	sp, sp, #17 * 32
 	mov	x0, sp
 	add	x0, x0, #SF_SC
 
diff --git a/sys/arch/arm64/arm64/sig_machdep.c b/sys/arch/arm64/arm64/sig_machdep.c
index f8604fec018..739544a5424 100644
--- a/sys/arch/arm64/arm64/sig_machdep.c
+++ b/sys/arch/arm64/arm64/sig_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: sig_machdep.c,v 1.3 2017/03/12 17:57:12 kettenis Exp $ */
+/*	$OpenBSD: sig_machdep.c,v 1.4 2017/08/08 21:52:41 drahn Exp $ */
 
 /*
  * Copyright (c) 1990 The Regents of the University of California.
@@ -159,10 +159,10 @@ sendsig(sig_t catcher, int sig, int returnmask, u_long code, int type,
 	tf->tf_x[0] = sig;
 	tf->tf_x[1] = (register_t)sip;
 	tf->tf_x[2] = (register_t)&fp->sf_sc;
-	tf->tf_elr = (register_t)catcher;
+	tf->tf_lr = (register_t)catcher;
 	tf->tf_sp = (register_t)fp;
 
-	tf->tf_lr = p->p_p->ps_sigcode;
+	tf->tf_elr = p->p_p->ps_sigcode;
 }
 
 /*