Fix LEAF usage adding new extra arg. spotted by miod.

10 files changed, 86 insertions, 86 deletions

diff --git a/sys/arch/mips64/mips64/cache_r5k.S b/sys/arch/mips64/mips64/cache_r5k.S
index 6610569b3d5..a0a2b51a81f 100644
--- a/sys/arch/mips64/mips64/cache_r5k.S
+++ b/sys/arch/mips64/mips64/cache_r5k.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cache_r5k.S,v 1.5 2004/09/09 22:11:38 pefo Exp $ */
+/*	$OpenBSD: cache_r5k.S,v 1.6 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 1998-2004 Opsycon AB (www.opsycon.se)
@@ -166,7 +166,7 @@
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_ConfigCache)
+LEAF(Mips5k_ConfigCache, 0)
 	.set	noreorder
 	mfc0	v1, COP_0_PRID			# read processor ID register
 	mfc0	v0, COP_0_CONFIG		# Get configuration register
@@ -372,7 +372,7 @@ END(Mips5k_ConfigCache)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_SyncCache)
+LEAF(Mips5k_SyncCache, 0)
 	.set	noreorder
 	lw	t1, CpuPrimaryInstCacheSize
 	lw	t2, CpuPrimaryDataCacheSize
@@ -489,7 +489,7 @@ END(Mips5k_SyncCache)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_InvalidateICachePage)
+LEAF(Mips5k_InvalidateICachePage, 0)
 #ifdef CPUR4600
 	mfc0	v1, COP_0_STATUS_REG		# Save the status register.
 	li	v0, SR_DIAG_DE
@@ -537,7 +537,7 @@ END(Mips5k_InvalidateICachePage)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_InvalidateICache)
+LEAF(Mips5k_InvalidateICache, 0)
 #ifdef CPUR4600
 	mfc0	v1, COP_0_STATUS_REG		# Save the status register.
 	li	v0, SR_DIAG_DE
@@ -601,7 +601,7 @@ END(Mips5k_InvalidateICache)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_SyncDCachePage)
+LEAF(Mips5k_SyncDCachePage, 0)
 #ifdef CPUR4600
 	mfc0	v1, COP_0_STATUS_REG		# Save the status register.
 	li	v0, SR_DIAG_DE
@@ -681,7 +681,7 @@ END(Mips5k_SyncDCachePage)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_HitSyncDCache)
+LEAF(Mips5k_HitSyncDCache, 0)
 #ifdef CPUR4600
 	mfc0	v1, COP_0_STATUS_REG		# Save the status register.
 	li	v0, SR_DIAG_DE
@@ -736,7 +736,7 @@ END(Mips5k_HitSyncDCache)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_HitSyncSCache)
+LEAF(Mips5k_HitSyncSCache, 0)
 #ifdef CPUR4600
 	mfc0	v1, COP_0_STATUS_REG		# Save the status register.
 	li	v0, SR_DIAG_DE
@@ -785,7 +785,7 @@ END(Mips5k_HitSyncSCache)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_HitInvalidateDCache)
+LEAF(Mips5k_HitInvalidateDCache, 0)
 #ifdef CPUR4600
 	mfc0	v1, COP_0_STATUS_REG		# Save the status register.
 	li	v0, SR_DIAG_DE
@@ -835,7 +835,7 @@ END(Mips5k_HitInvalidateDCache)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(Mips5k_HitInvalidateSCache)
+LEAF(Mips5k_HitInvalidateSCache, 0)
 #ifdef CPUR4600
 	mfc0	v1, COP_0_STATUS_REG		# Save the status register.
 	li	v0, SR_DIAG_DE
diff --git a/sys/arch/mips64/mips64/context.S b/sys/arch/mips64/mips64/context.S
index 7c1b835f9dd..490ce7ad7a6 100644
--- a/sys/arch/mips64/mips64/context.S
+++ b/sys/arch/mips64/mips64/context.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: context.S,v 1.4 2004/09/09 22:11:38 pefo Exp $ */
+/*	$OpenBSD: context.S,v 1.5 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 2002-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -47,7 +47,7 @@
 /*
  * Save registers and state used by reboot to take snapshot.
  */
-LEAF(savectx)
+LEAF(savectx, 0)
 	REG_S	s0, U_PCB_CONTEXT+0*REGSZ(a0)
 	REG_S	s1, U_PCB_CONTEXT+1*REGSZ(a0)
 	REG_S	s2, U_PCB_CONTEXT+2*REGSZ(a0)
@@ -153,7 +153,7 @@ END(remrunqueue)
 /*
  *   Idle, this is where we spend time when nothing to do.
  */
-LEAF(idle)
+LEAF(idle, 0)
 	PTR_S	zero, curproc		# set curproc NULL for stats
 	sw	zero, cpl		# lower to spl0
 
@@ -206,7 +206,7 @@ END(idle)
  * At exit of a process, do a cpu_switch for the last time.
  * All interrupts should be blocked at this point.
  */
-LEAF(switch_exit)
+LEAF(switch_exit, 0)
 	mfc0	v0, COP_0_STATUS_REG
 	li	v1, ~SR_INT_ENAB
 	and	v0, v0, v1
diff --git a/sys/arch/mips64/mips64/cp0access.S b/sys/arch/mips64/mips64/cp0access.S
index 6f6633ec137..c3ef5472dd9 100644
--- a/sys/arch/mips64/mips64/cp0access.S
+++ b/sys/arch/mips64/mips64/cp0access.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cp0access.S,v 1.3 2004/08/10 20:15:47 deraadt Exp $ */
+/*	$OpenBSD: cp0access.S,v 1.4 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -48,7 +48,7 @@
  * Set/clear software interrupt.
  */
 
-LEAF(setsoftintr0)
+LEAF(setsoftintr0, 0)
 	mfc0	v0, COP_0_CAUSE_REG	# read cause register
 	nop
 	or	v0, v0, SOFT_INT_MASK_0	# set soft clock interrupt
@@ -57,7 +57,7 @@ LEAF(setsoftintr0)
 	nop
 END(setsoftintr0)
 
-LEAF(clearsoftintr0)
+LEAF(clearsoftintr0, 0)
 	mfc0	v0, COP_0_CAUSE_REG	# read cause register
 	nop
 	and	v0, v0, ~SOFT_INT_MASK_0	# clear soft clock interrupt
@@ -66,7 +66,7 @@ LEAF(clearsoftintr0)
 	nop
 END(clearsoftintr0)
 
-LEAF(setsoftintr1)
+LEAF(setsoftintr1, 0)
 	mfc0	v0, COP_0_CAUSE_REG	# read cause register
 	nop
 	or	v0, v0, SOFT_INT_MASK_1	# set soft net interrupt
@@ -75,7 +75,7 @@ LEAF(setsoftintr1)
 	nop
 END(setsoftintr1)
 
-LEAF(clearsoftintr1)
+LEAF(clearsoftintr1, 0)
 	mfc0	v0, COP_0_CAUSE_REG	# read cause register
 	nop
 	and	v0, v0, ~SOFT_INT_MASK_1	# clear soft net interrupt
@@ -89,7 +89,7 @@ END(clearsoftintr1)
  * These routines return the previous state.
  */
 
-LEAF(enableintr)
+LEAF(enableintr, 0)
 	mfc0	v0, COP_0_STATUS_REG	# read status register
 	nop
 	or	v1, v0, SR_INT_ENAB
@@ -98,7 +98,7 @@ LEAF(enableintr)
 	nop
 END(enableintr)
 
-LEAF(disableintr)
+LEAF(disableintr, 0)
 	mfc0	v0, COP_0_STATUS_REG	# read status register
 	nop
 	and	v1, v0, ~SR_INT_ENAB
@@ -117,7 +117,7 @@ LEAF(disableintr)
 	nop
 END(disableintr)
 
-LEAF(updateimask)
+LEAF(updateimask, 0)
 	lw	t0, idle_mask
 	not	a0, a0			# 1 means masked so invert.
 	and	a0, t0			# never upgrade to higher than max
@@ -150,7 +150,7 @@ LEAF(updateimask)
 	move	v0, v1
 END(updateimask)
 
-LEAF(setsr)
+LEAF(setsr, 0)
 	mtc0	a0, COP_0_STATUS_REG
 	nop				# total 10 nops to handle
 	nop				# RM7000 1.x bug.
@@ -166,39 +166,39 @@ LEAF(setsr)
 	move	v0, a0
 END(setsr)
 
-LEAF(cp0_get_prid)
+LEAF(cp0_get_prid, 0)
 	mfc0	v0, COP_0_PRID
 	j	ra
 	nop
 END(cp0_get_prid)
 
-LEAF(cp0_get_count)
+LEAF(cp0_get_count, 0)
 	mfc0	v0, COP_0_COUNT
 	j	ra
 	nop
 END(cp0_get_count)
 
-LEAF(cp0_set_compare)
+LEAF(cp0_set_compare, 0)
 	mtc0	a0, COP_0_COMPARE
 	j	ra
 	nop
 END(cp0_set_compare)
 
-LEAF(cp0_getperfcount)
+LEAF(cp0_getperfcount, 0)
 	mfc0	v0, COP_0_PC_COUNT
 	nop; nop
 	j	ra
 	nop
 END(cp0_getperfcount)
 
-LEAF(cp0_setperfcount)
+LEAF(cp0_setperfcount, 0)
 	mtc0	a0, COP_0_PC_COUNT
 	nop; nop
 	j	ra
 	nop
 END(cp0_setperfcount)
 
-LEAF(cp0_setperfctrl)
+LEAF(cp0_setperfctrl, 0)
 	mtc0	a0, COP_0_PC_CTRL
 	nop; nop
 	j	ra
diff --git a/sys/arch/mips64/mips64/exception.S b/sys/arch/mips64/mips64/exception.S
index ac209ea70fe..f37bcd1d318 100644
--- a/sys/arch/mips64/mips64/exception.S
+++ b/sys/arch/mips64/mips64/exception.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: exception.S,v 1.4 2004/09/09 22:11:38 pefo Exp $ */
+/*	$OpenBSD: exception.S,v 1.5 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 2002-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -344,7 +344,7 @@ END(u_intr)
 /*---------------------------------------------------------------- set_sint
  *  Atomic ipending update
  */
-LEAF(set_sint)
+LEAF(set_sint, 0)
 	LA	v1, ipending
 1:
 	ll	v0, 0(v1)
@@ -614,7 +614,7 @@ END(u_syscall)
 /*-------------------------------------------------------------- proc_trampoline
  *	Setup for and return to user.
  */
-LEAF(proc_trampoline)
+LEAF(proc_trampoline, 0)
 	sw	zero, cpl		# lower to spl0
 	lw	t0, ipending
 	beq	t0, zero, 0f
diff --git a/sys/arch/mips64/mips64/fp.S b/sys/arch/mips64/mips64/fp.S
index 7ffbe42b5a3..0790bc857ad 100644
--- a/sys/arch/mips64/mips64/fp.S
+++ b/sys/arch/mips64/mips64/fp.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fp.S,v 1.3 2004/09/09 22:11:38 pefo Exp $	*/
+/*	$OpenBSD: fp.S,v 1.4 2004/09/10 08:58:27 pefo Exp $	*/
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
@@ -35,7 +35,7 @@
  * SUCH DAMAGE.
  *
  *	from: @(#)fp.s	8.1 (Berkeley) 6/10/93
- *      $Id: fp.S,v 1.3 2004/09/09 22:11:38 pefo Exp $
+ *      $Id: fp.S,v 1.4 2004/09/10 08:58:27 pefo Exp $
  */
 
 /*
@@ -2272,7 +2272,7 @@ END(MipsEmulateFP)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(get_fs_int)
+LEAF(get_fs_int, 0)
 	srl	a3, a0, 12 - 2			# get FS field (even regs only)
 	and	a3, a3, 0xF << 2		# mask FS field
 	lw	a3, get_fs_int_tbl(a3)		# switch on register number
@@ -2370,7 +2370,7 @@ END(get_fs_int)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(get_ft_fs_s)
+LEAF(get_ft_fs_s, 0)
 	srl	a3, a0, 17 - 2			# get FT field (even regs only)
 	and	a3, a3, 0xF << 2		# mask FT field
 	lw	a3, get_ft_s_tbl(a3)		# switch on register number
@@ -2572,7 +2572,7 @@ END(get_ft_fs_s)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(get_ft_fs_d)
+LEAF(get_ft_fs_d, 0)
 	srl	a3, a0, 17 - 2			# get FT field (even regs only)
 	and	a3, a3, 0xF << 2		# mask FT field
 	lw	a3, get_ft_d_tbl(a3)		# switch on register number
@@ -2805,7 +2805,7 @@ END(get_ft_fs_d)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(get_cmp_s)
+LEAF(get_cmp_s, 0)
 	srl	a3, a0, 12 - 2			# get FS field (even regs only)
 	and	a3, a3, 0xF << 2		# mask FS field
 	lw	a3, cmp_fs_s_tbl(a3)		# switch on register number
@@ -2983,7 +2983,7 @@ END(get_cmp_s)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(get_cmp_d)
+LEAF(get_cmp_d, 0)
 	srl	a3, a0, 12 - 2			# get FS field (even regs only)
 	and	a3, a3, 0xF << 2		# mask FS field
 	lw	a3, cmp_fs_d_tbl(a3)		# switch on register number
@@ -3197,7 +3197,7 @@ END(get_cmp_d)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(set_fd_s)
+LEAF(set_fd_s, 0)
 	sll	t0, t0, 31			# position sign
 	sll	t1, t1, 23			# position exponent
 	or	t2, t2, t0
@@ -3293,7 +3293,7 @@ END(set_fd_s)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(set_fd_d)
+LEAF(set_fd_d, 0)
 	sll	t0, t0, 31			# set sign
 	sll	t1, t1, 20			# set exponent
 	or	t0, t0, t1
@@ -3398,7 +3398,7 @@ END(set_fd_d)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(renorm_fs_s)
+LEAF(renorm_fs_s, 0)
 /*
  * Find out how many leading zero bits are in t2 and put in t9.
  */
@@ -3447,7 +3447,7 @@ END(renorm_fs_s)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(renorm_fs_d)
+LEAF(renorm_fs_d, 0)
 /*
  * Find out how many leading zero bits are in t2,t3 and put in t9.
  */
@@ -3511,7 +3511,7 @@ END(renorm_fs_d)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(renorm_ft_s)
+LEAF(renorm_ft_s, 0)
 /*
  * Find out how many leading zero bits are in ta6 and put in t9.
  */
@@ -3560,7 +3560,7 @@ END(renorm_ft_s)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(renorm_ft_d)
+LEAF(renorm_ft_d, 0)
 /*
  * Find out how many leading zero bits are in ta6,ta7 and put in t9.
  */
diff --git a/sys/arch/mips64/mips64/lcore_access.S b/sys/arch/mips64/mips64/lcore_access.S
index 9d337aa67cf..3a1a6ec0d46 100644
--- a/sys/arch/mips64/mips64/lcore_access.S
+++ b/sys/arch/mips64/mips64/lcore_access.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lcore_access.S,v 1.5 2004/09/09 22:11:38 pefo Exp $ */
+/*	$OpenBSD: lcore_access.S,v 1.6 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -77,7 +77,7 @@ onfault_table:
  *	char *addr;
  *	int len;
  */
-LEAF(badaddr)
+LEAF(badaddr, 0)
 	li	v0, KT_BADERR
 	PTR_L	t3, curprocpaddr
 	bne	a1, 1, 2f
@@ -136,7 +136,7 @@ esigcode_o32:
  *		u_int maxlength;
  *		u_long *lencopied;
  */
-LEAF(copystr)
+LEAF(copystr, 0)
 	move	t2, a2			# Save the number of bytes
 1:
 	lbu	t0, 0(a0)
@@ -160,7 +160,7 @@ END(copystr)
  *  Read 64 bits from bus in non LP64 mode.
  *  XXX ints should be disabled!
  */
-LEAF(lp32_read8)
+LEAF(lp32_read8, 0)
 #if defined(__MIPSEB__)
 	ld	v1, 0(a0)
 	jr	ra
@@ -176,7 +176,7 @@ END(lp32_read8)
  *  Write 64 bits to bus in non LP64 mode.
  *  XXX ints should be disabled!
  */
-LEAF(lp32_write8)
+LEAF(lp32_write8, 0)
 #if defined(__MIPSEB__)
 	dsll	a2, 32
 	dsll	a3, 32
@@ -196,7 +196,7 @@ END(lp32_write8)
 /*
  * fillw(pat, addr, count)
  */
-LEAF(fillw)
+LEAF(fillw, 0)
 1:
 	PTR_ADDU a2, a2, -1
 	sh	a0, 0(a1)
@@ -211,7 +211,7 @@ END(fillw)
  * Optimized memory zero code.
  * mem_zero_page(addr);
  */
-LEAF(mem_zero_page)
+LEAF(mem_zero_page, 0)
 	LI	v0, NBPG
 1:
 	dsubu	v0, 8
@@ -229,7 +229,7 @@ END(mem_zero_page)
  *			a1 = memory address
  *			a2 = count
  */
-LEAF(insb)
+LEAF(insb, 0)
 	beq	a2, zero, 2f
 	PTR_ADDU a2, a1
 1:
@@ -242,7 +242,7 @@ LEAF(insb)
 	nop
 END(insb)
 
-LEAF(insw)
+LEAF(insw, 0)
 	beq	a2, zero, 2f
 	PTR_ADDU a2, a2
 	PTR_ADDU a2, a1
@@ -256,7 +256,7 @@ LEAF(insw)
 	nop
 END(insw)
 
-LEAF(insl)
+LEAF(insl, 0)
 	beq	a2, zero, 2f
 	PTR_SLL	a2, 2
 	PTR_ADDU a2, a1
@@ -270,7 +270,7 @@ LEAF(insl)
 	nop
 END(insl)
 
-LEAF(outsb)
+LEAF(outsb, 0)
 	beq	a2, zero, 2f
 	PTR_ADDU a2, a1
 1:
@@ -283,7 +283,7 @@ LEAF(outsb)
 	nop
 END(outsb)
 
-LEAF(outsw)
+LEAF(outsw, 0)
 	beq	a2, zero, 2f
 	PTR_ADDU a2, a2
 	LI	v0, 1
@@ -309,7 +309,7 @@ LEAF(outsw)
 	nop
 END(outsw)
 
-LEAF(outsl)
+LEAF(outsl, 0)
 	beq	a2, zero, 2f
 	PTR_SLL	a2, 2
 	LI	v0, 3
diff --git a/sys/arch/mips64/mips64/lcore_ddb.S b/sys/arch/mips64/mips64/lcore_ddb.S
index 32734ef181c..1324b8aad5a 100644
--- a/sys/arch/mips64/mips64/lcore_ddb.S
+++ b/sys/arch/mips64/mips64/lcore_ddb.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lcore_ddb.S,v 1.3 2004/08/10 20:15:47 deraadt Exp $ */
+/*	$OpenBSD: lcore_ddb.S,v 1.4 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -42,7 +42,7 @@
 
 #define	ITLBNOPFIX	nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
 
-LEAF(kdbpeek)
+LEAF(kdbpeek, 0)
 	PTR_L	t0, curprocpaddr
 	li	v0, KT_DDBERR
 	and	v1, a0, 3			# unaligned ?
@@ -60,7 +60,7 @@ LEAF(kdbpeek)
 	sw	zero, U_PCB_ONFAULT(t0)
 END(kdbpeek)
 
-LEAF(kdbpeekw)
+LEAF(kdbpeekw, 0)
 	PTR_L	t0, curprocpaddr
 	li	v0, KT_DDBERR
 	and	v1, a0, 1			# unaligned ?
@@ -77,7 +77,7 @@ LEAF(kdbpeekw)
 	sw	zero, U_PCB_ONFAULT(t0)
 END(kdbpeekw)
 
-LEAF(kdbpeekb)
+LEAF(kdbpeekb, 0)
 	PTR_L	t0, curprocpaddr
 	li	v0, KT_DDBERR
 	sw	v0, U_PCB_ONFAULT(t0)
@@ -91,7 +91,7 @@ kt_ddberr:
 	jr	ra
 	li	v0, -1
 
-LEAF(kdbpoke)
+LEAF(kdbpoke, 0)
 	PTR_L	t0, curprocpaddr
 	li	v0, KT_DDBERR
 	and	v1, a0, 3			# unaligned ?
@@ -109,7 +109,7 @@ LEAF(kdbpoke)
 	sw	zero, U_PCB_ONFAULT(t0)
 END(kdbpoke)
 
-LEAF(kdbpokew)
+LEAF(kdbpokew, 0)
 	PTR_L	t0, curprocpaddr
 	li	v0, KT_DDBERR
 	and	v1, a0, 1			# unaligned ?
@@ -125,7 +125,7 @@ LEAF(kdbpokew)
 	sw	zero, U_PCB_ONFAULT(t0)
 END(kdbpokew)
 
-LEAF(kdbpokeb)
+LEAF(kdbpokeb, 0)
 	PTR_L	t0, curprocpaddr
 	li	v0, KT_DDBERR
 	sw	v0, U_PCB_ONFAULT(t0)
@@ -134,13 +134,13 @@ LEAF(kdbpokeb)
 	sw	zero, U_PCB_ONFAULT(t0)
 END(kdbpokeb)
 
-LEAF(Debugger)
+LEAF(Debugger, 0)
 	break   BREAK_SOVER_VAL
 	jr	ra
 	nop
 END(Debugger)
 
-LEAF(setjmp)
+LEAF(setjmp, 0)
 	mfc0	v0, COP_0_STATUS_REG	# Later the "real" spl value!
 	REG_S	s0, REGSZ * 0(a0)
 	REG_S	s1, REGSZ * 1(a0)
@@ -158,7 +158,7 @@ LEAF(setjmp)
 	li	v0, 0			# setjmp return
 END(setjmp)
 
-LEAF(longjmp)
+LEAF(longjmp, 0)
 	REG_L	v0, REGSZ * 11(a0)
 	REG_L	ra, REGSZ * 10(a0)
 	REG_L	s0, REGSZ * 0(a0)
diff --git a/sys/arch/mips64/mips64/lcore_float.S b/sys/arch/mips64/mips64/lcore_float.S
index 65b68ddfef2..8093cd9a229 100644
--- a/sys/arch/mips64/mips64/lcore_float.S
+++ b/sys/arch/mips64/mips64/lcore_float.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lcore_float.S,v 1.5 2004/09/09 22:11:38 pefo Exp $ */
+/*	$OpenBSD: lcore_float.S,v 1.6 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -62,7 +62,7 @@
  *
  *----------------------------------------------------------------------------
  */
-LEAF(MipsSwitchFPState)
+LEAF(MipsSwitchFPState, 0)
 	mfc0	t1, COP_0_STATUS_REG	# Save old SR
 	li	t0, SR_COP_1_BIT|SR_FR_32	# enable the coprocessor
 	mtc0	t0, COP_0_STATUS_REG
@@ -166,7 +166,7 @@ LEAF(MipsSwitchFPState)
 	nop
 END(MipsSwitchFPState)
 
-LEAF(MipsSwitchFPState16)
+LEAF(MipsSwitchFPState16, 0)
 	mfc0	t1, COP_0_STATUS_REG	# Save old SR
 	li	t0, SR_COP_1_BIT	# enable the coprocessor
 	mtc0	t0, COP_0_STATUS_REG
@@ -287,7 +287,7 @@ END(MipsSwitchFPState16)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(MipsSaveCurFPState)
+LEAF(MipsSaveCurFPState, 0)
 	PTR_L	a0, P_ADDR(a0)			# get pointer to pcb for proc
 	mfc0	t1, COP_0_STATUS_REG	# Disable interrupts and
 	li	t0, SR_COP_1_BIT|SR_FR_32	# enable the coprocessor
@@ -347,7 +347,7 @@ LEAF(MipsSaveCurFPState)
 	nop
 END(MipsSaveCurFPState)
 
-LEAF(MipsSaveCurFPState16)
+LEAF(MipsSaveCurFPState16, 0)
 	PTR_L	a0, P_ADDR(a0)			# get pointer to pcb for proc
 	mfc0	t1, COP_0_STATUS_REG	# Disable interrupts and
 	li	t0, SR_COP_1_BIT	# enable the coprocessor
@@ -532,7 +532,7 @@ END(MipsFPTrap)
  *
  *----------------------------------------------------------------------------
  */
-LEAF(cp1_get_prid)
+LEAF(cp1_get_prid, 0)
 	mfc0	v1, COP_0_STATUS_REG
 	li	a0, SR_COP_1_BIT
 	or	v1, a0
diff --git a/sys/arch/mips64/mips64/tlbhandler.S b/sys/arch/mips64/mips64/tlbhandler.S
index 32e68f4d319..920416d7fd0 100644
--- a/sys/arch/mips64/mips64/tlbhandler.S
+++ b/sys/arch/mips64/mips64/tlbhandler.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: tlbhandler.S,v 1.4 2004/09/09 22:11:38 pefo Exp $ */
+/*	$OpenBSD: tlbhandler.S,v 1.5 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 1995-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -376,7 +376,7 @@ END(k_tlb_miss)
 /*---------------------------------------------------------------- tlb_write_i
  *	Write the given entry into the TLB at the given index.
  */
-LEAF(tlb_write_indexed)
+LEAF(tlb_write_indexed, 0)
 	mfc0	v1, COP_0_STATUS_REG	# Save the status register.
 	mtc0	zero, COP_0_STATUS_REG	# Disable interrupts
 	ITLBNOPFIX
@@ -415,7 +415,7 @@ END(tlb_write_indexed)
  *	Uses "wired" register to determine what register to start with.
  *	Arg "tlbsize" is the number of entries to flush.
  */
-LEAF(tlb_flush)
+LEAF(tlb_flush, 0)
 	mfc0	v1, COP_0_STATUS_REG	# Save the status register.
 	mtc0	zero, COP_0_STATUS_REG	# Disable interrupts
 	ITLBNOPFIX
@@ -452,7 +452,7 @@ END(tlb_flush)
 /*--------------------------------------------------------------- tlb_flush_addr
  *	Flush any TLB entries for the given address and TLB PID.
  */
-LEAF(tlb_flush_addr)
+LEAF(tlb_flush_addr, 0)
 	mfc0	v1, COP_0_STATUS_REG	# Save the status register.
 	mtc0	zero, COP_0_STATUS_REG	# Disable interrupts
 	ITLBNOPFIX
@@ -496,7 +496,7 @@ END(tlb_flush_addr)
 /*---------------------------------------------------------------- tlb_update
  *	Update the TLB if highreg is found; otherwise, enter the data.
  */
-LEAF(tlb_update)
+LEAF(tlb_update, 0)
 	mfc0	v1, COP_0_STATUS_REG	# Save the status register.
 	mtc0	zero, COP_0_STATUS_REG	# Disable interrupts
 	ITLBNOPFIX
@@ -586,7 +586,7 @@ END(tlb_update)
 /*---------------------------------------------------------------- tlb_read
  *	Read the TLB entry.
  */
-LEAF(tlb_read)
+LEAF(tlb_read, 0)
 	mfc0	v1, COP_0_STATUS_REG	# Save the status register.
 	mtc0	zero, COP_0_STATUS_REG	# Disable interrupts
 	ITLBNOPFIX
@@ -621,7 +621,7 @@ END(tlb_read)
 /*---------------------------------------------------------------- tlb_get_pid
  *	Read the tlb pid value.
  */
-LEAF(tlb_get_pid)
+LEAF(tlb_get_pid, 0)
 	dmfc0	v0, COP_0_TLB_HI	# get PID
 	li	v1, VMTLB_PID		# mask off PID
 	j	ra
@@ -631,7 +631,7 @@ END(tlb_get_pid)
 /*---------------------------------------------------------------- tlb_set_pid
  *	Write the given pid into the TLB pid reg.
  */
-LEAF(tlb_set_pid)
+LEAF(tlb_set_pid, 0)
 	dmtc0	a0, COP_0_TLB_HI		# Write the hi reg value
 	j	ra
 	nop
@@ -640,7 +640,7 @@ END(tlb_set_pid)
 /*---------------------------------------------------------------- tlb_get_wired
  *	Get the value from the TLB wired reg.
  */
-LEAF(tlb_get_wired)
+LEAF(tlb_get_wired, 0)
 	mfc0	v0, COP_0_TLB_WIRED
 	j	ra
 	nop
@@ -649,7 +649,7 @@ END(tlb_get_wired)
 /*---------------------------------------------------------------- tlb_set_wired
  *	Write the given value into the TLB wired reg.
  */
-LEAF(tlb_set_wired)
+LEAF(tlb_set_wired, 0)
 	mtc0	a0, COP_0_TLB_WIRED
 	j	ra
 	nop
diff --git a/sys/arch/sgi/localbus/macectrl.S b/sys/arch/sgi/localbus/macectrl.S
index 153ce326cc9..97103b87111 100644
--- a/sys/arch/sgi/localbus/macectrl.S
+++ b/sys/arch/sgi/localbus/macectrl.S
@@ -1,4 +1,4 @@
-/*	$OpenBSD: macectrl.S,v 1.3 2004/09/09 22:11:39 pefo Exp $ */
+/*	$OpenBSD: macectrl.S,v 1.4 2004/09/10 08:58:27 pefo Exp $ */
 
 /*
  * Copyright (c) 2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -37,7 +37,7 @@
 	.set	noreorder		# Noreorder is default style!
 
 	.globl	hw_setintrmask
-LEAF(hw_setintrmask)
+LEAF(hw_setintrmask, 0)
 	lw	v0, mace_intem
 	PTR_L	v1, hwmask_addr
 	nor	a0, zero, a0