diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-05-23 06:28:30 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-05-23 06:28:30 +0000 |
commit | 907992fd6b4d5d69123ddcc06c9aa16bd0d5db10 (patch) | |
tree | 5e2c61e5e60d41ea35a68c7759629fdba23fc9b0 /sys/arch | |
parent | 600b7d3ac6757ee204fff315645f2a13f3383111 (diff) |
remove more cfb and sfb bits
Diffstat (limited to 'sys/arch')
-rw-r--r-- | sys/arch/alpha/conf/GENERIC | 4 | ||||
-rw-r--r-- | sys/arch/alpha/conf/RAMDISKBIG | 4 | ||||
-rw-r--r-- | sys/arch/alpha/include/cfbreg.h | 60 | ||||
-rw-r--r-- | sys/arch/alpha/include/sfbreg.h | 97 |
4 files changed, 2 insertions, 163 deletions
diff --git a/sys/arch/alpha/conf/GENERIC b/sys/arch/alpha/conf/GENERIC index 42bd72235ec..48648e98e41 100644 --- a/sys/arch/alpha/conf/GENERIC +++ b/sys/arch/alpha/conf/GENERIC @@ -1,4 +1,4 @@ -# $OpenBSD: GENERIC,v 1.265 2020/05/23 06:17:08 jsg Exp $ +# $OpenBSD: GENERIC,v 1.266 2020/05/23 06:28:29 jsg Exp $ # # For further information on compiling OpenBSD kernels, see the config(8) # man page. @@ -412,8 +412,6 @@ bktr0 at pci? radio* at bktr? # Workstation Console attachments -#wsdisplay* at cfb? -#wsdisplay* at sfb? wsdisplay* at vga? wsdisplay* at tga? wskbd* at pckbd? mux 1 diff --git a/sys/arch/alpha/conf/RAMDISKBIG b/sys/arch/alpha/conf/RAMDISKBIG index 5ef9908e907..7e6035b39c0 100644 --- a/sys/arch/alpha/conf/RAMDISKBIG +++ b/sys/arch/alpha/conf/RAMDISKBIG @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISKBIG,v 1.103 2020/05/23 06:17:08 jsg Exp $ +# $OpenBSD: RAMDISKBIG,v 1.104 2020/05/23 06:28:29 jsg Exp $ machine alpha maxusers 4 @@ -206,8 +206,6 @@ pciide* at pci? flags 0x0000 wd* at pciide? flags 0x0000 atapiscsi* at pciide? -#wsdisplay* at cfb? -#wsdisplay* at sfb? wsdisplay* at vga? wsdisplay* at tga? wskbd* at pckbd? diff --git a/sys/arch/alpha/include/cfbreg.h b/sys/arch/alpha/include/cfbreg.h deleted file mode 100644 index 0690f76f233..00000000000 --- a/sys/arch/alpha/include/cfbreg.h +++ /dev/null @@ -1,60 +0,0 @@ -/* $OpenBSD: cfbreg.h,v 1.4 2003/10/18 20:14:41 jmc Exp $ */ -/* $NetBSD: cfbreg.h,v 1.1 1996/05/01 23:25:00 cgd Exp $ */ - -/* - * Copyright (c) 1996 Carnegie-Mellon University. - * All rights reserved. - * - * Author: Chris G. Demetriou - * - * Permission to use, copy, modify and distribute this software and - * its documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND - * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie the - * rights to redistribute these changes. - */ - -/* - * Color Frame Buffer definitions, from: - * ``PMAG-BA TURBOchannel Color Frame Buffer Functional Specification - * (Revision 1.2)'', available via anonymous FTP from gatekeeper.dec.com. - * - * All definitions are in "dense" TurboChannel space. - */ - -/* - * Size of the CFB address space. - */ -#define CFB_SIZE 0x400000 - -/* - * Offsets into slot space of each functional unit. - */ -#define CFB_FB_OFFSET 0x000000 /* Frame buffer */ -#define CFB_FB_SIZE 0x100000 -#define CFB_RAMDAC_OFFSET 0x200000 /* Bt495 RAMDAC Registers */ -#define CFB_RAMDAC_SIZE 0x100000 -#define CFB_IREQCTRL_OFFSET 0x300000 /* IReq Control region */ -#define CFB_IREQCTRL_SIZE 0x080000 - -/* - * Bt459 RAMDAC registers (offsets from CFB_RAMDAC_OFFSET) - */ -#define CFB_RAMDAC_ADDRLOW 0x0000 /* Address register low byte */ -#define CFB_RAMDAC_ADDRHIGH 0x0004 /* Address register high byte */ -#define CFB_RAMDAC_REGDATA 0x0008 /* Register addressed by addr reg */ -#define CFB_RAMDAC_CMAPDATA 0x000c /* Colormap loc addressed by addr reg */ diff --git a/sys/arch/alpha/include/sfbreg.h b/sys/arch/alpha/include/sfbreg.h deleted file mode 100644 index cf2c293329a..00000000000 --- a/sys/arch/alpha/include/sfbreg.h +++ /dev/null @@ -1,97 +0,0 @@ -/* $OpenBSD: sfbreg.h,v 1.4 2003/10/18 20:14:42 jmc Exp $ */ -/* $NetBSD: sfbreg.h,v 1.1 1996/05/01 21:15:46 cgd Exp $ */ - -/* - * Copyright (c) 1996 Carnegie-Mellon University. - * All rights reserved. - * - * Author: Chris G. Demetriou - * - * Permission to use, copy, modify and distribute this software and - * its documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND - * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie the - * rights to redistribute these changes. - */ - -/* - * Smart ("CXTurbo") Frame Buffer definitions, from: - * "DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual" - * (DEC order number EK-D3SYS-PM), section 6. - * - * All definitions are in "dense" TurboChannel space. - */ - -/* - * Size of the SFB address space. - */ -#define SFB_SIZE 0x1000000 - -/* - * Offsets into slot space of each functional unit. - */ -#define SFB_ASIC_OFFSET 0x0100000 /* SFB ASIC Control Registers */ -#define SFB_ASIC_SIZE 0x0020000 -#define SFB_RAMDAC_OFFSET 0x01c0000 /* Bt495 RAMDAC Registers */ -#define SFB_RAMDAC_SIZE 0x0040000 -#define SFB_FB_OFFSET 0x0200000 /* Frame buffer */ -#define SFB_FB_SIZE 0x0200000 -#define SFB_OSBM_OFFSET 0x0600000 /* Off-screen buffer memory */ -#define SFB_OSBM_SIZE 0x0200000 - -/* - * SFB ASIC registers (offsets from SFB_ASIC_OFFSET). - */ -#define SFB_ASIC_COPYBUF_0 0x0000 /* Copy buffer register 0 (R/W) */ -#define SFB_ASIC_COPYBUF_1 0x0004 /* Copy buffer register 1 (R/W) */ -#define SFB_ASIC_COPYBUF_2 0x0008 /* Copy buffer register 2 (R/W) */ -#define SFB_ASIC_COPYBUF_3 0x000c /* Copy buffer register 3 (R/W) */ -#define SFB_ASIC_COPYBUF_4 0x0010 /* Copy buffer register 4 (R/W) */ -#define SFB_ASIC_COPYBUF_5 0x0014 /* Copy buffer register 5 (R/W) */ -#define SFB_ASIC_COPYBUF_6 0x0018 /* Copy buffer register 6 (R/W) */ -#define SFB_ASIC_COPYBUF_7 0x001c /* Copy buffer register 7 (R/W) */ -#define SFB_ASIC_FG 0x0020 /* Foreground (R/W) */ -#define SFB_ASIC_BG 0x0024 /* Background (R/W) */ -#define SFB_ASIC_PLANEMASK 0x0028 /* PlaneMask (R/W) */ -#define SFB_ASIC_PIXELMASK 0x002c /* PixelMask (R/W) */ -#define SFB_ASIC_MODE 0x0030 /* Mode (R/W) */ -#define SFB_ASIC_ROP 0x0034 /* RasterOp (R/W) */ -#define SFB_ASIC_PIXELSHIFT 0x0038 /* PixelShift (R/W) */ -#define SFB_ASIC_ADDRESS 0x003c /* Address (R/W) */ -#define SFB_ASIC_BRES1 0x0040 /* Bresenham register 1 (R/W) */ -#define SFB_ASIC_BRES2 0x0044 /* Bresenham register 2 (R/W) */ -#define SFB_ASIC_BRES3 0x0048 /* Bresenham register 3 (R) (?) */ -#define SFB_ASIC_BCONT 0x004c /* Bcont (W) */ -#define SFB_ASIC_DEEP 0x0050 /* Deep (R/W) */ -#define SFB_ASIC_START 0x0054 /* Start (W) */ -#define SFB_ASIC_CLEAR_INTR 0x0058 /* Clear Interrupt (W) */ -#define SFB_ASIC_VIDEO_REFRESH 0x0060 /* Video refresh counter (R/W) */ -#define SFB_ASIC_VIDEO_HSETUP 0x0064 /* Video horizontal setup (R/W) */ -#define SFB_ASIC_VIDEO_VSETUP 0x0068 /* Video vertical setup (R/W) */ -#define SFB_ASIC_VIDEO_BASE 0x006c /* Video base address (R/W) */ -#define SFB_ASIC_VIDEO_VALID 0x0070 /* Video valid (W) */ -#define SFB_ASIC_ENABLE_INTR 0x0074 /* Enable/Disable Interrupts (W) */ -#define SFB_ASIC_TCCLK 0x0078 /* TCCLK count (R/W) */ -#define SFB_ASIC_VIDCLK 0x007c /* VIDCLK count (R/W) */ - -/* - * Bt459 RAMDAC registers (offsets from SFB_RAMDAC_OFFSET) - */ -#define SFB_RAMDAC_ADDRLOW 0x0000 /* Address register low byte */ -#define SFB_RAMDAC_ADDRHIGH 0x0004 /* Address register high byte */ -#define SFB_RAMDAC_REGDATA 0x0008 /* Register addressed by addr reg */ -#define SFB_RAMDAC_CMAPDATA 0x000c /* Colormap loc addressed by addr reg */ |