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authorJoel Sing <jsing@cvs.openbsd.org>2014-02-18 13:47:54 +0000
committerJoel Sing <jsing@cvs.openbsd.org>2014-02-18 13:47:54 +0000
commitcb25d9dbac4029fd7ef13c8ebb998bf9de079b72 (patch)
treeb5a05595ef92b7cc6fd46098ff3390c4622f4493 /sys/arch
parent5217c20a82ac161e88a3b8bca3e57deaba75acaa (diff)
Actually check to see if the CPU supports tsc, rather than assuming that
it does and triggering an illegal instruction trap when it does not. Found the hard way and fix tested by nick@
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/amd64/stand/libsa/random_i386.S6
-rw-r--r--sys/arch/i386/stand/libsa/random_i386.S6
2 files changed, 10 insertions, 2 deletions
diff --git a/sys/arch/amd64/stand/libsa/random_i386.S b/sys/arch/amd64/stand/libsa/random_i386.S
index 987c0a25fca..dc94f373449 100644
--- a/sys/arch/amd64/stand/libsa/random_i386.S
+++ b/sys/arch/amd64/stand/libsa/random_i386.S
@@ -55,6 +55,7 @@ ENTRY(mdrandom)
movl $1, %eax
movl $0, %ecx
cpuid
+ movl %edx, %eax
movl 36(%esp), %ebx
movl 40(%esp), %edx
@@ -65,7 +66,10 @@ ENTRY(mdrandom)
jnz userand
movl %edx, %ecx
- jmp usetsc
+ andl $CPUID_TSC, %eax // See if we have rdtsc.
+ jnz usetsc
+
+ jmp done
userand:
rdrand %eax
diff --git a/sys/arch/i386/stand/libsa/random_i386.S b/sys/arch/i386/stand/libsa/random_i386.S
index 987c0a25fca..dc94f373449 100644
--- a/sys/arch/i386/stand/libsa/random_i386.S
+++ b/sys/arch/i386/stand/libsa/random_i386.S
@@ -55,6 +55,7 @@ ENTRY(mdrandom)
movl $1, %eax
movl $0, %ecx
cpuid
+ movl %edx, %eax
movl 36(%esp), %ebx
movl 40(%esp), %edx
@@ -65,7 +66,10 @@ ENTRY(mdrandom)
jnz userand
movl %edx, %ecx
- jmp usetsc
+ andl $CPUID_TSC, %eax // See if we have rdtsc.
+ jnz usetsc
+
+ jmp done
userand:
rdrand %eax