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authorMiod Vallat <miod@cvs.openbsd.org>2004-12-22 21:08:24 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2004-12-22 21:08:24 +0000
commited72fc5d500949600ffadd91122a635ef9ac7961 (patch)
tree8e4cbdf46618306aefde688b36abdf6841f32a1f /sys/arch
parentc3fa11489bc70df304099c5e2f61333e1c2074cd (diff)
Bring more fixes from NetBSD:
- more delay in loops (1.36) - on manual xfer via TEMP register, set PCTL_BFINT_ENAB and check bus free by INTS register (1.35)
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/hp300/dev/mb89352.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/sys/arch/hp300/dev/mb89352.c b/sys/arch/hp300/dev/mb89352.c
index 911a2b04bc8..854e9d3177c 100644
--- a/sys/arch/hp300/dev/mb89352.c
+++ b/sys/arch/hp300/dev/mb89352.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: mb89352.c,v 1.9 2004/12/22 21:07:29 miod Exp $ */
+/* $OpenBSD: mb89352.c,v 1.10 2004/12/22 21:08:23 miod Exp $ */
/* $NetBSD: mb89352.c,v 1.5 2000/03/23 07:01:31 thorpej Exp $ */
/* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
@@ -840,10 +840,12 @@ nextbyte:
if ((spc_read(PSNS) & PSNS_ATN) != 0)
spc_write(SCMD, SCMD_RST_ATN);
+ spc_write(PCTL, PCTL_BFINT_ENAB | PH_MSGIN);
while ((spc_read(PSNS) & PSNS_REQ) == 0) {
- if ((spc_read(PSNS) & PH_MASK) != PH_MSGIN &&
- (spc_read(SSTS) & SSTS_INITIATOR) == 0)
+ if (((spc_read(PSNS) & PH_MASK) != PH_MSGIN &&
+ (spc_read(SSTS) & SSTS_INITIATOR) == 0) ||
+ spc_read(INTS) != 0)
/*
* Target left MESSAGE IN, probably because it
* a) noticed our ATN signal, or
@@ -853,7 +855,6 @@ nextbyte:
DELAY(1);
}
- spc_write(PCTL, PH_MSGIN);
msg = spc_read(TEMP);
/* Gather incoming message bytes if needed. */
@@ -1322,6 +1323,7 @@ spc_dataout_pio(struct spc_softc *sc, u_char *p, int n)
/* Break on interrupt. */
if (intstat != 0)
goto phasechange;
+ DELAY(1);
}
xfer = min(DOUTAMOUNT, n);
@@ -1339,6 +1341,7 @@ spc_dataout_pio(struct spc_softc *sc, u_char *p, int n)
for (;;) {
if (spc_read(INTS) != 0)
break;
+ DELAY(1);
}
SPC_MISC(("extra data "));
} else {
@@ -1351,6 +1354,7 @@ spc_dataout_pio(struct spc_softc *sc, u_char *p, int n)
/* Break on interrupt. */
if (intstat != 0)
goto phasechange;
+ DELAY(1);
}
}
@@ -1440,6 +1444,7 @@ spc_datain_pio(struct spc_softc *sc, u_char *p, int n)
goto phasechange;
intstat = spc_read(INTS);
}
+ DELAY(1);
}
SPC_MISC(("extra data "));
}
@@ -1761,7 +1766,7 @@ dophase:
#else
spc_write(INTS, ints);
while ((spc_read(PSNS) & PSNS_REQ) == 0)
- delay(1); /* need timeout XXX */
+ DELAY(1); /* need timeout XXX */
#endif
/*
@@ -1850,9 +1855,9 @@ dophase:
acb = sc->sc_nexus;
if ((spc_read(PSNS) & PSNS_ATN) != 0)
spc_write(SCMD, SCMD_RST_ATN);
+ spc_write(PCTL, PCTL_BFINT_ENAB | PH_STAT);
while ((spc_read(PSNS) & PSNS_REQ) == 0)
DELAY(1); /* XXX needs timeout */
- spc_write(PCTL, PH_STAT);
acb->target_stat = spc_read(TEMP);
spc_write(SCMD, SCMD_SET_ACK);
while ((spc_read(PSNS) & PSNS_REQ) != 0)
@@ -1871,7 +1876,6 @@ reset:
return;
finish:
- timeout_del(&acb->xs->stimeout);
spc_write(INTS, ints);
ints = 0;
spc_done(sc, acb);