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authorMichael Shalayeff <mickey@cvs.openbsd.org>2006-03-29 15:02:28 +0000
committerMichael Shalayeff <mickey@cvs.openbsd.org>2006-03-29 15:02:28 +0000
commit09eb6192a5a08271cad5e11ed7505731a1492f06 (patch)
treed08297e3fcc7d06629fa131045f9ba9172174ec1 /sys/arch
parent42bb20655906893b9b89242a5b1df1b37fd48676 (diff)
workaround for intel errata p53 -- follow lapic writes w/ a read; toby@ kettenis@ ok
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/i386/include/i82489var.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/sys/arch/i386/include/i82489var.h b/sys/arch/i386/include/i82489var.h
index 3c4632872ce..8bdf4eda158 100644
--- a/sys/arch/i386/include/i82489var.h
+++ b/sys/arch/i386/include/i82489var.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: i82489var.h,v 1.2 2004/06/13 21:49:16 niklas Exp $ */
+/* $OpenBSD: i82489var.h,v 1.3 2006/03/29 15:02:27 mickey Exp $ */
/* $NetBSD: i82489var.h,v 1.1.2.2 2000/02/21 18:46:14 sommerfeld Exp $ */
/*-
@@ -62,6 +62,14 @@ i82489_writereg(reg, val)
{
*((volatile u_int32_t *)(((volatile u_int8_t *)local_apic) + reg)) =
val;
+ /*
+ * intel xeon errata p53:
+ * write to a lapic register sometimes may appear to have not occured
+ * workaround:
+ * follow write with a read [from id register]
+ */
+ val = *((volatile u_int32_t *)(((volatile u_int8_t *)local_apic) +
+ LAPIC_ID));
}
/*