new stuff

6 files changed, 1232 insertions, 0 deletions

diff --git a/sys/arch/sparc/dev/cgeight.c b/sys/arch/sparc/dev/cgeight.c
new file mode 100644
index 00000000000..3baeb0dfd04
--- /dev/null
+++ b/sys/arch/sparc/dev/cgeight.c
@@ -0,0 +1,443 @@
+/*	$NetBSD: cgeight.c,v 1.12 1994/11/23 07:02:07 deraadt Exp $ */
+
+/*
+ * Copyright (c) 1995 Theo de Raadt
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from @(#)cgthree.c	8.2 (Berkeley) 10/30/93
+ */
+
+/*
+ * color display (cgeight) driver.
+ *
+ * Does not handle interrupts, even though they can occur.
+ *
+ * XXX should defer colormap updates to vertical retrace interrupts
+ */
+
+#include <sys/param.h>
+#include <sys/buf.h>
+#include <sys/device.h>
+#include <sys/ioctl.h>
+#include <sys/malloc.h>
+#include <sys/mman.h>
+#include <sys/tty.h>
+
+#include <vm/vm.h>
+
+#include <machine/fbio.h>
+#include <machine/autoconf.h>
+#include <machine/pmap.h>
+#include <machine/fbvar.h>
+
+#include <sparc/dev/btreg.h>
+#include <sparc/dev/btvar.h>
+#include <sparc/dev/cgeightreg.h>
+#include <sparc/dev/pfourreg.h>
+
+/* per-display variables */
+struct cgeight_softc {
+	struct	device sc_dev;		/* base device */
+	struct	fbdevice sc_fb;		/* frame buffer device */
+	volatile struct bt_regs *sc_bt;	/* Brooktree registers */
+	caddr_t	sc_phys;		/* display RAM (phys addr) */
+	int	sc_blanked;		/* true if blanked */
+	union	bt_cmap sc_cmap;	/* Brooktree color map */
+};
+
+/* autoconfiguration driver */
+static void	cgeightattach(struct device *, struct device *, void *);
+static int	cgeightmatch(struct device *, void *, void *);
+struct cfdriver cgeightcd = {
+	NULL, "cgeight", cgeightmatch, cgeightattach,
+	DV_DULL, sizeof(struct cgeight_softc)
+};
+
+/* frame buffer generic driver */
+static void	cgeightunblank(struct device *);
+static struct fbdriver cgeightfbdriver = { cgeightunblank };
+
+extern int fbnode;
+extern struct tty *fbconstty;
+extern int (*v_putc)();
+extern int nullop();
+static int cgeight_cnputc();
+
+static void cgeightloadcmap __P((struct cgeight_softc *, int, int));
+
+#define	CGEIGHT_MAJOR	64		/* XXX */
+
+/*
+ * Match a cgeight.
+ */
+int
+cgeightmatch(parent, vcf, aux)
+	struct device *parent;
+	void *vcf, *aux;
+{
+	struct cfdata *cf = vcf;
+	struct confargs *ca = aux;
+	struct romaux *ra = &ca->ca_ra;
+
+	if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
+		return (0);
+	if (PFOUR_ID(ra->ra_pfour) == PFOUR_ID_COLOR24)
+		return (1);
+	return (0);
+}
+
+/*
+ * Attach a display.  We need to notice if it is the console, too.
+ */
+void
+cgeightattach(parent, self, args)
+	struct device *parent, *self;
+	void *args;
+{
+	register struct cgeight_softc *sc = (struct cgeight_softc *)self;
+	register struct confargs *ca = args;
+	register int node, ramsize, i;
+	register volatile struct bt_regs *bt;
+	register struct cgeight_all *p;
+	int isconsole;
+#ifdef RCONSOLE
+	struct fbdevice fbd;
+#endif
+
+	sc->sc_fb.fb_major = CGEIGHT_MAJOR;	/* XXX to be removed */
+
+	sc->sc_fb.fb_driver = &cgeightfbdriver;
+	sc->sc_fb.fb_device = &sc->sc_dev;
+	/*
+	 * The defaults below match my screen, but are not guaranteed
+	 * to be correct as defaults go...
+	 */
+	sc->sc_fb.fb_type.fb_type = FBTYPE_MEMCOLOR;
+	node = 0;
+
+	/* all cg8's are the same size */
+	pfour_reset();
+	pfour_videosize(ca->ca_ra.ra_pfour, &sc->sc_fb.fb_type.fb_width,
+	    &sc->sc_fb.fb_type.fb_height);
+	sc->sc_fb.fb_linebytes = sc->sc_fb.fb_type.fb_width * 4;
+
+	ramsize = CG8REG_END - CG8REG_OVERLAY;
+	sc->sc_fb.fb_type.fb_depth = 24;
+	sc->sc_fb.fb_type.fb_cmsize = 256;
+	sc->sc_fb.fb_type.fb_size = ramsize;
+	printf(": %d x %d", sc->sc_fb.fb_type.fb_width,
+	    sc->sc_fb.fb_type.fb_height);
+
+	/*
+	 * When the ROM has mapped in a cgeight display, the address
+	 * maps only the video RAM, so in any case we have to map the
+	 * registers ourselves.  We only need the video RAM if we are
+	 * going to print characters via rconsole.
+	 *
+	 * XXX: it is insane to map the full 0x800000 space, when
+	 * the mmap code down below doesn't want it that way.
+	 * Ridiculous!
+	 */
+	isconsole = node == fbnode && fbconstty != NULL;
+	p = (struct cgeight_all *)ca->ca_ra.ra_paddr;
+	if (ca->ca_ra.ra_vaddr == NULL) {
+		/* this probably cannot happen, but what the heck */
+		ca->ca_ra.ra_vaddr = mapiodev(p->ba_overlay, ramsize,
+		    ca->ca_bustype);
+	}
+	sc->sc_fb.fb_pixels = (char *)((int)ca->ca_ra.ra_vaddr +
+	    CG8REG_COLOUR - CG8REG_OVERLAY);
+
+	sc->sc_bt = bt = (volatile struct bt_regs *)
+	    mapiodev((caddr_t)&p->ba_btreg, sizeof(p->ba_btreg),
+	    ca->ca_bustype);
+	sc->sc_phys = p->ba_overlay;
+
+	/* tell the enable plane to look at the mono image */
+	memset(ca->ca_ra.ra_vaddr, 0xff,
+	    sc->sc_fb.fb_type.fb_width * sc->sc_fb.fb_type.fb_height / 8);
+#if 0
+	memset((caddr_t)((int)ca->ca_ra.ra_vaddr +
+	    CG8REG_ENABLE - CG8REG_OVERLAY), 0x00,
+	    sc->sc_fb.fb_type.fb_width * sc->sc_fb.fb_type.fb_height / 8);
+#endif
+
+	/* grab initial (current) color map */
+	bt->bt_addr = 0;
+	for (i = 0; i < 256 * 3 / 4; i++)
+		sc->sc_cmap.cm_chip[i] = bt->bt_cmap;
+	/* make sure we are not blanked (see cgeightunblank) */
+	bt->bt_addr = 0x06;		/* command reg */
+	bt->bt_ctrl = 0x73;		/* overlay plane */
+	bt->bt_addr = 0x04;		/* read mask */
+	bt->bt_ctrl = 0xff;		/* color planes */
+
+	if (isconsole) {
+		printf(" (console)\n");
+#ifdef RCONSOLE
+		/*
+		 * Like SunOS and the bootrom, we want to do full-screen
+		 * text on the overlay plane. But rcons_init() requires
+		 * our fbdevice pointer to remain the same; so we hack
+		 * the fbdevice, pass it in, and then restore it's
+		 * values. Ugly -- should change rcons_init()'s interface.
+		 */
+		bcopy(&sc->sc_fb, &fbd, sizeof fbd);
+		sc->sc_fb.fb_type.fb_depth = 1;
+		sc->sc_fb.fb_linebytes = sc->sc_fb.fb_type.fb_width / 8;
+		sc->sc_fb.fb_pixels = ca->ca_ra.ra_vaddr;
+		rcons_init(&fbd);
+		bcopy(&fbd, &sc->sc_fb, sizeof fbd);
+#endif
+	} else
+		printf("\n");
+	if (node == fbnode)
+		fb_attach(&sc->sc_fb);
+}
+
+int
+cgeightopen(dev, flags, mode, p)
+	dev_t dev;
+	int flags, mode;
+	struct proc *p;
+{
+	int unit = minor(dev);
+
+	if (unit >= cgeightcd.cd_ndevs || cgeightcd.cd_devs[unit] == NULL)
+		return (ENXIO);
+	return (0);
+}
+
+int
+cgeightclose(dev, flags, mode, p)
+	dev_t dev;
+	int flags, mode;
+	struct proc *p;
+{
+
+	return (0);
+}
+
+int
+cgeightioctl(dev, cmd, data, flags, p)
+	dev_t dev;
+	u_long cmd;
+	register caddr_t data;
+	int flags;
+	struct proc *p;
+{
+	register struct cgeight_softc *sc = cgeightcd.cd_devs[minor(dev)];
+	register struct fbgattr *fba;
+	int error;
+
+	switch (cmd) {
+
+	case FBIOGTYPE:
+		*(struct fbtype *)data = sc->sc_fb.fb_type;
+		break;
+
+	case FBIOGATTR:
+		fba = (struct fbgattr *)data;
+		fba->real_type = sc->sc_fb.fb_type.fb_type;
+		fba->owner = 0;		/* XXX ??? */
+		fba->fbtype = sc->sc_fb.fb_type;
+		fba->sattr.flags = 0;
+		fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type;
+		fba->sattr.dev_specific[0] = -1;
+		fba->emu_types[0] = sc->sc_fb.fb_type.fb_type;
+		fba->emu_types[1] = -1;
+		break;
+
+	case FBIOGETCMAP:
+		return (bt_getcmap((struct fbcmap *)data, &sc->sc_cmap, 256));
+
+	case FBIOPUTCMAP:
+		/* copy to software map */
+#define p ((struct fbcmap *)data)
+		error = bt_putcmap(p, &sc->sc_cmap, 256);
+		if (error)
+			return (error);
+		/* now blast them into the chip */
+		/* XXX should use retrace interrupt */
+		cgeightloadcmap(sc, p->index, p->count);
+#undef p
+		break;
+
+	case FBIOGVIDEO:
+		*(int *)data = sc->sc_blanked;
+		break;
+
+	case FBIOSVIDEO:
+		if (*(int *)data)
+			cgeightunblank(&sc->sc_dev);
+		else if (!sc->sc_blanked) {
+			register volatile struct bt_regs *bt;
+
+			bt = sc->sc_bt;
+			bt->bt_addr = 0x06;	/* command reg */
+			bt->bt_ctrl = 0x70;	/* overlay plane */
+			bt->bt_addr = 0x04;	/* read mask */
+			bt->bt_ctrl = 0x00;	/* color planes */
+			/*
+			 * Set color 0 to black -- note that this overwrites
+			 * R of color 1.
+			 */
+			bt->bt_addr = 0;
+			bt->bt_cmap = 0;
+
+			sc->sc_blanked = 1;
+		}
+		break;
+
+	default:
+		return (ENOTTY);
+	}
+	return (0);
+}
+
+/*
+ * Undo the effect of an FBIOSVIDEO that turns the video off.
+ */
+static void
+cgeightunblank(dev)
+	struct device *dev;
+{
+	struct cgeight_softc *sc = (struct cgeight_softc *)dev;
+	register volatile struct bt_regs *bt;
+
+	if (sc->sc_blanked) {
+		sc->sc_blanked = 0;
+		bt = sc->sc_bt;
+		/* restore color 0 (and R of color 1) */
+		bt->bt_addr = 0;
+		bt->bt_cmap = sc->sc_cmap.cm_chip[0];
+
+		/* restore read mask */
+		bt->bt_addr = 0x06;	/* command reg */
+		bt->bt_ctrl = 0x73;	/* overlay plane */
+		bt->bt_addr = 0x04;	/* read mask */
+		bt->bt_ctrl = 0xff;	/* color planes */
+	}
+}
+
+/*
+ * Load a subset of the current (new) colormap into the Brooktree DAC.
+ */
+static void
+cgeightloadcmap(sc, start, ncolors)
+	register struct cgeight_softc *sc;
+	register int start, ncolors;
+{
+	register volatile struct bt_regs *bt;
+	register u_int *ip;
+	register int count;
+
+	ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)];	/* start/4 * 3 */
+	count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3;
+	bt = sc->sc_bt;
+	bt->bt_addr = BT_D4M4(start);
+	while (--count >= 0)
+		bt->bt_cmap = *ip++;
+}
+
+/*
+ * Return the address that would map the given device at the given
+ * offset, allowing for the given protection, or return -1 for error.
+ *
+ * The cg8 maps it's overlay plane at 0 for 128K, followed by the
+ * enable plane for 128K, followed by the colour for as long as it
+ * goes. Starting at 8MB, it maps the ramdac for NBPG, then the p4
+ * register for NBPG, then the bootrom for 0x40000.
+ */
+int
+cgeightmmap(dev, off, prot)
+	dev_t dev;
+	int off, prot;
+{
+	register struct cgeight_softc *sc = cgeightcd.cd_devs[minor(dev)];
+	int poff;
+
+#define START_ENABLE	(128*1024)
+#define START_COLOUR	(128*1024 + 128*1024)
+#define COLOUR_SIZE	(sc->sc_fb.fb_type.fb_width * \
+			    sc->sc_fb.fb_type.fb_height * 4)
+#define END_COLOUR	(START_COLOUR + COLOUR_SIZE)
+#define START_SPECIAL	0x800000
+#define PROMSIZE	0x40000
+#define NOOVERLAY	(0x04000000)
+
+	if (off & PGOFSET)
+		panic("cgeightmap");
+
+	if ((u_int)off >= NOOVERLAY) {
+		off = off - NOOVERLAY;
+
+		/*
+		 * X11 maps a huge chunk of the frame buffer; far more than
+		 * there really is. We compensate by double-mapping the
+		 * first page for as many other pages as it wants
+		 */
+		while (off >= COLOUR_SIZE)
+			off = 0;
+		poff = off + (CG8REG_COLOUR - CG8REG_OVERLAY);
+	} else if ((u_int)off < START_ENABLE)	/* in overlay plane */
+		poff = off;
+	else if ((u_int)off < START_COLOUR)	/* in enable plane */
+		poff = off + (CG8REG_ENABLE - CG8REG_OVERLAY) - START_ENABLE;
+	else if ((u_int)off < END_COLOUR) 	/* in colour plane */ 
+		poff = off + (CG8REG_COLOUR - CG8REG_OVERLAY) - START_COLOUR;
+	else if ((u_int)off < START_SPECIAL)	/* hole */
+		poff = 0;
+	else if ((u_int)off == START_SPECIAL)	/* colour map */
+		poff = CG8REG_CMAP;
+	else if ((u_int)off == START_SPECIAL + NBPG) /* p4 register */
+		poff = PFOUR_REG;
+	else if ((u_int)off > START_SPECIAL + NBPG*2 &&
+	    (u_int) off < START_SPECIAL + NBPG*2 + PROMSIZE)	/* rom */
+		poff = CG8REG_P4REG + 0x8000 + off - START_SPECIAL + NBPG*2;
+	else
+		return (-1);
+	/*
+	 * I turned on PMAP_NC here to disable the cache as I was
+	 * getting horribly broken behaviour with it on.
+	 */
+	return ((u_int)sc->sc_phys + poff + PMAP_OBIO + PMAP_NC);
+}
diff --git a/sys/arch/sparc/dev/cgeightreg.h b/sys/arch/sparc/dev/cgeightreg.h
new file mode 100644
index 00000000000..1fac1d4227c
--- /dev/null
+++ b/sys/arch/sparc/dev/cgeightreg.h
@@ -0,0 +1,55 @@
+/*	$NetBSD: cgeightreg.h,v 1.4 1994/11/20 20:52:03 deraadt Exp $ */
+
+/*
+ * Copyright (c) 1995 Theo de Raadt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Theo de Raadt.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * cgeight display registers.  Much like bwtwo registers, except that
+ * there is a Brooktree Video DAC in there (so we also use btreg.h).
+ */
+
+/* offsets */
+#define CG8REG_CMAP	0x200000
+#define CG8REG_P4REG	0x300000
+#define	CG8REG_OVERLAY	0x400000
+#define	CG8REG_ENABLE	0x600000
+#define	CG8REG_COLOUR	0x800000
+#define	CG8REG_END	0xa00000
+
+/* same, but for gdb */
+struct cgeight_all {
+	char	ba_nothing[0x200000];
+	struct	bt_regs ba_btreg;	/* Brooktree registers */
+	char	ba_xxx1[0x100000-sizeof(struct bt_regs)];
+	char	ba_pfourreg[0x100000];
+	char	ba_overlay[0x200000];
+	char	ba_enable[0x200000];
+	char	ba_color[0x200000];
+};
diff --git a/sys/arch/sparc/dev/cgfour.c b/sys/arch/sparc/dev/cgfour.c
new file mode 100644
index 00000000000..6e6c83364d6
--- /dev/null
+++ b/sys/arch/sparc/dev/cgfour.c
@@ -0,0 +1,418 @@
+/*	$NetBSD: cgfour.c,v 1.12 1994/11/23 07:02:07 deraadt Exp $ */
+
+/*
+ * Copyright (c) 1995 Theo de Raadt.  All rights reserved.
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by Theo de Raadt.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from @(#)cgthree.c	8.2 (Berkeley) 10/30/93
+ */
+
+/*
+ * color display (cgfour) driver.
+ *
+ * Does not handle interrupts, even though they can occur.
+ *
+ * XXX should defer colormap updates to vertical retrace interrupts
+ */
+
+#include <sys/param.h>
+#include <sys/buf.h>
+#include <sys/device.h>
+#include <sys/ioctl.h>
+#include <sys/malloc.h>
+#include <sys/mman.h>
+#include <sys/tty.h>
+
+#include <vm/vm.h>
+
+#include <machine/fbio.h>
+#include <machine/autoconf.h>
+#include <machine/pmap.h>
+#include <machine/fbvar.h>
+
+#include <sparc/dev/btreg.h>
+#include <sparc/dev/btvar.h>
+#include <sparc/dev/cgfourreg.h>
+#include <sparc/dev/pfourreg.h>
+
+/* per-display variables */
+struct cgfour_softc {
+	struct	device sc_dev;		/* base device */
+	struct	fbdevice sc_fb;		/* frame buffer device */
+	volatile struct bt_regs *sc_bt;	/* Brooktree registers */
+	caddr_t	sc_phys;		/* display RAM (phys addr) */
+	int	sc_blanked;		/* true if blanked */
+	union	bt_cmap sc_cmap;	/* Brooktree color map */
+};
+
+/* autoconfiguration driver */
+void	cgfourattach	__P((struct device *, struct device *, void *));
+int	cgfourmatch	__P((struct device *, void *, void *));
+struct cfdriver cgfourcd = {
+	NULL, "cgfour", cgfourmatch, cgfourattach,
+	DV_DULL, sizeof(struct cgfour_softc)
+};
+
+/* frame buffer generic driver */
+static void cgfourunblank __P((struct device *));
+static struct fbdriver cgfourfbdriver = { cgfourunblank };
+
+extern int fbnode;
+extern struct tty *fbconstty;
+extern int (*v_putc)();
+extern int nullop();
+static int cgfour_cnputc();
+
+static void cgfourloadcmap __P((struct cgfour_softc *, int, int));
+
+#define	CGFOUR_MAJOR	39		/* XXX */
+
+/*
+ * Match a cgfour.
+ */
+int
+cgfourmatch(parent, vcf, aux)
+	struct device *parent;
+	void *vcf, *aux;
+{
+	struct cfdata *cf = vcf;
+	struct confargs *ca = aux;
+	struct romaux *ra = &ca->ca_ra;
+
+	if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
+		return (0);
+	if (PFOUR_ID(ra->ra_pfour) == PFOUR_ID_COLOR8P1)
+		return (1);
+	return (0);
+}
+
+/*
+ * Attach a display.  We need to notice if it is the console, too.
+ */
+void
+cgfourattach(parent, self, args)
+	struct device *parent, *self;
+	void *args;
+{
+	register struct cgfour_softc *sc = (struct cgfour_softc *)self;
+	register struct confargs *ca = args;
+	register int node, ramsize, i;
+	register volatile struct bt_regs *bt;
+	register struct cgfour_all *p;
+	int isconsole;
+
+	sc->sc_fb.fb_major = CGFOUR_MAJOR;	/* XXX to be removed */
+
+	sc->sc_fb.fb_driver = &cgfourfbdriver;
+	sc->sc_fb.fb_device = &sc->sc_dev;
+	/*
+	 * The defaults below match my screen, but are not guaranteed
+	 * to be correct as defaults go...
+	 */
+	sc->sc_fb.fb_type.fb_type = FBTYPE_SUN4COLOR;
+	node = 0;
+
+	pfour_reset();
+	pfour_videosize(ca->ca_ra.ra_pfour, &sc->sc_fb.fb_type.fb_width,
+	    &sc->sc_fb.fb_type.fb_height);
+
+	sc->sc_fb.fb_linebytes = sc->sc_fb.fb_type.fb_width;
+
+	ramsize = CG4REG_END - CG4REG_OVERLAY;
+	sc->sc_fb.fb_type.fb_depth = 8;
+	sc->sc_fb.fb_type.fb_cmsize = 256;
+	sc->sc_fb.fb_type.fb_size = ramsize;
+	printf(": %d x %d", sc->sc_fb.fb_type.fb_width,
+	    sc->sc_fb.fb_type.fb_height);
+
+	/*
+	 * When the ROM has mapped in a cgfour display, the address
+	 * maps only the video RAM, so in any case we have to map the
+	 * registers ourselves.  We only need the video RAM if we are
+	 * going to print characters via rconsole.
+	 *
+	 * XXX: it is insane to map the full 0x800000 space, when
+	 * the mmap code down below doesn't use it all. Ridiculous!
+	 */
+	isconsole = node == fbnode && fbconstty != NULL;
+	p = (struct cgfour_all *)ca->ca_ra.ra_paddr;
+	if (ca->ca_ra.ra_vaddr == NULL) {
+		/* this probably cannot happen, but what the heck */
+		ca->ca_ra.ra_vaddr = mapiodev(p->ba_overlay, ramsize,
+		    ca->ca_bustype);
+	}
+	sc->sc_fb.fb_pixels = (char *)((int)ca->ca_ra.ra_vaddr +
+	    CG4REG_COLOUR - CG4REG_OVERLAY);
+
+	sc->sc_bt = bt = (volatile struct bt_regs *)
+	    mapiodev((caddr_t)&p->ba_btreg, sizeof(p->ba_btreg),
+	    ca->ca_bustype);
+	sc->sc_phys = p->ba_overlay;
+
+	/* grab initial (current) color map */
+	bt->bt_addr = 0;
+	for (i = 0; i < 256 * 3 / 4; i++)
+		((char *)&sc->sc_cmap)[i] = bt->bt_cmap >> 24;
+
+	/* make sure we are not blanked (see cgfourunblank) */
+	bt->bt_addr = 0x06 << 24; 	/* command reg */
+	bt->bt_ctrl = 0x73 << 24;	/* overlay plane */
+	bt->bt_addr = 0x04 << 24;	/* read mask */
+	bt->bt_ctrl = 0xff << 24;	/* color planes */
+
+	if (isconsole) {
+		printf(" (console)\n");
+	} else
+		printf("\n");
+	if (node == fbnode)
+		fb_attach(&sc->sc_fb);
+}
+
+int
+cgfouropen(dev, flags, mode, p)
+	dev_t dev;
+	int flags, mode;
+	struct proc *p;
+{
+	int unit = minor(dev);
+
+	if (unit >= cgfourcd.cd_ndevs || cgfourcd.cd_devs[unit] == NULL)
+		return (ENXIO);
+	return (0);
+}
+
+int
+cgfourclose(dev, flags, mode, p)
+	dev_t dev;
+	int flags, mode;
+	struct proc *p;
+{
+
+	return (0);
+}
+
+int
+cgfourioctl(dev, cmd, data, flags, p)
+	dev_t dev;
+	u_long cmd;
+	register caddr_t data;
+	int flags;
+	struct proc *p;
+{
+	register struct cgfour_softc *sc = cgfourcd.cd_devs[minor(dev)];
+	register struct fbgattr *fba;
+	int error;
+
+	switch (cmd) {
+
+	case FBIOGTYPE:
+		*(struct fbtype *)data = sc->sc_fb.fb_type;
+		break;
+
+	case FBIOGATTR:
+		fba = (struct fbgattr *)data;
+		fba->real_type = sc->sc_fb.fb_type.fb_type;
+		fba->owner = 0;		/* XXX ??? */
+		fba->fbtype = sc->sc_fb.fb_type;
+		fba->sattr.flags = 0;
+		fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type;
+		fba->sattr.dev_specific[0] = -1;
+		fba->emu_types[0] = sc->sc_fb.fb_type.fb_type;
+		fba->emu_types[1] = -1;
+		break;
+
+	case FBIOGETCMAP:
+		return (bt_getcmap((struct fbcmap *)data, &sc->sc_cmap, 256));
+
+	case FBIOPUTCMAP:
+		/* copy to software map */
+#define p ((struct fbcmap *)data)
+		error = bt_putcmap(p, &sc->sc_cmap, 256);
+		if (error)
+			return (error);
+		/* now blast them into the chip */
+		/* XXX should use retrace interrupt */
+		cgfourloadcmap(sc, p->index, p->count);
+#undef p
+		break;
+
+	case FBIOGVIDEO:
+		*(int *)data = sc->sc_blanked;
+		break;
+
+	case FBIOSVIDEO:
+		if (*(int *)data)
+			cgfourunblank(&sc->sc_dev);
+		else if (!sc->sc_blanked) {
+			register volatile struct bt_regs *bt;
+
+			bt = sc->sc_bt;
+			bt->bt_addr = 0x06 << 24;	/* command reg */
+			bt->bt_ctrl = 0x70 << 24;	/* overlay plane */
+			bt->bt_addr = 0x04 << 24;	/* read mask */
+			bt->bt_ctrl = 0x00 << 24;	/* color planes */
+			/*
+			 * Set color 0 to black -- note that this overwrites
+			 * R of color 1.
+			 */
+			bt->bt_addr = 0 << 24;
+			bt->bt_cmap = 0 << 24;
+
+			sc->sc_blanked = 1;
+		}
+		break;
+
+	default:
+		return (ENOTTY);
+	}
+	return (0);
+}
+
+/*
+ * Undo the effect of an FBIOSVIDEO that turns the video off.
+ */
+static void
+cgfourunblank(dev)
+	struct device *dev;
+{
+	struct cgfour_softc *sc = (struct cgfour_softc *)dev;
+	register volatile struct bt_regs *bt;
+
+	if (sc->sc_blanked) {
+		sc->sc_blanked = 0;
+		bt = sc->sc_bt;
+		/* restore color 0 (and R of color 1) */
+		bt->bt_addr = 0 << 24;
+		bt->bt_cmap = sc->sc_cmap.cm_chip[0];
+		bt->bt_cmap = sc->sc_cmap.cm_chip[0] << 8;
+		bt->bt_cmap = sc->sc_cmap.cm_chip[0] << 16;
+
+		/* restore read mask */
+		bt->bt_addr = 0x06 << 24;	/* command reg */
+		bt->bt_ctrl = 0x73 << 24;	/* overlay plane */
+		bt->bt_addr = 0x04 << 24;	/* read mask */
+		bt->bt_ctrl = 0xff << 24;	/* color planes */
+	}
+}
+
+/*
+ * Load a subset of the current (new) colormap into the Brooktree DAC.
+ */
+static void
+cgfourloadcmap(sc, start, ncolors)
+	register struct cgfour_softc *sc;
+	register int start, ncolors;
+{
+	register volatile struct bt_regs *bt;
+	register u_int *ip, i;
+	register int count;
+
+	ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)];	/* start/4 * 3 */
+	count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3;
+	bt = sc->sc_bt;
+	bt->bt_addr = BT_D4M4(start) << 24;
+	while (--count >= 0) {
+		i = *ip++;
+		/* hardware that makes one want to pound boards with hammers */
+		bt->bt_cmap = i;
+		bt->bt_cmap = i << 8;
+		bt->bt_cmap = i << 16;
+		bt->bt_cmap = i << 24;
+	}
+}
+
+/*
+ * Return the address that would map the given device at the given
+ * offset, allowing for the given protection, or return -1 for error.
+ *
+ * the cg4 maps it's overlay plane for 128K, followed by the enable
+ * plane for 128K, followed by the colour plane (for as much colour
+ * as their is.)
+ * 
+ * As well, mapping at an offset of 0x04000000 causes the cg4 to map
+ * only it's colour plane, at 0.
+ */
+int
+cgfourmmap(dev, off, prot)
+	dev_t dev;
+	int off, prot;
+{
+	register struct cgfour_softc *sc = cgfourcd.cd_devs[minor(dev)];
+	int poff;
+
+#define START_ENABLE	(128*1024)
+#define START_COLOUR	(128*1024 + 128*1024)
+#define COLOUR_SIZE	(sc->sc_fb.fb_type.fb_width * sc->sc_fb.fb_type.fb_height)
+#define END_COLOUR	(START_COLOUR + COLOUR_SIZE)
+#define NOOVERLAY	(0x04000000)
+
+	if (off & PGOFSET)
+		panic("cgfourmap");
+
+	if ((u_int)off >= NOOVERLAY) {
+		off = off - NOOVERLAY;
+
+		/*
+		 * X11 maps a huge chunk of the frame buffer; far more than
+		 * there really is. We compensate by double-mapping the
+		 * first page for as many other pages as it wants
+		 */
+		while (off >= COLOUR_SIZE)
+			off = 0;
+		poff = off + (CG4REG_COLOUR - CG4REG_OVERLAY);
+	} else if ((u_int)off < START_ENABLE)	/* in overlay plane */
+		poff = off;
+	else if ((u_int)off < START_COLOUR)	/* in enable plane */
+		poff = off + (CG4REG_ENABLE - CG4REG_OVERLAY) - START_ENABLE;
+	else if ((u_int)off < (CG4REG_END - CG4REG_OVERLAY)) 	/* in colour plane */ 
+		poff = off + (CG4REG_COLOUR - CG4REG_OVERLAY) - START_COLOUR;
+	else
+		return (-1);
+	/*
+	 * I turned on PMAP_NC here to disable the cache as I was
+	 * getting horribly broken behaviour with it on.
+	 */
+	return ((u_int)sc->sc_phys + poff + PMAP_OBIO + PMAP_NC);
+}
diff --git a/sys/arch/sparc/dev/cgfourreg.h b/sys/arch/sparc/dev/cgfourreg.h
new file mode 100644
index 00000000000..9d53b73de6e
--- /dev/null
+++ b/sys/arch/sparc/dev/cgfourreg.h
@@ -0,0 +1,54 @@
+/*	$NetBSD: cgfourreg.h,v 1.4 1994/11/20 20:52:03 deraadt Exp $ */
+
+/*
+ * Copyright (c) 1995 Theo de Raadt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Theo de Raadt.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * cgfour display registers.  Much like bwtwo registers, except that
+ * there is a Brooktree Video DAC in there (so we also use btreg.h).
+ */
+
+/* offsets */
+#define CG4REG_CMAP	0x200000
+#define	CG4REG_OVERLAY	0x400000
+#define	CG4REG_ENABLE	0x600000
+#define	CG4REG_COLOUR	0x800000
+#define	CG4REG_END	0xa00000
+
+/* same, but for gdb */
+struct cgfour_all {
+	char	ba_nothing[0x200000];
+	struct	bt_regs ba_btreg;	/* Brooktree registers */
+	char	ba_xxx1[0x100000-sizeof(struct bt_regs)];
+	char	ba_pfourreg[0x100000];
+	char	ba_overlay[0x200000];
+	char	ba_enable[0x200000];
+	char	ba_color[0x200000];
+};
diff --git a/sys/arch/sparc/dev/pfour.c b/sys/arch/sparc/dev/pfour.c
new file mode 100644
index 00000000000..78c3ccb722d
--- /dev/null
+++ b/sys/arch/sparc/dev/pfour.c
@@ -0,0 +1,189 @@
+/*	$NetBSD: cgfourreg.h,v 1.4 1994/11/20 20:52:03 deraadt Exp $ */
+
+/*
+ * Copyright (c) 1995 Theo de Raadt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Theo de Raadt.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+
+#ifdef DEBUG
+#include <sys/proc.h>
+#include <sys/syslog.h>
+#endif
+
+#include <vm/vm.h>
+
+#include <machine/autoconf.h>
+#include <machine/pmap.h>
+#include <machine/oldmon.h>
+#include <machine/cpu.h>
+#include <machine/ctlreg.h>
+#include <sparc/sparc/asm.h>
+#include <sparc/sparc/vaddrs.h>
+#include <sparc/dev/pfourreg.h>
+
+volatile int *pfour_vaddr;		/* pfour register */
+
+struct pfour_softc {
+	struct	device sc_dev;		/* base device */
+	int	nothing;
+};
+
+static int	pfourmatch __P((struct device *, void *, void *));
+static void	pfourattach __P((struct device *, struct device *, void *));
+struct cfdriver pfourcd = { NULL, "pfour", pfourmatch, pfourattach,
+	DV_DULL, sizeof(struct pfour_softc)
+};
+
+int
+pfourmatch(parent, vcf, aux)
+	struct device *parent;
+	void *vcf, *aux;
+{
+	struct cfdata *cf = vcf;
+	register struct confargs *ca = aux;
+	register struct romaux *ra = &ca->ca_ra;
+
+	return (strcmp(cf->cf_driver->cd_name, ra->ra_name) == 0);
+}
+
+void
+pfourattach(parent, self, args)
+	struct device *parent, *self;
+	void *args;
+{
+	register struct pfour_softc *sc = (struct pfour_softc *)self;
+	extern struct cfdata cfdata[];
+	register struct confargs *ca = args;
+	struct confargs oca;
+	register short *p;
+	struct cfdata *cf;
+	caddr_t tmp;
+	u_int val;
+
+	if (sc->sc_dev.dv_unit > 0) {
+		printf(" unsupported\n");
+		return;
+	}
+
+	tmp = bus_tmp(ca->ca_ra.ra_paddr + PFOUR_REG, BUS_PFOUR);
+	if (tmp == NULL) {
+		printf("\n");
+		return;
+	}
+	val = probeget(tmp, 4);
+
+	if (val == -1) {
+		printf(": empty\n");
+		return;
+	}
+
+	pfour_vaddr = mapiodev((caddr_t)(ca->ca_ra.ra_paddr + PFOUR_REG),
+	    NBPG, ca->ca_bustype);
+
+	printf(": cardtype 0x%02x\n", PFOUR_FBTYPE(val));
+
+	*(int *)tmp = PFOUR_REG_VIDEO | PFOUR_REG_RESET;
+	*(int *)tmp = PFOUR_REG_VIDEO;
+
+	for (cf = cfdata; cf->cf_driver; cf++) {
+		if (cf->cf_fstate == FSTATE_FOUND)
+			continue;
+		for (p = cf->cf_parents; *p >= 0; p++)
+			if (self->dv_cfdata == &cfdata[*p]) {
+				oca.ca_ra.ra_iospace = -1;
+				oca.ca_ra.ra_len = 0;
+				oca.ca_ra.ra_nreg = 1;
+				oca.ca_ra.ra_pfour = val;
+				oca.ca_ra.ra_intr[0].int_vec = -1;
+				oca.ca_ra.ra_nintr = 0;
+				oca.ca_ra.ra_name = cf->cf_driver->cd_name;
+				oca.ca_ra.ra_paddr = ca->ca_ra.ra_paddr;
+				oca.ca_bustype = BUS_PFOUR;
+
+				if ((*cf->cf_driver->cd_match)(self, cf, &oca) == 0)
+					continue;
+				config_attach(self, cf, &oca, NULL);
+			}
+	}
+	bus_untmp();
+}
+
+void
+pfour_reset()
+{
+	*pfour_vaddr = PFOUR_REG_VIDEO | PFOUR_REG_RESET;
+	*pfour_vaddr = PFOUR_REG_VIDEO;
+}
+
+int
+pfour_videosize(reg, xp, yp)
+	int reg;
+	int *xp, *yp;
+{
+	if (PFOUR_ID(reg) == PFOUR_ID_COLOR24) {
+		*xp = 1152;
+		*yp = 900;
+		return 0;
+	}
+
+	switch (PFOUR_SIZE(reg)) {
+	case PFOUR_SIZE_1152X900:
+		*xp = 1152;
+		*yp = 900;
+		break;
+	case PFOUR_SIZE_1024X1024:
+		*xp = 1024;
+		*yp = 1024;
+		break;
+	case PFOUR_SIZE_1280X1024:
+		*xp = 1280;
+		*yp = 1024;
+		break;
+	case PFOUR_SIZE_1600X1280:
+		*xp = 1600;
+		*yp = 1280;
+		break;
+	case PFOUR_SIZE_1440X1440:
+		*xp = 1440;
+		*yp = 1440;
+		break;
+	case PFOUR_SIZE_640X480:
+		*xp = 640;
+		*yp = 480;
+		break;
+	default:
+		*xp = 1152;		/* assume, but indicate error */
+		*yp = 900;
+		return (-1);
+	}
+	return (0);
+}
diff --git a/sys/arch/sparc/dev/pfourreg.h b/sys/arch/sparc/dev/pfourreg.h
new file mode 100644
index 00000000000..c6bb0cc25a2
--- /dev/null
+++ b/sys/arch/sparc/dev/pfourreg.h
@@ -0,0 +1,73 @@
+/*	$NetBSD: cgfourreg.h,v 1.4 1994/11/20 20:52:03 deraadt Exp $ */
+
+/*
+ * Copyright (c) 1995 Theo de Raadt
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Theo de Raadt.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * pfour bus registers.
+ */
+
+/* offsets */
+#define	PFOUR_REG		0x300000	/* offset from 0x[0f]b000000 */
+
+#define PFOUR_REG_DIAG		0x80
+#define PFOUR_REG_READBACKCLR	0x40
+#define PFOUR_REG_VIDEO		0x20
+#define PFOUR_REG_SYNC		0x10
+#define PFOUR_REG_VTRACE	0x08
+#define PFOUR_REG_INT		0x04
+#define PFOUR_REG_INTCLR	0x04
+#define PFOUR_REG_INTEN		0x02
+#define PFOUR_REG_FIRSTHALF	0x01
+#define PFOUR_REG_RESET		0x01
+
+#define	PFOUR_FBTYPE(x)		((x) >> 24)
+
+#define	PFOUR_ID_MASK		0xf0
+#define PFOUR_ID(x)		(PFOUR_FBTYPE((x)) == PFOUR_ID_COLOR24 ? \
+				    PFOUR_ID_COLOR24 : \
+				    PFOUR_FBTYPE((x)) & PFOUR_ID_MASK)
+#define PFOUR_ID_BW		0x00	/* monochrome */
+#define PFOUR_ID_FASTCOLOR	0x60	/* accelerated 8-bit color */
+#define PFOUR_ID_COLOR8P1	0x40	/* 8-bit color + overlay */
+#define PFOUR_ID_COLOR24	0x45	/* 24-bit color + overlay */
+
+#define PFOUR_SIZE_MASK		0x0f
+#define PFOUR_SIZE(x)		(PFOUR_FBTYPE((x)) & PFOUR_SIZE_MASK)
+#define PFOUR_SIZE_1152X900	0x01
+#define PFOUR_SIZE_1024X1024	0x02
+#define PFOUR_SIZE_1280X1024	0x03
+#define PFOUR_SIZE_1600X1280	0x00
+#define PFOUR_SIZE_1440X1440	0x04
+#define PFOUR_SIZE_640X480	0x05
+
+int	pfour_videosize __P((int reg, int *xp, int *yp));
+void	pfour_reset __P((void));
+