Remove the inline cache and TLB primitives - we don't use them at this point,

they do not cover the HP MMU for hp300, and they do not cover 040+060 kernels
(which share all cache operations) efficiently.

6 files changed, 0 insertions, 1390 deletions

diff --git a/sys/arch/m68k/include/cacheops.h b/sys/arch/m68k/include/cacheops.h
deleted file mode 100644
index ff404a7f7cc..00000000000
--- a/sys/arch/m68k/include/cacheops.h
+++ /dev/null
@@ -1,171 +0,0 @@
-/*	$OpenBSD: cacheops.h,v 1.3 2002/03/14 01:26:34 millert Exp $	*/
-/*	$NetBSD: cacheops.h,v 1.1 1997/06/02 20:26:37 leo Exp $	*/
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Leo Weppelman
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#if notyet /* XXX */
-#include <machine/cpuconf.h>
-#endif
-
-#include <m68k/cacheops_20.h>
-#include <m68k/cacheops_30.h>
-#include <m68k/cacheops_40.h>
-#include <m68k/cacheops_60.h>
-
-#if defined(M68020) && !(defined(M68030)||defined(M68040)||defined(M68060))
-
-#define	TBIA()		TBIA_20()
-#define	TBIS(va)	TBIS_20((va))
-#define	TBIAS()		TBIAS_20()
-#define	TBIAU()		TBIAU_20()
-#define	ICIA()		ICIA_20()
-#define	ICPA()		ICPA_20()
-#define	DCIA()		DCIA_20()
-#define	DCIS()		DCIS_20()
-#define	DCIU()		DCIU_20()
-#define	DCIAS()		DCIAS_20()
-#define	PCIA()		PCIA_20()
-
-#elif defined(M68030) && !(defined(M68020)||defined(M68040)||defined(M68060))
-
-#define	TBIS(va)	TBIS_30((va))
-#define	TBIAS()		TBIAS_30()
-#define	TBIAU()		TBIAU_30()
-#define	ICIA()		ICIA_30()
-#define	ICPA()		ICPA_30()
-#define	DCIA()		DCIA_30()
-#define	DCIS()		DCIS_30()
-#define	DCIU()		DCIU_30()
-#define	DCIAS()		DCIAS_30()
-#define	PCIA()		PCIA_30()
-
-#elif defined(M68040) && !(defined(M68020)||defined(M68030)||defined(M68060))
-
-#define	TBIA()		TBIA_40()
-#define	TBIS(va)	TBIS_40((va))
-#define	TBIAS()		TBIAS_40()
-#define	TBIAU()		TBIAU_40()
-#define	ICIA()		ICIA_40()
-#define	ICPA()		ICPA_40()
-#define	DCIA()		DCIA_40()
-#define	DCIS()		DCIS_40()
-#define	DCIU()		DCIU_40()
-#define	DCIAS(va)	DCIAS_40((va))
-#define	PCIA()		PCIA_40()
-#define	ICPL(va)	ICPL_40((va))
-#define	ICPP(va)	ICPP_40((va))
-#define	DCPL(va)	DCPL_40((va))
-#define	DCPP(va)	DCPP_40((va))
-#define	DCPA()		DCPA_40()
-#define	DCFL(va)	DCFL_40((va))
-#define	DCFP(va)	DCFP_40((va))
-
-#elif defined(M68060) && !(defined(M68020)||defined(M68030)||defined(M68040))
-
-#define	TBIA()		TBIA_60()
-#define	TBIS(va)	TBIS_60((va))
-#define	TBIAS()		TBIAS_60()
-#define	TBIAU()		TBIAU_60()
-#define	ICIA()		ICIA_60()
-#define	ICPA()		ICPA_60()
-#define	DCIA()		DCIA_60()
-#define	DCIS()		DCIS_60()
-#define	DCIU()		DCIU_60()
-#define	DCIAS(va)	DCIAS_60((va))
-#define	PCIA()		PCIA_60()
-#define	ICPL(va)	ICPL_60((va))
-#define	ICPP(va)	ICPP_60((va))
-#define	DCPL(va)	DCPL_60((va))
-#define	DCPP(va)	DCPP_60((va))
-#define	DCPA()		DCPA_60()
-#define	DCFL(va)	DCFL_60((va))
-#define	DCFP(va)	DCFP_60((va))
-
-#else /* Multi-CPU config */
-
-/* XXX: From cpuconf.h? */
-#ifndef _MULTI_CPU
-#define	_MULTI_CPU
-#endif
-
-void	_TBIA(void);
-void	_TBIS(vaddr_t);
-void	_TBIAS(void);
-void	_TBIAU(void);
-void	_ICIA(void);
-void	_ICPA(void);
-void	_DCIA(void);
-void	_DCIS(void);
-void	_DCIU(void);
-void	_DCIAS(paddr_t);
-
-#define	TBIA()		_TBIA()
-#define	TBIS(va)	_TBIS((va))
-#define	TBIAS()		_TBIAS()
-#define	TBIAU()		_TBIAU()
-#define	ICIA()		_ICIA()
-#define	ICPA()		_ICPA()
-#define	DCIA()		_DCIA()
-#define	DCIS()		_DCIS()
-#define	DCIU()		_DCIU()
-#define	DCIAS(va)	_DCIAS((va))
-
-#if defined(M68040)||defined(M68060)
-
-void	_PCIA(void);
-void	_DCFA(void);
-void	_ICPL(paddr_t);
-void	_ICPP(paddr_t);
-void	_DCPL(paddr_t);
-void	_DCPP(paddr_t);
-void	_DCPA(void);
-void	_DCFL(paddr_t);
-void	_DCFP(paddr_t);
-
-#define	PCIA()		_PCIA()
-#define	DCFA()		_DCFA()
-#define	ICPL(va)	_ICPL((va))
-#define	ICPP(va)	_ICPP((va))
-#define	DCPL(va)	_DCPL((va))
-#define	DCPP(va)	_DCPP((va))
-#define	DCPA()		_DCPA()
-#define	DCFL(va)	_DCFL((va))
-#define	DCFP(va)	_DCFP((va))
-
-#endif /* defined(M68040)||defined(M68060) */
-
-#endif
diff --git a/sys/arch/m68k/include/cacheops_20.h b/sys/arch/m68k/include/cacheops_20.h
deleted file mode 100644
index e9a5eb3feae..00000000000
--- a/sys/arch/m68k/include/cacheops_20.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*	$OpenBSD: cacheops_20.h,v 1.3 2002/03/14 01:26:34 millert Exp $	*/
-/*	$NetBSD: cacheops_20.h,v 1.1 1997/06/02 20:26:39 leo Exp $	*/
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Leo Weppelman
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Invalidate entire TLB.
- */
-void TBIA_20(void);
-extern __inline__ void
-TBIA_20()
-{
-	__asm __volatile (" pflusha");
-}
-
-/*
- * Invalidate any TLB entry for given VA (TB Invalidate Single)
- */
-void TBIS_20(void *);
-extern __inline__ void
-TBIS_20(va)
-	void	*va;
-{
-
-	__asm __volatile (" pflushs	#0,#0,%0@" : : "a" (va) );
-}
-
-/*
- * Invalidate supervisor side of TLB
- */
-void TBIAS_20(void);
-extern __inline__ void
-TBIAS_20()
-{
-	__asm __volatile (" pflushs #4,#4");
-}
-
-/*
- * Invalidate user side of TLB
- */
-void TBIAU_20(void);
-extern __inline__ void
-TBIAU_20()
-{
-	__asm __volatile (" pflushs #0,#4;");
-}
-
-/*
- * Invalidate instruction cache
- */
-void ICIA_20(void);
-extern __inline__ void
-ICIA_20()
-{
-	__asm __volatile (" movc %0,cacr;" : : "d" (IC_CLEAR));
-}
-
-void ICPA_20(void);
-extern __inline__ void
-ICPA_20()
-{
-	__asm __volatile (" movc %0,cacr;" : : "d" (IC_CLEAR));
-}
-
-/*
- * Invalidate data cache.
- * NOTE: we do not flush 68030/20 on-chip cache as there are no aliasing
- * problems with DC_WA.  The only cases we have to worry about are context
- * switch and TLB changes, both of which are handled "in-line" in resume
- * and TBI*.
- */
-#define	DCIA_20()
-#define	DCIS_20()
-#define	DCIU_20()
-#define	DCIAS_20()
-
-void PCIA_20(void);
-extern __inline__ void
-PCIA_20()
-{
-	__asm __volatile (" movc %0,cacr;" : : "d" (DC_CLEAR));
-}
diff --git a/sys/arch/m68k/include/cacheops_30.h b/sys/arch/m68k/include/cacheops_30.h
deleted file mode 100644
index cbbb46aaf08..00000000000
--- a/sys/arch/m68k/include/cacheops_30.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*	$OpenBSD: cacheops_30.h,v 1.5 2002/08/09 21:26:15 mickey Exp $	*/
-/*	$NetBSD: cacheops_30.h,v 1.1 1997/06/02 20:26:40 leo Exp $	*/
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Leo Weppelman
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Invalidate entire TLB.
- */
-void TBIA_30(void);
-extern __inline__ void
-TBIA_30()
-{
-	int tmp = DC_CLEAR;
-
-	__asm __volatile (" pflusha;"
-			  " movc %0,cacr" : : "d" (tmp));
-}
-	
-/*
- * Invalidate any TLB entry for given VA (TB Invalidate Single)
- */
-void TBIS_30(vaddr_t);
-extern __inline__ void
-TBIS_30(va)
-	vaddr_t	va;
-{
-	__asm __volatile (" pflush #0,#0,%0@;"
-			  " movc   %1,cacr" : : "a" (va), "d" (DC_CLEAR));
-}
-
-/*
- * Invalidate supervisor side of TLB
- */
-void TBIAS_30(void);
-extern __inline__ void
-TBIAS_30()
-{
-	__asm __volatile (" pflush #4,#4;"
-			  " movc   %0,cacr;" :: "d" (DC_CLEAR));
-}
-
-/*
- * Invalidate user side of TLB
- */
-void TBIAU_30(void);
-extern __inline__ void
-TBIAU_30()
-{
-	__asm __volatile (" pflush #0,#4;"
-			  " movc   %0,cacr;" :: "d" (DC_CLEAR));
-}
-
-/*
- * Invalidate instruction cache
- */
-void ICIA_30(void);
-extern __inline__ void
-ICIA_30()
-{
-	__asm __volatile (" movc %0,cacr;" : : "d" (IC_CLEAR));
-}
-
-void ICPA_30(void);
-extern __inline__ void
-ICPA_30()
-{
-	__asm __volatile (" movc %0,cacr;" : : "d" (IC_CLEAR));
-}
-
-/*
- * Invalidate data cache.
- * NOTE: we do not flush 68030/20 on-chip cache as there are no aliasing
- * problems with DC_WA.  The only cases we have to worry about are context
- * switch and TLB changes, both of which are handled "in-line" in resume
- * and TBI*.
- */
-#define	DCIA_30()
-#define	DCIS_30()
-#define	DCIU_30()
-#define	DCIAS_30(va)
-#define	DCFA_30()
-#define	DCPA_30()
-
-
-void PCIA_30(void);
-extern __inline__ void
-PCIA_30()
-{
-	__asm __volatile (" movc %0,cacr;" : : "d" (DC_CLEAR));
-}
diff --git a/sys/arch/m68k/include/cacheops_40.h b/sys/arch/m68k/include/cacheops_40.h
deleted file mode 100644
index de20d2d4873..00000000000
--- a/sys/arch/m68k/include/cacheops_40.h
+++ /dev/null
@@ -1,232 +0,0 @@
-/*	$OpenBSD: cacheops_40.h,v 1.4 2002/03/14 01:26:34 millert Exp $	*/
-/*	$NetBSD: cacheops_40.h,v 1.1 1997/06/02 20:26:41 leo Exp $	*/
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Leo Weppelman
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Invalidate entire TLB.
- */
-void TBIA_40(void);
-extern __inline__ void
-TBIA_40()
-{
-	__asm __volatile (" .word 0xf518" ); /*  pflusha */
-}
-
-/*
- * Invalidate any TLB entry for given VA (TB Invalidate Single)
- */
-void TBIS_40(vaddr_t);
-extern __inline__ void
-TBIS_40(va)
-	vaddr_t	va;
-{
-	register vaddr_t	r_va __asm("a0") = va;
-	int	tmp;
-
-	__asm __volatile (" movc   %1, dfc;"	/* select supervisor	*/
-			  " .word 0xf508;"	/* pflush a0@		*/
-			  " moveq  %3, %1;"	/* select user		*/
-			  " movc   %1, dfc;"
-			  " .word 0xf508;" : "=d" (tmp) :
-			  "0" (FC_SUPERD), "a" (r_va), "i" (FC_USERD));
-}
-
-/*
- * Invalidate supervisor side of TLB
- */
-void TBIAS_40(void);
-extern __inline__ void
-TBIAS_40()
-{
-	/*
-	 * Cannot specify supervisor/user on pflusha, so we flush all
-	 */
-	__asm __volatile (" .word 0xf518;");
-}
-
-/*
- * Invalidate user side of TLB
- */
-void TBIAU_40(void);
-extern __inline__ void
-TBIAU_40()
-{
-	/*
-	 * Cannot specify supervisor/user on pflusha, so we flush all
-	 */
-	__asm __volatile (" .word 0xf518;");
-}
-
-/*
- * Invalidate instruction cache
- */
-void ICIA_40(void);
-extern __inline__ void
-ICIA_40()
-{
-	__asm __volatile (" .word 0xf498;"); /* cinva ic */
-}
-
-void ICPA_40(void);
-extern __inline__ void
-ICPA_40()
-{
-	__asm __volatile (" .word 0xf498;"); /* cinva ic */
-}
-
-/*
- * Invalidate data cache.
- */
-void DCIA_40(void);
-extern __inline__ void
-DCIA_40()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCIS_40(void);
-extern __inline__ void
-DCIS_40()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCIU_40(void);
-extern __inline__ void
-DCIU_40()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCIAS_40(paddr_t);
-extern __inline__ void
-DCIAS_40(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
-}
-
-void PCIA_40(void);
-extern __inline__ void
-PCIA_40()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCFA_40(void);
-extern __inline__ void
-DCFA_40()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-/* invalidate instruction physical cache line */
-void ICPL_40(paddr_t);
-extern __inline__ void
-ICPL_40(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf488;" : : "a" (r_pa)); /* cinvl ic,a0@ */
-}
-
-/* invalidate instruction physical cache page */
-void ICPP_40(paddr_t);
-extern __inline__ void
-ICPP_40(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf490;" : : "a" (r_pa)); /* cinvp ic,a0@ */
-}
-
-/* invalidate data physical cache line */
-void DCPL_40(paddr_t);
-extern __inline__ void
-DCPL_40(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf448;" : : "a" (r_pa)); /* cinvl dc,a0@ */
-}
-
-/* invalidate data physical cache page */
-void DCPP_40(paddr_t);
-extern __inline__ void
-DCPP_40(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf450;" : : "a" (r_pa)); /* cinvp dc,a0@ */
-}
-
-/* invalidate data physical all */
-void DCPA_40(void);
-extern __inline__ void
-DCPA_40()
-{
-	__asm __volatile (" .word 0xf458;"); /* cinva dc */
-}
-
-/* data cache flush line */
-void DCFL_40(paddr_t);
-extern __inline__ void
-DCFL_40(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
-}
-
-/* data cache flush page */
-void DCFP_40(paddr_t);
-extern __inline__ void
-DCFP_40(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf470;" : : "a" (r_pa)); /* cpushp dc,a0@ */
-}
diff --git a/sys/arch/m68k/include/cacheops_60.h b/sys/arch/m68k/include/cacheops_60.h
deleted file mode 100644
index b7f846b070d..00000000000
--- a/sys/arch/m68k/include/cacheops_60.h
+++ /dev/null
@@ -1,248 +0,0 @@
-/*	$OpenBSD: cacheops_60.h,v 1.5 2002/08/09 21:28:09 mickey Exp $	*/
-/*	$NetBSD: cacheops_60.h,v 1.1 1997/06/02 20:26:43 leo Exp $	*/
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Leo Weppelman
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Invalidate entire TLB.
- */
-void TBIA_60(void);
-extern __inline__ void
-TBIA_60()
-{
-	__asm __volatile (" .word 0xf518" ); /*  pflusha */
-}
-
-/*
- * Invalidate any TLB entry for given VA (TB Invalidate Single)
- */
-void TBIS_60(vaddr_t);
-extern __inline__ void
-TBIS_60(va)
-	vaddr_t	va;
-{
-	register vaddr_t	r_va __asm("a0") = va;
-	int	tmp;
-
-	__asm __volatile (" movc   %1, dfc;"	/* select supervisor	*/
-			  " .word 0xf508;"	/* pflush a0@		*/
-			  " moveq  %3, %1;"	/* select user		*/
-			  " movc   %1, dfc;"
-			  " .word 0xf508;"	/* pflush a0@		*/
-			  " movc   cacr,%1;"
-			  " orl    %4,%1;"
-			  " movc   %1,cacr" : "=d" (tmp) :
-			  "0" (FC_SUPERD), "a" (r_va), "i" (FC_USERD),
-			  "i" (IC60_CABC));
-}
-
-/*
- * Invalidate supervisor side of TLB
- */
-void TBIAS_60(void);
-extern __inline__ void
-TBIAS_60()
-{
-	int	tmp;
-	/*
-	 * Cannot specify supervisor/user on pflusha, so we flush all
-	 */
-	__asm __volatile (" .word 0xf518;"
-			  " movc  cacr,%0;"
-			  " orl   %1,%0;"
-			  " movc  %0,cacr" /* clear all branch cache entries */
-			  : "=d" (tmp) : "i" (IC60_CABC) );
-}
-
-/*
- * Invalidate user side of TLB
- */
-void TBIAU_60(void);
-extern __inline__ void
-TBIAU_60()
-{
-	int	tmp;
-	/*
-	 * Cannot specify supervisor/user on pflusha, so we flush all
-	 */
-	__asm __volatile (" .word 0xf518;"
-			  " movc  cacr,%0;"
-			  " orl   %1,%0;"
-			  " movc  %0,cacr" /* clear all branch cache entries */
-			  : "=d" (tmp) : "i" (IC60_CUBC) );
-}
-
-/*
- * Invalidate instruction cache
- */
-void ICIA_60(void);
-extern __inline__ void
-ICIA_60()
-{
-	/* inva ic (also clears branch cache) */
-	__asm __volatile (" .word 0xf498;");
-}
-
-void ICPA_60(void);
-extern __inline__ void
-ICPA_60()
-{
-	/* inva ic (also clears branch cache) */
-	__asm __volatile (" .word 0xf498;");
-}
-
-/*
- * Invalidate data cache.
- */
-void DCIA_60(void);
-extern __inline__ void
-DCIA_60()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCIS_60(void);
-extern __inline__ void
-DCIS_60()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCIU_60(void);
-extern __inline__ void
-DCIU_60()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCIAS_60(paddr_t);
-extern __inline__ void
-DCIAS_60(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
-}
-
-void PCIA_60(void);
-extern __inline__ void
-PCIA_60()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-void DCFA_60(void);
-extern __inline__ void
-DCFA_60()
-{
-	__asm __volatile (" .word 0xf478;"); /* cpusha dc */
-}
-
-/* invalidate instruction physical cache line */
-void ICPL_60(paddr_t);
-extern __inline__ void
-ICPL_60(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf488;" : : "a" (r_pa)); /* cinvl ic,a0@ */
-}
-
-/* invalidate instruction physical cache page */
-void ICPP_60(paddr_t);
-extern __inline__ void
-ICPP_60(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf490;" : : "a" (r_pa)); /* cinvp ic,a0@ */
-}
-
-/* invalidate data physical cache line */
-void DCPL_60(paddr_t);
-extern __inline__ void
-DCPL_60(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf448;" : : "a" (r_pa)); /* cinvl dc,a0@ */
-}
-
-/* invalidate data physical cache page */
-void DCPP_60(paddr_t);
-extern __inline__ void
-DCPP_60(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf450;" : : "a" (r_pa)); /* cinvp dc,a0@ */
-}
-
-/* invalidate data physical all */
-void DCPA_60(void);
-extern __inline__ void
-DCPA_60()
-{
-	__asm __volatile (" .word 0xf458;"); /* cinva dc */
-}
-
-/* data cache flush line */
-void DCFL_60(paddr_t);
-extern __inline__ void
-DCFL_60(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf468;" : : "a" (r_pa)); /* cpushl dc,a0@ */
-}
-
-/* data cache flush page */
-void DCFP_60(paddr_t);
-extern __inline__ void
-DCFP_60(pa)
-	paddr_t	pa;
-{
-	register paddr_t	r_pa __asm("a0") = pa;
-
-	__asm __volatile (" .word 0xf470;" : : "a" (r_pa)); /* cpushp dc,a0@ */
-}
diff --git a/sys/arch/m68k/m68k/cacheops.c b/sys/arch/m68k/m68k/cacheops.c
deleted file mode 100644
index e1e0ef0dd9b..00000000000
--- a/sys/arch/m68k/m68k/cacheops.c
+++ /dev/null
@@ -1,499 +0,0 @@
-/*	$OpenBSD: cacheops.c,v 1.2 2001/05/15 01:43:15 millert Exp $	*/
-/*	$NetBSD: cacheops.c,v 1.1 1997/06/02 20:26:57 leo Exp $	*/
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Leo Weppelman
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *        This product includes software developed by the NetBSD
- *        Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-#include <sys/types.h>
-#include <m68k/cpu.h>
-#include <m68k/cacheops.h>
-#include <machine/cpu.h>
-
-#if defined(_MULTI_CPU)
-
-void _TBIA()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		TBIA_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		TBIA_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		TBIA_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		TBIA_60();
-		break;
-#endif
-	}
-}
-
-void _TBIAS()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		TBIAS_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		TBIAS_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		TBIAS_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		TBIAS_60();
-		break;
-#endif
-	}
-}
-
-void _TBIAU()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		TBIAU_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		TBIAU_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		TBIAU_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		TBIAU_60();
-		break;
-#endif
-	}
-}
-
-void _ICIA()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		ICIA_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		ICIA_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		ICIA_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		ICIA_60();
-		break;
-#endif
-	}
-}
-
-void _ICPA()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		ICPA_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		ICPA_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		ICPA_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		ICPA_60();
-		break;
-#endif
-	}
-}
-
-void _DCIA()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		DCIA_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		DCIA_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		DCIA_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCIA_60();
-		break;
-#endif
-	}
-}
-
-void _DCIS()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		DCIS_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		DCIS_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		DCIS_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCIS_60();
-		break;
-#endif
-	}
-}
-
-void _DCIU()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		DCIU_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		DCIU_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		DCIU_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCIU_60();
-		break;
-#endif
-	}
-}
-
-void _PCIA()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		PCIA_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		PCIA_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		PCIA_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		PCIA_60();
-		break;
-#endif
-	}
-}
-
-void _DCFA()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		DCFA_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		DCFA_30();
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		DCFA_40();
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCFA_60();
-		break;
-#endif
-	}
-}
-
-void _TBIS(va)
-	vaddr_t	va;
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		TBIS_20(va);
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		TBIS_30(va);
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		TBIS_40(va);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		TBIS_60(va);
-		break;
-#endif
-	}
-}
-
-void _DCIAS(pa)
-	paddr_t	pa;
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		DCIAS_20(pa);
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		DCIAS_30(pa);
-		break;
-#endif
-#ifdef M68040
-	case CPU_68040:
-		DCIAS_40(pa);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCIAS_60(pa);
-		break;
-#endif
-	}
-}
-
-void _DCPA()
-{
-	switch (cputype) {
-	default:
-#ifdef M68020
-	case CPU_68020:
-		DCPA_20();
-		break;
-#endif
-#ifdef M68030
-	case CPU_68030:
-		DCPA_30();
-		break;
-#endif
-	}
-}
-
-void _ICPL(pa)
-	paddr_t	pa;
-{
-	switch (cputype) {
-	default:
-#ifdef M68040
-	case CPU_68040:
-		ICPL_40(pa);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		ICPL_60(pa);
-		break;
-#endif
-	}
-}
-
-void _ICPP(pa)
-	paddr_t	pa;
-{
-	switch (cputype) {
-	default:
-#ifdef M68040
-	case CPU_68040:
-		ICPP_40(pa);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		ICPP_60(pa);
-		break;
-#endif
-	}
-}
-
-void _DCPL(pa)
-	paddr_t	pa;
-{
-	switch (cputype) {
-	default:
-#ifdef M68040
-	case CPU_68040:
-		DCPL_40(pa);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCPL_60(pa);
-		break;
-#endif
-	}
-}
-
-void _DCPP(pa)
-	paddr_t	pa;
-{
-	switch (cputype) {
-	default:
-#ifdef M68040
-	case CPU_68040:
-		DCPP_40(pa);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCPP_60(pa);
-		break;
-#endif
-	}
-}
-
-void _DCFL(pa)
-	paddr_t	pa;
-{
-	switch (cputype) {
-	default:
-#ifdef M68040
-	case CPU_68040:
-		DCFL_40(pa);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCFL_60(pa);
-		break;
-#endif
-	}
-}
-
-void _DCFP(pa)
-	paddr_t	pa;
-{
-	switch (cputype) {
-	default:
-#ifdef M68040
-	case CPU_68040:
-		DCFP_40(pa);
-		break;
-#endif
-#ifdef M68060
-	case CPU_68060:
-		DCFP_60(pa);
-		break;
-#endif
-	}
-}
-
-#endif /* defined(_TBIA) */