Port of OpenBSD to the Zaurus, currently running on C860, soon C3000.

59 files changed, 4351 insertions, 0 deletions

diff --git a/sys/arch/zaurus/Makefile b/sys/arch/zaurus/Makefile
new file mode 100644
index 00000000000..e440330a0c0
--- /dev/null
+++ b/sys/arch/zaurus/Makefile
@@ -0,0 +1,30 @@
+/* 	$OpenBSD: Makefile,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+#	$NetBSD: Makefile,v 1.1 2001/06/12 08:32:46 chris Exp $
+
+# Makefile for zaurus tags file and boot blocks
+
+TCATS=	../zaurus/tags
+SCATS=	../zaurus/zaurus/*.[ch] ../zaurus/include/*.h \
+		../zaurus/isa/*.[ch]
+ACATS=	../zaurus/zaurus/*.S
+
+# Directories in which to place tags links
+DCATS=	isa include
+
+.include "../../kern/Make.tags.inc"
+
+tags:
+	-ctags -wdtf ${TCATS} ${SCATS} ${COMM}
+	egrep "^ENTRY(.*)|^ALTENTRY(.*)" ${ACATS} | \
+	    sed "s;\([^:]*\):\([^(]*\)(\([^, )]*\)\(.*\);\3 \1 /^\2(\3\4$$/;" \
+	    >> ${TCATS}
+	sort -o ${TCATS} ${TCATS}
+
+links:
+	-for i in ${DCATS}; do \
+	    cd $$i && rm -f tags; ln -s ../tags tags; done
+
+
+SUBDIR=
+
+.include <bsd.subdir.mk>
diff --git a/sys/arch/zaurus/compile/.cvsignore b/sys/arch/zaurus/compile/.cvsignore
new file mode 100644
index 00000000000..b72af3039e6
--- /dev/null
+++ b/sys/arch/zaurus/compile/.cvsignore
@@ -0,0 +1,2 @@
+GENERIC
+RAMDISK
diff --git a/sys/arch/zaurus/conf/GENERIC b/sys/arch/zaurus/conf/GENERIC
new file mode 100644
index 00000000000..44a7d6d63b7
--- /dev/null
+++ b/sys/arch/zaurus/conf/GENERIC
@@ -0,0 +1,113 @@
+#	$OpenBSD: GENERIC,v 1.1 2004/12/31 00:04:35 drahn Exp $
+#
+# GENERIC machine description file
+#
+# This machine description file is used to generate the default OpenBSD
+# kernel.  The generic kernel does not include all options, subsystems
+# and device drivers, but should be useful for most applications.
+#
+# The machine description file can be customised for your specific
+# machine to reduce the kernel size and improve its performance.
+#
+# For further information on compiling OpenBSD kernels, see the config(8)
+# man page.
+#
+# For further information on hardware support for this architecture, see
+# the intro(4) man page.  For further information about kernel options
+# for this architecture, see the options(4) man page.  For an explanation
+# of each device driver in this file see the section 4 man page for the
+# device.
+
+machine	zaurus	arm
+
+include "../../../conf/GENERIC"
+
+options		ARM32
+#options 	ARM_INTR_IMPL="<arch/arm/xscale/pxa2x0_intr.h>"
+options		PXA2x0_INTR
+options 	COTULLA
+options 	LUBBOCK
+options		PXAGPIO_HAS_GPION_INTRS
+
+options		CACHE_CLEAN_BLOCK_INTR
+
+makeoptions	KERNEL_BASE_PHYS="0xa0200000"
+makeoptions	KERNEL_BASE_VIRT="0xc0200000"
+makeoptions	BOARDTYPE="zaurus"
+
+# estimated number of users
+
+maxusers	32
+
+# Standard system options
+
+#options 	UCONSOLE	# users can use TIOCCONS (for xconsole)
+#options 	INSECURE	# disable kernel securelevel
+
+#options 	RTC_OFFSET=0	# hardware clock is this many mins. west of GMT
+#options 	NTP		# NTP phase/frequency locked loop
+
+# CPU options
+options 	CPU_XSCALE_PXA2X0	# Support the XScale core
+options 	XSCALE_CACHE_WRITE_THROUGH
+#options 	XSCALE_CACHE_WRITE_BACK
+makeoptions	CPUFLAGS="-mcpu=xscale"
+
+
+# FPA options
+
+#options 	ARMFPE		# ARM Ltd FPE
+
+#option WSDISPLAY_COMPAT_USL		# VT handling
+#option WSDISPLAY_COMPAT_RAWKBD		# can get raw scancodes
+#option WSDISPLAY_DEFAULTSCREENS=6	# can get raw scancodes
+#option WSDISPLAY_COMPAT_PCVT		# can get raw scancodes
+
+#config		bsd	swap generic
+config		bsd	root on wd0a
+
+# The main bus device
+mainbus0	at root
+cpu0		at mainbus?
+pxaip0		at mainbus?
+
+pxaintc0	at pxaip?	# interrupt controller
+pxagpio0	at pxaip?	# GPIO
+saost0		at pxaip? addr 0x40a00000 size 0x20
+
+# cotulla integrated 16550 UARTs
+options COM_PXA2X0
+com0	at pxaip?  addr 0x40100000 intr 22      # Full Function UART
+com1	at pxaip?  addr 0x40200000 intr 21 	# BlueTootth UART
+#com2	at pxaip?  addr 0x40700000 intr 20	# Standard UART (for IrDA)
+options FFUARTCONSOLE
+#options BTUARTCONSOLE
+options KGDB_DEVNAME="\"btuart\""   # ffuart or btuart
+options KGDB_DEVRATE=115200
+
+#aupxa0	at pxaip?		# AC97 interface
+
+# CF (pcmcia) support
+pxapcic0	at pxaip?
+pcmcia*		at pxapcic?
+wi*		at pcmcia?
+wdc*		at pcmcia?
+
+# IDE hard drives
+wd0	at wdc? flags 0x0000
+wd*	at wdc? flags 0x0000
+
+
+# On-board device support
+obio0		at pxaip? intr 8
+#sm0		at obio? addr 0x0c000000 intr 3 	# on-board SMC 91C96
+#options LUBBOCK_SMC91C96_16BIT
+
+# LCD
+lcd0		at obio?
+wsdisplay*	at lcd? console ?
+options 	WSEMUL_VT100		# VT100 / VT220 emulation
+
+# Pseudo-Devices
+#pseudo-device	wsmux		2	# mouse & keyboard multiplexor
+pseudo-device	crypto		1
diff --git a/sys/arch/zaurus/conf/Makefile.zaurus b/sys/arch/zaurus/conf/Makefile.zaurus
new file mode 100644
index 00000000000..0f56943df22
--- /dev/null
+++ b/sys/arch/zaurus/conf/Makefile.zaurus
@@ -0,0 +1,223 @@
+#	$OpenBSD: Makefile.zaurus,v 1.1 2004/12/31 00:04:35 drahn Exp $
+#	$OpenBSD: Makefile.zaurus,v 1.1 2004/12/31 00:04:35 drahn Exp $
+#	$NetBSD: Makefile.i386,v 1.67 1996/05/11 16:12:11 mycroft Exp $
+
+# Makefile for OpenBSD
+#
+# This makefile is constructed from a machine description:
+#	config machineid
+# Most changes should be made in the machine description
+#	/sys/arch/zaurus/conf/``machineid''
+# after which you should do
+#	config machineid
+# Machine generic makefile changes should be made in
+#	/sys/arch/zaurus/conf/Makefile.zaurus
+# after which config should be rerun for all machines of that type.
+#
+# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
+#	IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
+#
+# -DTRACE	compile in kernel tracing hooks
+# -DQUOTA	compile in file system quotas
+
+# DEBUG is set to -g if debugging.
+# PROF is set to -pg if profiling.
+
+.include <bsd.own.mk>
+
+MKDEP?=	mkdep
+SIZE?=	size
+STRIP?=	strip
+
+# source tree is located via $S relative to the compilation directory
+.ifndef S
+S!=	cd ../../../..; pwd
+.endif
+THISARM=	$S/arch/zaurus
+ARM=	$S/arch/arm
+
+INCLUDES=	-nostdinc -I. -I$S/arch -I$S
+CPPFLAGS=	${INCLUDES} ${IDENT} -D_KERNEL -D__zaurus__
+CDIAGFLAGS=	-Werror -Wall -Wstrict-prototypes -Wmissing-prototypes \
+		-Wno-uninitialized -Wno-format -Wno-main
+
+CMACHFLAGS= -ffreestanding
+#CMACHFLAGS=	-march=armv4 -mtune=strongarm -ffreestanding
+.if ${IDENT:M-DNO_PROPOLICE}
+CMACHFLAGS+=	-fno-stack-protector
+.endif
+CMACHFLAGS+=	-msoft-float -fno-builtin-printf -fno-builtin-log
+
+COPTS?=		-O2
+CFLAGS=		${DEBUG} ${CDIAGFLAGS} ${CMACHFLAGS} ${COPTS} ${PIPE}
+AFLAGS=		-x assembler-with-cpp -D_LOCORE ${CMACHFLAGS} 
+#LINKFLAGS=	-Ttext 0xF0000020 -e start --warn-common
+#LINKFLAGS=	-T ${THISARM}/conf/kern.ldscript
+LINKFLAGS=	-T ldscript
+LINKFLAGS+=	--warn-common
+STRIPFLAGS=	-g -X -x
+
+HOSTCC= ${CC}
+HOSTED_CPPFLAGS=${CPPFLAGS:S/^-nostdinc$//}
+HOSTED_CFLAGS=	${CFLAGS}
+
+### find out what to use for libkern
+.include "$S/lib/libkern/Makefile.inc"
+.ifndef PROF
+LIBKERN=	${KERNLIB}
+.else
+LIBKERN=	${KERNLIB_PROF}
+.endif
+
+### find out what to use for libcompat
+.include "$S/compat/common/Makefile.inc"
+.ifndef PROF
+LIBCOMPAT=	${COMPATLIB}
+.else
+LIBCOMPAT=	${COMPATLIB_PROF}
+.endif
+
+# compile rules: rules are named ${TYPE}_${SUFFIX}${CONFIG_DEP}
+# where TYPE is NORMAL, DRIVER, or PROFILE; SUFFIX is the file suffix,
+# capitalized (e.g. C for a .c file), and CONFIG_DEP is _C if the file
+# is marked as config-dependent.
+
+NORMAL_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+NORMAL_C_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $<
+
+DRIVER_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+DRIVER_C_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $<
+
+NORMAL_S=	${CC} ${AFLAGS} ${CPPFLAGS} -c $<
+NORMAL_S_C=	${CC} ${AFLAGS} ${CPPFLAGS} ${PARAM} -c $<
+
+HOSTED_C=	${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $<
+
+%OBJS
+
+%CFILES
+
+%SFILES
+
+# load lines for config "xxx" will be emitted as:
+# xxx: ${SYSTEM_DEP} swapxxx.o
+#	${SYSTEM_LD_HEAD}
+#	${SYSTEM_LD} swapxxx.o
+#	${SYSTEM_LD_TAIL}
+SYSTEM_OBJ=	${BOARDTYPE}_start.o locore.o \
+		param.o ioconf.o ${OBJS} ${LIBKERN} ${LIBCOMPAT}
+SYSTEM_DEP=	Makefile ${SYSTEM_OBJ}
+SYSTEM_LD_HEAD=	rm -f $@
+SYSTEM_LD_HEAD+=; \
+    ( cat ${ARM}/conf/ldscript.head ;\
+    cat ${ARM}/conf/ldscript.tail ) |  \
+	sed -e 's/@KERNEL_BASE_PHYS@/${KERNEL_BASE_PHYS}/' \
+	-e 's/@KERNEL_BASE_VIRT@/${KERNEL_BASE_VIRT}/' \
+     > ldscript
+
+SYSTEM_LD=	@echo ${LD} ${LINKFLAGS} -o $@ '$${SYSTEM_OBJ}' vers.o; \
+		${LD} ${LINKFLAGS} -o $@ ${SYSTEM_OBJ} vers.o
+SYSTEM_LD_TAIL=	@${SIZE} $@; chmod 755 $@
+
+DEBUG?=
+.if ${DEBUG} == "-g"
+LINKFLAGS+=	-X
+SYSTEM_LD_TAIL+=; \
+		echo cp $@ $@.gdb; rm -f $@.gdb; cp $@ $@.gdb; \
+		echo ${STRIP} ${STRIPFLAGS} $@; ${STRIP} ${STRIPFLAGS} $@
+.else
+LINKFLAGS+=	-x
+.endif
+
+%LOAD
+
+assym.h: $S/kern/genassym.sh ${ARM}/arm/genassym.cf Makefile
+	cat ${ARM}/arm/genassym.cf | \
+	    sh $S/kern/genassym.sh ${CC} ${CFLAGS} \
+	    ${CPPFLAGS} ${PARAM} > assym.h.tmp && \
+	    mv -f assym.h.tmp assym.h
+
+param.c: $S/conf/param.c
+	rm -f param.c
+	cp $S/conf/param.c .
+
+param.o: param.c Makefile
+	${NORMAL_C_C}
+
+ioconf.o: ioconf.c
+	${NORMAL_C}
+
+newvers: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP}
+	sh $S/conf/newvers.sh
+	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c
+
+
+clean::
+	rm -f eddep *bsd bsd.gdb tags *.[io] [a-z]*.s \
+	    [Ee]rrs linterrs makelinks assym.h
+
+lint:
+	@lint -hbxncez -Dvolatile= ${CPPFLAGS} ${PARAM} -UKGDB \
+	    ${CFILES} ioconf.c param.c | \
+	    grep -v 'static function .* unused'
+
+tags:
+	@echo "see $S/kern/Makefile for tags"
+
+links:
+	egrep '#if' ${CFILES} | sed -f $S/conf/defines | \
+	  sed -e 's/:.*//' -e 's/\.c/.o/' | sort -u > dontlink
+	echo ${CFILES} | tr -s ' ' '\12' | sed 's/\.c/.o/' | \
+	  sort -u | comm -23 - dontlink | \
+	  sed 's,.*/\(.*.o\),rm -f \1; ln -s ../GENERIC/\1 \1,' > makelinks
+	sh makelinks && rm -f dontlink makelinks
+
+SRCS=	${ARM}/arm/locore.S ${ARM}/arm/locore.S \
+	param.c ioconf.c ${CFILES} ${SFILES}
+depend:: .depend
+.depend: ${SRCS} assym.h param.c ${APMINC}
+	${MKDEP} ${AFLAGS} ${CPPFLAGS} ${ARM}/arm/locore.S
+	${MKDEP} -a ${CFLAGS} ${CPPFLAGS} param.c ioconf.c ${CFILES}
+	${MKDEP} -a ${AFLAGS} ${CPPFLAGS} ${SFILES}
+	cat ${ARM}/arm/genassym.cf ${ARM}/footbridge/genassym.cf | \
+	    sh $S/kern/genassym.sh ${MKDEP} -f assym.dep ${CFLAGS} \
+	    ${CPPFLAGS} 
+	@sed -e 's/.*\.o:.* /assym.h: /' < assym.dep >> .depend
+	@rm -f assym.dep
+
+
+# depend on root or device configuration
+autoconf.o conf.o: Makefile
+ 
+# depend on network or filesystem configuration 
+uipc_domain.o uipc_proto.o vfs_conf.o: Makefile 
+if.o if_tun.o if_loop.o if_ethersubr.o: Makefile
+if_arp.o if_ether.o: Makefile
+ip_input.o ip_output.o in_pcb.o in_proto.o: Makefile
+tcp_subr.o tcp_timer.o tcp_output.o: Makefile
+
+# depend on maxusers
+machdep.o: Makefile
+
+# depend on CPU configuration 
+locore.o machdep.o: Makefile
+
+${BOARDTYPE}_start.o: ${THISARM}/zaurus/${BOARDTYPE}_start.S assym.h
+	${NORMAL_S}
+
+locore.o: ${ARM}/arm/locore.S assym.h
+	${NORMAL_S}
+
+# The install target can be redefined by putting a
+# install-kernel-${MACHINE_NAME} target into /etc/mk.conf
+MACHINE_NAME!=  uname -n
+install: install-kernel-${MACHINE_NAME}
+.if !target(install-kernel-${MACHINE_NAME}})
+install-kernel-${MACHINE_NAME}:
+	rm -f /obsd
+	ln /bsd /obsd
+	cp bsd /nbsd
+	mv /nbsd /bsd
+.endif
+
+%RULES
diff --git a/sys/arch/zaurus/conf/RAMDISK b/sys/arch/zaurus/conf/RAMDISK
new file mode 100644
index 00000000000..1addfc790ca
--- /dev/null
+++ b/sys/arch/zaurus/conf/RAMDISK
@@ -0,0 +1,141 @@
+#	$OpenBSD: RAMDISK,v 1.1 2004/12/31 00:04:35 drahn Exp $
+# $NetBSD: GENERIC,v 1.27.4.1 2002/08/01 04:18:06 lukem Exp $
+#
+# GENERIC machine description file
+#
+# This machine description file is used to generate the default OpenBSD
+# kernel.  The generic kernel does not include all options, subsystems
+# and device drivers, but should be useful for most applications.
+#
+# The machine description file can be customised for your specific
+# machine to reduce the kernel size and improve its performance.
+#
+# For further information on compiling OpenBSD kernels, see the config(8)
+# man page.
+#
+# For further information on hardware support for this architecture, see
+# the intro(4) man page.  For further information about kernel options
+# for this architecture, see the options(4) man page.  For an explanation
+# of each device driver in this file see the section 4 man page for the
+# device.
+
+machine	zaurus	arm
+
+# include "../../../conf/GENERIC"
+option		TIMEZONE=0	# time zone to adjust RTC time by
+option		DST=0		# daylight saving time used by RTC
+option		COMPAT_43	# and 4.3BSD
+option		FFS		# UFS
+#option		NFSCLIENT	# Network File System client
+option		CD9660		# ISO 9660 + Rock Ridge file system
+option		MSDOSFS		# MS-DOS file system
+option		INET		# IP + ICMP + TCP + UDP
+option		INET6		# IPv6 (needs INET)
+option		DDB		# kernel debugger
+option		EXT2FS		# Second Extended Filesystem
+option          FIFO            # FIFOs; RECOMMENDED
+
+options		ARM32
+#options 	ARM_INTR_IMPL="<arch/arm/xscale/pxa2x0_intr.h>"
+options		PXA2x0_INTR
+options 	COTULLA
+options 	LUBBOCK
+options		PXAGPIO_HAS_GPION_INTRS
+
+options		CACHE_CLEAN_BLOCK_INTR
+
+makeoptions	KERNEL_BASE_PHYS="0xa0200000"
+makeoptions	KERNEL_BASE_VIRT="0xc0200000"
+makeoptions	BOARDTYPE="zaurus"
+
+# estimated number of users
+
+maxusers	32
+
+# Standard system options
+
+#options 	UCONSOLE	# users can use TIOCCONS (for xconsole)
+#options 	INSECURE	# disable kernel securelevel
+
+#options 	RTC_OFFSET=0	# hardware clock is this many mins. west of GMT
+#options 	NTP		# NTP phase/frequency locked loop
+
+# CPU options
+
+# For StrongARM systems
+# CPU options
+options 	CPU_XSCALE_PXA2X0	# Support the XScale core
+options 	XSCALE_CACHE_WRITE_THROUGH
+#options 	XSCALE_CACHE_WRITE_BACK
+makeoptions	CPUFLAGS="-mcpu=xscale"
+
+options SYSCALL_DEBUG
+
+# FPA options
+
+#options 	ARMFPE		# ARM Ltd FPE
+
+#option WSDISPLAY_COMPAT_USL		# VT handling
+#option WSDISPLAY_COMPAT_RAWKBD		# can get raw scancodes
+#option WSDISPLAY_DEFAULTSCREENS=6	# can get raw scancodes
+#option WSDISPLAY_COMPAT_PCVT		# can get raw scancodes
+
+#config		bsd	swap generic
+config		bsd	root on rd0a swap on rd0b
+
+# The main bus device
+mainbus0	at root
+cpu0		at mainbus?
+pxaip0		at mainbus?
+
+pxaintc0	at pxaip?	# interrupt controller
+pxagpio0	at pxaip?	# GPIO
+saost0		at pxaip? addr 0x40a00000 size 0x20
+
+# cotulla integrated 16550 UARTs
+options COM_PXA2X0
+com0	at pxaip?  addr 0x40100000 intr 22      # Full Function UART
+com1	at pxaip?  addr 0x40200000 intr 21 	# BlueTootth UART
+#com2	at pxaip?  addr 0x40700000 intr 20	# Standard UART (for IrDA)
+options FFUARTCONSOLE
+#options BTUARTCONSOLE
+options KGDB_DEVNAME="\"btuart\""   # ffuart or btuart
+options KGDB_DEVRATE=115200
+
+#aupxa0	at pxaip?		# AC97 interface
+
+
+# pcic
+pxapcic0	at pxaip?
+pcmcia*		at pxapcic?
+wi*		at pcmcia?
+wdc*		at pcmcia?
+
+# IDE hard drives
+wd*	at wdc? flags 0x0000
+
+# On-board device support
+obio0		at pxaip? intr 8
+#sm0		at obio? addr 0x0c000000 intr 3 	# on-board SMC 91C96
+#options LUBBOCK_SMC91C96_16BIT
+
+# LCD
+lcd0		at obio?
+wsdisplay*	at lcd? console ?
+options 	WSEMUL_VT100		# VT100 / VT220 emulation
+
+
+# Pseudo-Devices
+#pseudo-device	wsmux		2	# mouse & keyboard multiplexor
+#pseudo-device	crypto		1
+pseudo-device	loop		1	# network loopback
+pseudo-device	bpfilter	1	# packet filter
+pseudo-device	rd		1	# ram disk
+
+option		BOOT_CONFIG	# boot-time kernel config
+
+# RAMDISK stuff
+#option		MINIROOTSIZE=8192
+option		MINIROOTSIZE=5120
+option		RAMDISK_HOOKS
+
diff --git a/sys/arch/zaurus/conf/files.zaurus b/sys/arch/zaurus/conf/files.zaurus
new file mode 100644
index 00000000000..d7bb17ff9f7
--- /dev/null
+++ b/sys/arch/zaurus/conf/files.zaurus
@@ -0,0 +1,81 @@
+#	$NetBSD: files.pxaarm,v 1.17 2003/02/17 20:51:53 ichiro Exp $
+#
+# First try for arm-specific configuration info
+#
+
+maxpartitions	8
+maxusers	2 8 64
+
+include "../../../scsi/files.scsi"
+include "../../../dev/atapiscsi/files.atapiscsi"
+major	{wd = 16}
+major	{sd = 24}
+major	{cd = 26}
+major	{rd = 18}
+
+file	arch/arm/arm/conf.c
+
+file	arch/zaurus/zaurus/zaurus_machdep.c
+
+# CPU support and integrated peripherals
+include "arch/arm/xscale/files.pxa2x0"
+
+# LUBBOCK on-board devices (including CPLD)
+device	obio {[addr = -1], [size = -1], [width = -1], [intr = -1]}: bus_space_generic
+attach	obio at pxaip
+file	arch/zaurus/zaurus/obio.c			obio
+
+#device	sacpcic: pcmciabus
+#attach	sacpcic at sacc
+#file	arch/arm/sa11x0/sa11x1_pcic.c			sacpcic needs-flag
+#file	arch/arm/sa11x0/sa11xx_pcic.c			sacpcic
+#file	arch/zaurus/zaurus/zaurus_pcic.c		sacpcic
+
+
+# LCD frame buffer
+attach lcd at obio with lcd_obio
+file arch/zaurus/zaurus/zaurus_lcd.c			lcd_obio
+
+#
+# Machine-independent ATA drivers
+#
+include "dev/ata/files.ata"
+
+#
+# Machine-independent SCSI drivers
+#
+
+
+# Generic MD files
+file	arch/zaurus/zaurus/autoconf.c
+
+file	arch/arm/arm/disksubr.c			disk
+
+# ARM FPE
+file	arch/arm/fpe-arm/armfpe_glue.S	armfpe
+file	arch/arm/fpe-arm/armfpe_init.c	armfpe
+file	arch/arm/fpe-arm/armfpe.s		armfpe
+
+# Machine-independent I2O drivers.
+include "dev/i2o/files.i2o"
+
+#
+# Include PCI config
+#
+include "dev/mii/files.mii"
+include "dev/pci/files.pci"
+
+device	pcib: isabus
+attach	pcib at pci
+file	arch/zaurus/pci/pcib.c			pcib
+
+file	arch/zaurus/pci/pciide_machdep.c	pciide
+
+# Include USB stuff
+include "dev/usb/files.usb"
+
+# Include WSCONS stuff
+include "dev/wscons/files.wscons"
+include "dev/rasops/files.rasops"
+include "dev/wsfont/files.wsfont"
+include "dev/pckbc/files.pckbc"
diff --git a/sys/arch/zaurus/include/ansi.h b/sys/arch/zaurus/include/ansi.h
new file mode 100644
index 00000000000..e36aebf137b
--- /dev/null
+++ b/sys/arch/zaurus/include/ansi.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: ansi.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: ansi.h,v 1.3 2001/11/25 15:55:54 thorpej Exp $	*/
+
+#include <arm/ansi.h>
diff --git a/sys/arch/zaurus/include/asm.h b/sys/arch/zaurus/include/asm.h
new file mode 100644
index 00000000000..f903110011e
--- /dev/null
+++ b/sys/arch/zaurus/include/asm.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: asm.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: asm.h,v 1.3 2001/11/25 15:55:54 thorpej Exp $	*/
+
+#include <arm/asm.h>
diff --git a/sys/arch/zaurus/include/atomic.h b/sys/arch/zaurus/include/atomic.h
new file mode 100644
index 00000000000..afa16a53ab9
--- /dev/null
+++ b/sys/arch/zaurus/include/atomic.h
@@ -0,0 +1,2 @@
+/* 	$OpenBSD: atomic.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+#include <arm/atomic.h>
diff --git a/sys/arch/zaurus/include/bootconfig.h b/sys/arch/zaurus/include/bootconfig.h
new file mode 100644
index 00000000000..559ab2d491d
--- /dev/null
+++ b/sys/arch/zaurus/include/bootconfig.h
@@ -0,0 +1,76 @@
+/*	$OpenBSD: bootconfig.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: bootconfig.h,v 1.2 2001/06/21 22:08:28 chris Exp $	*/
+
+/*
+ * Copyright (c) 1994 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * This code is derived from software written for Brini by Mark Brinicombe
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ *	for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * boot configuration structures
+ *
+ * Created      : 12/09/94
+ *
+ * Based on kate/boot/bootconfig.h
+ */
+
+typedef struct _PhysMem {
+	u_int address;
+	u_int pages;
+} PhysMem;
+
+#if defined(_KERNEL)
+
+#define	DRAM_BLOCKS	1
+
+typedef struct _BootConfig {
+	PhysMem dram[DRAM_BLOCKS];
+	u_int dramblocks;
+} BootConfig;
+
+extern BootConfig bootconfig;
+#define MAX_BOOT_STRING 255
+
+#define BOOTOPT_TYPE_BOOLEAN		0
+#define BOOTOPT_TYPE_STRING		1
+#define BOOTOPT_TYPE_INT		2
+#define BOOTOPT_TYPE_BININT		3
+#define BOOTOPT_TYPE_HEXINT		4
+#define BOOTOPT_TYPE_MASK		7
+
+int get_bootconf_option (char *string, char *option, int type, void *result);
+
+extern char *boot_args;
+extern char *boot_file;
+#endif	/* _KERNEL */
+
+/* End of bootconfig.h */
diff --git a/sys/arch/zaurus/include/bus.h b/sys/arch/zaurus/include/bus.h
new file mode 100644
index 00000000000..9f40a4cfa47
--- /dev/null
+++ b/sys/arch/zaurus/include/bus.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: bus.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: bus.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $	*/
+
+#include <arm/bus.h>
diff --git a/sys/arch/zaurus/include/cdefs.h b/sys/arch/zaurus/include/cdefs.h
new file mode 100644
index 00000000000..32afc645781
--- /dev/null
+++ b/sys/arch/zaurus/include/cdefs.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: cdefs.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: cdefs.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $	*/
+
+#include <arm/cdefs.h>
diff --git a/sys/arch/zaurus/include/conf.h b/sys/arch/zaurus/include/conf.h
new file mode 100644
index 00000000000..267b621bfe7
--- /dev/null
+++ b/sys/arch/zaurus/include/conf.h
@@ -0,0 +1,19 @@
+/*	$OpenBSD: conf.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: conf.h,v 1.8 2002/02/10 12:26:03 chris Exp $	*/
+
+#ifndef _CATS_CONF_H
+#define	_CATS_CONF_H
+
+/*
+ * CATS specific device includes go in here
+ */
+#include "fcom.h"
+
+#define	CONF_HAVE_PCI
+#define	CONF_HAVE_USB
+#define	CONF_HAVE_SCSIPI
+#define	CONF_HAVE_WSCONS
+
+#include <arm/conf.h>
+
+#endif	/* _CATS_CONF_H */
diff --git a/sys/arch/zaurus/include/cpu.h b/sys/arch/zaurus/include/cpu.h
new file mode 100644
index 00000000000..b5b491a79f7
--- /dev/null
+++ b/sys/arch/zaurus/include/cpu.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: cpu.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: cpu.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $	*/
+
+#include <arm/cpu.h>
diff --git a/sys/arch/zaurus/include/db_machdep.h b/sys/arch/zaurus/include/db_machdep.h
new file mode 100644
index 00000000000..45324563408
--- /dev/null
+++ b/sys/arch/zaurus/include/db_machdep.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: db_machdep.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: db_machdep.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $	*/
+
+#include <arm/db_machdep.h>
diff --git a/sys/arch/zaurus/include/disklabel.h b/sys/arch/zaurus/include/disklabel.h
new file mode 100644
index 00000000000..7e63a238746
--- /dev/null
+++ b/sys/arch/zaurus/include/disklabel.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: disklabel.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: disklabel.h,v 1.3 2001/11/25 15:55:55 thorpej Exp $	*/
+
+#include <arm/disklabel.h>
diff --git a/sys/arch/zaurus/include/elf_abi.h b/sys/arch/zaurus/include/elf_abi.h
new file mode 100644
index 00000000000..3104811209b
--- /dev/null
+++ b/sys/arch/zaurus/include/elf_abi.h
@@ -0,0 +1,3 @@
+/*	$OpenBSD: elf_abi.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+
+#include <arm/elf_abi.h>
diff --git a/sys/arch/zaurus/include/endian.h b/sys/arch/zaurus/include/endian.h
new file mode 100644
index 00000000000..81a63fd780c
--- /dev/null
+++ b/sys/arch/zaurus/include/endian.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: endian.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: endian.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $	*/
+
+#include <arm/endian.h>
diff --git a/sys/arch/zaurus/include/exec.h b/sys/arch/zaurus/include/exec.h
new file mode 100644
index 00000000000..b20dfdbaaf7
--- /dev/null
+++ b/sys/arch/zaurus/include/exec.h
@@ -0,0 +1,48 @@
+/*	$OpenBSD: exec.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: exec.h,v 1.6 1994/10/27 04:16:05 cgd Exp $	*/
+
+/*
+ * Copyright (c) 1993 Christopher G. Demetriou
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _I386_EXEC_H_
+#define _I386_EXEC_H_
+
+#define __LDPGSZ	4096
+
+#define NATIVE_EXEC_ELF
+
+#define ARCH_ELFSIZE		32
+
+#define ELF_TARG_CLASS		ELFCLASS32
+#define ELF_TARG_DATA		ELFDATA2LSB
+#define ELF_TARG_MACH		EM_ARM 
+
+#define _NLIST_DO_ELF
+
+#define _KERN_DO_ELF
+
+#endif  /* _I386_EXEC_H_ */
diff --git a/sys/arch/zaurus/include/float.h b/sys/arch/zaurus/include/float.h
new file mode 100644
index 00000000000..1b6ce4f7b2b
--- /dev/null
+++ b/sys/arch/zaurus/include/float.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: float.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: float.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $	*/
+
+#include <arm/float.h>
diff --git a/sys/arch/zaurus/include/fp.h b/sys/arch/zaurus/include/fp.h
new file mode 100644
index 00000000000..2a8d6cc460c
--- /dev/null
+++ b/sys/arch/zaurus/include/fp.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: fp.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: fp.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $	*/
+
+#include <arm/fp.h>
diff --git a/sys/arch/zaurus/include/frame.h b/sys/arch/zaurus/include/frame.h
new file mode 100644
index 00000000000..d96c1961dda
--- /dev/null
+++ b/sys/arch/zaurus/include/frame.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: frame.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/* $NetBSD: frame.h,v 1.1 2001/06/08 22:23:00 chris Exp $ */
+
+#include <arm/frame.h>
diff --git a/sys/arch/zaurus/include/ieee.h b/sys/arch/zaurus/include/ieee.h
new file mode 100644
index 00000000000..ed711e4e217
--- /dev/null
+++ b/sys/arch/zaurus/include/ieee.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: ieee.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: ieee.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $	*/
+
+#include <arm/ieee.h>
diff --git a/sys/arch/zaurus/include/ieeefp.h b/sys/arch/zaurus/include/ieeefp.h
new file mode 100644
index 00000000000..3b0165dc66a
--- /dev/null
+++ b/sys/arch/zaurus/include/ieeefp.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: ieeefp.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: ieeefp.h,v 1.3 2001/11/25 15:55:56 thorpej Exp $	*/
+
+#include <arm/ieeefp.h>
diff --git a/sys/arch/zaurus/include/internal_types.h b/sys/arch/zaurus/include/internal_types.h
new file mode 100644
index 00000000000..03f5d7caf10
--- /dev/null
+++ b/sys/arch/zaurus/include/internal_types.h
@@ -0,0 +1,7 @@
+/* $OpenBSD: internal_types.h,v 1.1 2004/12/31 00:04:35 drahn Exp $ */
+/* Public domain */
+#ifndef _MACHINE_INTERNAL_TYPES_H_
+#define _MACHINE_INTERNAL_TYPES_H_
+
+#include "arm/internal_types.h"
+#endif
diff --git a/sys/arch/zaurus/include/intr.h b/sys/arch/zaurus/include/intr.h
new file mode 100644
index 00000000000..75291e36ade
--- /dev/null
+++ b/sys/arch/zaurus/include/intr.h
@@ -0,0 +1,159 @@
+
+/*	$NetBSD: intr.h,v 1.12 2003/06/16 20:00:59 thorpej Exp $	*/
+
+/*
+ * Copyright (c) 2001, 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef	_EVBARM_INTR_H_
+#define	_EVBARM_INTR_H_
+
+#ifdef _KERNEL
+
+
+/* Interrupt priority "levels". */
+#define	IPL_NONE	0	/* nothing */
+#define	IPL_SOFT	1	/* generic software interrupts */
+#define	IPL_SOFTCLOCK	2	/* software clock interrupt */
+#define	IPL_SOFTNET	3	/* software network interrupt */
+#define	IPL_BIO		4	/* block I/O */
+#define	IPL_NET		5	/* network */
+#define	IPL_SOFTSERIAL	6	/* software serial interrupt */
+#define	IPL_TTY		7	/* terminals */
+#define	IPL_VM		8	/* memory allocation */
+#define	IPL_AUDIO	9	/* audio device */
+#define	IPL_CLOCK	10	/* clock interrupt */
+#define	IPL_STATCLOCK	11	/* statistics clock interrupt */
+#define	IPL_HIGH	12	/* everything */
+#define	IPL_SERIAL	13	/* serial device */
+
+#define	NIPL		14
+
+/* Interrupt sharing types. */
+#define	IST_NONE	0	/* none */
+#define	IST_PULSE	1	/* pulsed */
+#define	IST_EDGE	2	/* edge-triggered */
+#define	IST_LEVEL	3	/* level-triggered */
+
+#define IST_LEVEL_LOW	 IST_LEVEL
+#define IST_LEVEL_HIGH   4
+#define IST_EDGE_FALLING IST_EDGE
+#define IST_EDGE_RISING  5
+#define IST_EDGE_BOTH    6
+
+
+#define	__NEWINTR	/* enables new hooks in cpu_fork()/cpu_switch() */
+
+#ifndef _LOCORE
+
+#include <sys/device.h>
+#include <sys/queue.h>
+
+#if defined(_LKM)
+
+int	_splraise(int);
+int	_spllower(int);
+void	splx(int);
+void	_setsoftintr(int);
+
+#else	/* _LKM */
+
+/*
+ * Each board needs to define the following functions:
+ *
+ * int	_splraise(int);
+ * int	_spllower(int);
+ * void	splx(int);
+ * void	_setsoftintr(int);
+ *
+ * These may be defined as functions, static __inline functions, or macros,
+ * but there must be a _spllower() and splx() defined as functions callable
+ * from assembly language (for cpu_switch()).  However, since it's quite
+ * useful to be able to inline splx(), you could do something like the
+ * following:
+ *
+ * in <boardtype>_intr.h:
+ * 	static __inline int
+ *	boardtype_splx(int spl)
+ *	{...}
+ *
+ *	#define splx(nspl)	boardtype_splx(nspl)
+ *	...
+ * and in boardtype's machdep code:
+ *
+ *	...
+ *	#undef splx
+ *	int
+ *	splx(int spl)
+ *	{
+ *		return boardtype_splx(spl);
+ *	}
+ */
+
+/* XXX */
+#include <arm/xscale/pxa2x0_intr.h>
+
+#endif /* _LKM */
+
+#define	splhigh()	_splraise(IPL_HIGH)
+#define	splsoft()	_splraise(IPL_SOFT)
+#define	splsoftclock()	_splraise(IPL_SOFTCLOCK)
+#define	splsoftnet()	_splraise(IPL_SOFTNET)
+#define	splbio()	_splraise(IPL_BIO)
+#define	splnet()	_splraise(IPL_NET)
+#define	spltty()	_splraise(IPL_TTY)
+#define	splimp()	_splraise(IPL_VM)
+#define	splvm()		_splraise(IPL_VM)
+#define	splaudio()	_splraise(IPL_AUDIO)
+#define	splclock()	_splraise(IPL_CLOCK)
+#define	splstatclock()	_splraise(IPL_STATCLOCK)
+#define	splserial()	_splraise(IPL_SERIAL)
+
+#define	spl0()		_spllower(IPL_NONE)
+#define	spllowersoftclock() _spllower(IPL_SOFTCLOCK)
+
+#define	splsched()	splhigh()
+#define	spllock()	splhigh()
+
+/* Use generic software interrupt support. */
+#include <arm/softintr.h>
+
+#endif /* ! _LOCORE */
+
+#define splassert(wantipl) do { /* nada */ } while (0)
+
+#endif /* _KERNEL */
+
+#endif	/* _EVBARM_INTR_H_ */
+
diff --git a/sys/arch/zaurus/include/irqhandler.h b/sys/arch/zaurus/include/irqhandler.h
new file mode 100644
index 00000000000..a10bebe9e55
--- /dev/null
+++ b/sys/arch/zaurus/include/irqhandler.h
@@ -0,0 +1,4 @@
+/* 	$OpenBSD: irqhandler.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: irqhandler.h,v 1.4 2002/04/12 18:50:32 thorpej Exp $	*/
+
+#include <arm/footbridge/footbridge_irqhandler.h>
diff --git a/sys/arch/zaurus/include/isa_machdep.h b/sys/arch/zaurus/include/isa_machdep.h
new file mode 100644
index 00000000000..ed44d88af37
--- /dev/null
+++ b/sys/arch/zaurus/include/isa_machdep.h
@@ -0,0 +1,13 @@
+/* 	$OpenBSD: isa_machdep.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/* $NetBSD: isa_machdep.h,v 1.4 2002/01/07 22:58:08 chris Exp $ */
+
+#ifndef _CATS_ISA_MACHDEP_H_
+#define _CATS_ISA_MACHDEP_H_
+#include <arm/isa_machdep.h>
+
+#ifdef _KERNEL
+#define ISA_FOOTBRIDGE_IRQ IRQ_IN_L2
+void	isa_footbridge_init(u_int, u_int);
+#endif /* _KERNEL */
+
+#endif /* _CATS_ISA_MACHDEP_H_ */
diff --git a/sys/arch/zaurus/include/limits.h b/sys/arch/zaurus/include/limits.h
new file mode 100644
index 00000000000..c3a60dbab4e
--- /dev/null
+++ b/sys/arch/zaurus/include/limits.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: limits.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: limits.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $	*/
+
+#include <arm/limits.h>
diff --git a/sys/arch/zaurus/include/lock.h b/sys/arch/zaurus/include/lock.h
new file mode 100644
index 00000000000..8d51954acb2
--- /dev/null
+++ b/sys/arch/zaurus/include/lock.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: lock.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: lock.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $	*/
+
+#include <arm/lock.h>
diff --git a/sys/arch/zaurus/include/math.h b/sys/arch/zaurus/include/math.h
new file mode 100644
index 00000000000..585c4f9b181
--- /dev/null
+++ b/sys/arch/zaurus/include/math.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: math.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: math.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $	*/
+
+#include <arm/math.h>
diff --git a/sys/arch/zaurus/include/param.h b/sys/arch/zaurus/include/param.h
new file mode 100644
index 00000000000..fc088830628
--- /dev/null
+++ b/sys/arch/zaurus/include/param.h
@@ -0,0 +1,51 @@
+/*	$OpenBSD: param.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: param.h,v 1.4 2002/02/12 06:58:19 thorpej Exp $	*/
+
+/*
+ * Copyright (c) 1994,1995 Mark Brinicombe.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the RiscBSD team.
+ * 4. The name "RiscBSD" nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY RISCBSD ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL RISCBSD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef	_CATS_PARAM_H_
+#define	_CATS_PARAM_H_
+
+/*
+ * cats boot dmesg is bigger than 4k
+ */
+#ifndef MSGBUFSIZE
+#define MSGBUFSIZE	(2*NBPG)
+#endif
+
+#include <arm/param.h>
+
+#define	_MACHINE	cats
+#define	MACHINE		"cats"
+
+#endif	/* _CATS_PARAM_H_ */
diff --git a/sys/arch/zaurus/include/pcb.h b/sys/arch/zaurus/include/pcb.h
new file mode 100644
index 00000000000..63455769a68
--- /dev/null
+++ b/sys/arch/zaurus/include/pcb.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: pcb.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: pcb.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $	*/
+
+#include <arm/pcb.h>
diff --git a/sys/arch/zaurus/include/pio.h b/sys/arch/zaurus/include/pio.h
new file mode 100644
index 00000000000..e34d5fecf16
--- /dev/null
+++ b/sys/arch/zaurus/include/pio.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: pio.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/* $NetBSD: pio.h,v 1.3 2001/12/07 23:09:33 chris Exp $ */
+
+#include <arm/pio.h>
diff --git a/sys/arch/zaurus/include/pmap.h b/sys/arch/zaurus/include/pmap.h
new file mode 100644
index 00000000000..fd34a3faf73
--- /dev/null
+++ b/sys/arch/zaurus/include/pmap.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: pmap.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/* $NetBSD: pmap.h,v 1.2 2001/11/23 17:29:01 thorpej Exp $ */
+
+#include <arm/pmap.h>
diff --git a/sys/arch/zaurus/include/proc.h b/sys/arch/zaurus/include/proc.h
new file mode 100644
index 00000000000..e9eea6e2344
--- /dev/null
+++ b/sys/arch/zaurus/include/proc.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: proc.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: proc.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $	*/
+
+#include <arm/proc.h>
diff --git a/sys/arch/zaurus/include/profile.h b/sys/arch/zaurus/include/profile.h
new file mode 100644
index 00000000000..00ae54f7809
--- /dev/null
+++ b/sys/arch/zaurus/include/profile.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: profile.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: profile.h,v 1.3 2001/11/25 15:55:57 thorpej Exp $	*/
+
+#include <arm/profile.h>
diff --git a/sys/arch/zaurus/include/psl.h b/sys/arch/zaurus/include/psl.h
new file mode 100644
index 00000000000..b56f54b0dc4
--- /dev/null
+++ b/sys/arch/zaurus/include/psl.h
@@ -0,0 +1 @@
+/*	$OpenBSD: psl.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
diff --git a/sys/arch/zaurus/include/ptrace.h b/sys/arch/zaurus/include/ptrace.h
new file mode 100644
index 00000000000..3bfe7543665
--- /dev/null
+++ b/sys/arch/zaurus/include/ptrace.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: ptrace.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: ptrace.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/ptrace.h>
diff --git a/sys/arch/zaurus/include/reg.h b/sys/arch/zaurus/include/reg.h
new file mode 100644
index 00000000000..fc06d65ede7
--- /dev/null
+++ b/sys/arch/zaurus/include/reg.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: reg.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: reg.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/reg.h>
diff --git a/sys/arch/zaurus/include/reloc.h b/sys/arch/zaurus/include/reloc.h
new file mode 100644
index 00000000000..3443c31ae4b
--- /dev/null
+++ b/sys/arch/zaurus/include/reloc.h
@@ -0,0 +1,2 @@
+/*	$OpenBSD: reloc.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+#include <arm/reloc.h>
diff --git a/sys/arch/zaurus/include/rtc.h b/sys/arch/zaurus/include/rtc.h
new file mode 100644
index 00000000000..e9d41237157
--- /dev/null
+++ b/sys/arch/zaurus/include/rtc.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: rtc.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: rtc.h,v 1.2 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/rtc.h>
diff --git a/sys/arch/zaurus/include/setjmp.h b/sys/arch/zaurus/include/setjmp.h
new file mode 100644
index 00000000000..2dc2a0d57be
--- /dev/null
+++ b/sys/arch/zaurus/include/setjmp.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: setjmp.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: setjmp.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/setjmp.h>
diff --git a/sys/arch/zaurus/include/signal.h b/sys/arch/zaurus/include/signal.h
new file mode 100644
index 00000000000..eb777b91da0
--- /dev/null
+++ b/sys/arch/zaurus/include/signal.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: signal.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: signal.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/signal.h>
diff --git a/sys/arch/zaurus/include/spinlock.h b/sys/arch/zaurus/include/spinlock.h
new file mode 100644
index 00000000000..7fad72549b4
--- /dev/null
+++ b/sys/arch/zaurus/include/spinlock.h
@@ -0,0 +1,6 @@
+
+/*	$OpenBSD: spinlock.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+#ifndef _CATS_SPINLOCK_H_
+#define _CATS_SPINLOCK_H_
+#include <arm/spinlock.h>
+#endif _CATS_SPINLOCK_H_
diff --git a/sys/arch/zaurus/include/stdarg.h b/sys/arch/zaurus/include/stdarg.h
new file mode 100644
index 00000000000..ecec78f756b
--- /dev/null
+++ b/sys/arch/zaurus/include/stdarg.h
@@ -0,0 +1,3 @@
+/*	$NetBSD: stdarg.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/stdarg.h>
diff --git a/sys/arch/zaurus/include/sysarch.h b/sys/arch/zaurus/include/sysarch.h
new file mode 100644
index 00000000000..3fcdaf85729
--- /dev/null
+++ b/sys/arch/zaurus/include/sysarch.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: sysarch.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: sysarch.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/sysarch.h>
diff --git a/sys/arch/zaurus/include/trap.h b/sys/arch/zaurus/include/trap.h
new file mode 100644
index 00000000000..bbcaa1b8aa4
--- /dev/null
+++ b/sys/arch/zaurus/include/trap.h
@@ -0,0 +1,4 @@
+/*	$OpenBSD: trap.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: trap.h,v 1.3 2001/11/25 15:55:58 thorpej Exp $	*/
+
+#include <arm/trap.h>
diff --git a/sys/arch/zaurus/include/types.h b/sys/arch/zaurus/include/types.h
new file mode 100644
index 00000000000..70d96cbd4a3
--- /dev/null
+++ b/sys/arch/zaurus/include/types.h
@@ -0,0 +1,11 @@
+/* 	$OpenBSD: types.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: types.h,v 1.4 2002/02/28 03:17:26 simonb Exp $	*/
+
+#ifndef _ARM32_TYPES_H_
+#define	_ARM32_TYPES_H_
+
+#include <arm/types.h>
+#define __HAVE_GENERIC_SOFT_INTERRUPTS
+#define __HAVE_NWSCONS
+
+#endif
diff --git a/sys/arch/zaurus/include/vmparam.h b/sys/arch/zaurus/include/vmparam.h
new file mode 100644
index 00000000000..5c757a150ce
--- /dev/null
+++ b/sys/arch/zaurus/include/vmparam.h
@@ -0,0 +1,100 @@
+/* 	$OpenBSD: vmparam.h,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: vmparam.h,v 1.23 2003/05/22 05:47:07 thorpej Exp $	*/
+
+/*
+ * Copyright (c) 1988 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef	_ARM32_VMPARAM_H_
+#define	_ARM32_VMPARAM_H_
+
+#define	ARM_KERNEL_BASE		0xc0000000
+
+#include <arm/vmparam.h>
+
+#ifdef _KERNEL
+/*
+ * Address space constants
+ */
+
+/*
+ * The line between user space and kernel space
+ * Mappings >= KERNEL_BASE are constant across all processes
+ */
+#define	KERNEL_BASE		ARM_KERNEL_BASE
+
+/*
+ * Override the default pager_map size, there's not enough KVA.
+ */
+#define PAGER_MAP_SIZE		(4 * 1024 * 1024)
+
+/*
+ * Size of User Raw I/O map
+ */
+
+#define USRIOSIZE       300
+
+/* virtual sizes (bytes) for various kernel submaps */
+
+#define VM_PHYS_SIZE		(USRIOSIZE*PAGE_SIZE)
+
+/*
+ * max number of non-contig chunks of physical RAM you can have
+ */
+
+#define	VM_PHYSSEG_MAX		32
+
+/*
+ * when converting a physical address to a vm_page structure, we
+ * want to use a binary search on the chunks of physical memory
+ * to find our RAM
+ */
+
+#define	VM_PHYSSEG_STRAT	VM_PSTRAT_BSEARCH
+
+/*
+ * this indicates that we can't add RAM to the VM system after the
+ * vm system is init'd.
+ */
+
+#define	VM_PHYSSEG_NOADD
+
+/*
+ * we support 2 free lists:
+ *
+ *	- DEFAULT for all systems
+ *	- ISADMA for the ISA DMA range on Sharks only
+ */
+#endif /* _KERNEL */
+
+#define	VM_NFREELIST		2
+#define	VM_FREELIST_DEFAULT	0
+#define	VM_FREELIST_ISADMA	1
+
+
+#endif	/* _ARM32_VMPARAM_H_ */
diff --git a/sys/arch/zaurus/include/zaurus_reg.h b/sys/arch/zaurus/include/zaurus_reg.h
new file mode 100644
index 00000000000..d40043cf7c8
--- /dev/null
+++ b/sys/arch/zaurus/include/zaurus_reg.h
@@ -0,0 +1,96 @@
+/*	$NetBSD: lubbock_reg.h,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _EVBARM_LUBBOCK_REG_H
+#define _EVBARM_LUBBOCK_REG_H
+
+#include <arm/xscale/pxa2x0reg.h>
+
+/* lubbock on-board IOs */
+#define LUBBOCK_OBIO_PBASE PXA2X0_CS2_START /* Physical address */
+#define LUBBOCK_OBIO_SIZE  0x00000100
+
+#define LUBBOCK_SRAM_PBASE (PXA2X0_CS2_START+0x02000000)
+#define LUBBOCK_SRAM_SIZE  0x00100000
+
+#define LUBBOCK_91C96_PBASE PXA2X0_CS3_START
+#define LUBBOCK_91C96_IO	LUBBOCK_91C96_PBASE
+#define LUBBOCK_91C96_ATTRMEM	(LUBBOCK_91C96_PBASE+0x02000000)
+
+
+/* SA-1111 companion chip registers */
+#define LUBBOCK_SACC_PBASE PXA2X0_CS4_START
+
+/*
+ * Logical mapping for onboard/integrated peripherals
+ */
+#define	LUBBOCK_IO_AREA_VBASE	0xfd000000
+#define LUBBOCK_OBIO_VBASE	0xfd000000
+#define LUBBOCK_GPIO_VBASE	0xfd100000
+#define LUBBOCK_CLKMAN_VBASE 	0xfd200000
+#define LUBBOCK_INTCTL_VBASE 	0xfd300000
+#define LUBBOCK_AGPIO_VBASE	0xfd400000
+#define LUBBOCK_VBASE_FREE	0xfd500000
+/* FFUART and/or BTUART are mapped to this area when
+   used for console or kgdb port */
+
+/*
+ * Onboard register address
+ * (offset from LUBBOCK_OBIO_PBASE)
+ */
+#define LUBBOCK_SYSTEMID	0x0000
+#define LUBBOCK_HEXLED  	0x0010
+#define LUBBOCK_LEDCTL		0x0040
+#define LUBBOCK_CONFIGSW	0x0050
+#define LUBBOCK_USERSW		0x0060
+#define LUBBOCK_MISCWR		0x0080
+#define  MISCWR_S1PWR	 	(3U<<14)
+#define  MISCWR_LCDDISP		(1U<<8)
+#define  MISCWR_IRDAMODE	(1U<<4)	/* 1=FIR, 0=SIR */
+#define  MISCWR_GREENLED	(1U<<3)
+#define  MISCWR_ENETEN16	(1U<<2)
+#define  MISCWR_PCRESET		(1U<<1)	/* Processor card reset */
+#define  MSICWR_SYSRESET	(1U<<0)
+#define LUBBOCK_MISCRD		0x0090
+#define LUBBOCK_INTRMASK	0x00c0
+#define LUBBOCK_INTRCTL		0x00d0
+
+#define ioreg_read(a)  (*(volatile unsigned *)(a))
+#define ioreg_write(a,v)  (*(volatile unsigned *)(a)=(v))
+
+#define ioreg16_read(a)  (*(volatile uint16_t *)(a))
+#define ioreg16_write(a,v)  (*(volatile uint16_t *)(a)=(v))
+
+#define ioreg8_read(a)  (*(volatile uint8_t *)(a))
+#define ioreg8_write(a,v)  (*(volatile uint8_t *)(a)=(v))
+
+#endif /* _EVBARM_LUBBOCK_REG_H */
diff --git a/sys/arch/zaurus/include/zaurus_var.h b/sys/arch/zaurus/include/zaurus_var.h
new file mode 100644
index 00000000000..4455328bf36
--- /dev/null
+++ b/sys/arch/zaurus/include/zaurus_var.h
@@ -0,0 +1,100 @@
+/*	$NetBSD: lubbock_var.h,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _EVBARM_LUBBOCK_VAR_H
+#define _EVBARM_LUBBOCK_VAR_H
+
+#include <sys/conf.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+#include <machine/zaurus_reg.h>
+
+
+/* 
+ * Lubbock on-board IO bus
+ */
+#define N_OBIO_IRQ  8
+
+struct obio_softc {
+	struct device sc_dev;
+	bus_space_tag_t sc_iot;
+	bus_space_handle_t sc_obioreg_ioh;
+	void	*sc_ih;		/* interrupt handler for obio on pxaip */
+	void	*sc_si;		/* software interrupt handler */
+	int	sc_intr;
+	int	sc_obio_intr_mask;
+	int	sc_obio_intr_pending;
+	int	sc_ipl;		/* Max ipl among sub interrupts */
+	struct obio_handler {
+		int	(* func)(void *);
+		void	*arg;
+		int	level;
+	} sc_handler[N_OBIO_IRQ];
+};
+
+typedef void *obio_chipset_tag_t;
+
+struct obio_attach_args {
+	obio_chipset_tag_t	oba_sc;		
+	bus_space_tag_t		oba_iot; 	/* Bus tag */
+	bus_addr_t		oba_addr;	/* i/o address  */
+	int			oba_intr;
+};
+
+/* on-board hex LED */
+void hex_led_blank( uint32_t value, int blank );
+#define hex_led(value) ioreg_write( LUBBOCK_OBIO_VBASE+LUBBOCK_HEXLED, (value) )
+#define hex_led_p(value) ioreg_write( LUBBOCK_OBIO_PBASE+LUBBOCK_HEXLED, (value) )
+
+#define d_led(value) ioreg16_write( LUBBOCK_OBIO_VBASE+LUBBOCK_LEDCTL, (value) )
+
+/*
+ * IRQ handler
+ */
+void *obio_intr_establish(struct obio_softc *, int, int, int (*)(void *), void *);
+void obio_intr_disestablish(void *);
+
+#define obio_read(offset)  ioreg_read(LUBBOCK_OBIO_VBASE+(offset))
+#define obio_write(offset,value)  \
+	ioreg_write(LUBBOCK_OBIO_VBASE+(offset), (value))
+
+
+#define obio16_read(offset)  ioreg16_read(LUBBOCK_OBIO_VBASE+(offset))
+#define obio16_write(offset,value)  \
+	ioreg16_write(LUBBOCK_OBIO_VBASE+(offset), (value))
+
+#define obio8_read(offset)  ioreg8_read(LUBBOCK_OBIO_VBASE+(offset))
+#define obio8_write(offset,value)  \
+	ioreg8_write(LUBBOCK_OBIO_VBASE+(offset), (value))
+
+
+#endif /* _EVBARM_LUBBOCK_VAR_H */
diff --git a/sys/arch/zaurus/zaurus/autoconf.c b/sys/arch/zaurus/zaurus/autoconf.c
new file mode 100644
index 00000000000..1bd283fbd26
--- /dev/null
+++ b/sys/arch/zaurus/zaurus/autoconf.c
@@ -0,0 +1,505 @@
+/*	$OpenBSD: autoconf.c,v 1.1 2004/12/31 00:04:35 drahn Exp $	*/
+/*	$NetBSD: autoconf.c,v 1.2 2001/09/05 16:17:36 matt Exp $	*/
+
+/*
+ * Copyright (c) 1994-1998 Mark Brinicombe.
+ * Copyright (c) 1994 Brini.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe for
+ *      the NetBSD project.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * RiscBSD kernel project
+ *
+ * autoconf.c
+ *
+ * Autoconfiguration functions
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/reboot.h>
+#include <sys/disklabel.h>
+#include <sys/device.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <machine/bootconfig.h>
+#include <machine/intr.h>
+
+#include <dev/cons.h>
+
+
+struct device *booted_device;
+int booted_partition;
+
+struct device *bootdv = NULL;
+
+int findblkmajor(struct device *dv);
+char * findblkname(int maj);
+
+void swapconf(void);
+void rootconf(void);
+void diskconf(void);
+
+static struct device * getdisk(char *str, int len, int defpart, dev_t *devp);
+struct  device *parsedisk(char *, int, int, dev_t *);
+extern char *boot_file;
+
+#include "wd.h"
+#if NWD > 0  
+extern  struct cfdriver wd_cd;
+#endif
+#include "sd.h"
+#if NSD > 0
+extern  struct cfdriver sd_cd;
+#endif
+#include "cd.h"
+#if NCD > 0
+extern  struct cfdriver cd_cd;
+#endif
+#if NRD > 0
+extern  struct cfdriver rd_cd;
+#endif
+#include "raid.h"
+#if NRAID > 0
+extern  struct cfdriver raid_cd;
+#endif
+
+struct  genericconf {
+	struct cfdriver *gc_driver;
+	char *gc_name;
+	dev_t gc_major;
+} genericconf[] = {
+#if NWD > 0
+	{ &wd_cd,  "wd",  16 },
+#endif
+#if NSD > 0
+	{ &sd_cd,  "sd",  24 },
+#endif
+#if NCD > 0
+	{ &cd_cd,  "cd",  26 },
+#endif
+#if NRD > 0
+	{ &rd_cd,  "rd",  18 },
+#endif
+#if NRAID > 0
+	{ &raid_cd,  "raid",  71 },
+#endif
+	{ 0 }
+};
+
+int
+findblkmajor(dv)
+	struct device *dv;
+{
+	char *name = dv->dv_xname;
+	int i;
+
+	for (i = 0; i < sizeof(genericconf)/sizeof(genericconf[0]); ++i)
+		if (strncmp(name, genericconf[i].gc_name,
+		    strlen(genericconf[i].gc_name)) == 0)
+			return (genericconf[i].gc_major);
+	return (-1);
+}
+
+char *
+findblkname(maj)
+	int maj;
+{
+	int i;
+
+	for (i = 0; i < sizeof(genericconf)/sizeof(genericconf[0]); ++i)
+		if (maj == genericconf[i].gc_major)
+			return (genericconf[i].gc_name);
+	return (NULL);
+}
+
+static struct device *
+getdisk(char *str, int len, int defpart, dev_t *devp)
+{
+	struct device *dv;
+
+	if ((dv = parsedisk(str, len, defpart, devp)) == NULL) {
+		printf("use one of:");
+		for (dv = alldevs.tqh_first; dv != NULL;
+		    dv = dv->dv_list.tqe_next) {
+			if (dv->dv_class == DV_DISK)
+				printf(" %s[a-p]", dv->dv_xname);
+#ifdef NFSCLIENT
+			if (dv->dv_class == DV_IFNET)
+				printf(" %s", dv->dv_xname);
+#endif
+		}
+		printf("\n");
+	}
+	return (dv);
+}
+
+struct device *
+parsedisk(char *str, int len, int defpart, dev_t *devp)
+{
+	struct device *dv;
+	char *cp, c;
+	int majdev, part;
+
+	if (len == 0)
+		return (NULL);
+	cp = str + len - 1;
+	c = *cp;
+	if (c >= 'a' && (c - 'a') < MAXPARTITIONS) {
+		part = c - 'a';
+		*cp = '\0';
+	} else
+		part = defpart;
+
+	for (dv = alldevs.tqh_first; dv != NULL; dv = dv->dv_list.tqe_next) {
+		if (dv->dv_class == DV_DISK &&
+		    strcmp(str, dv->dv_xname) == 0) {
+			majdev = findblkmajor(dv);
+			if (majdev < 0)
+				panic("parsedisk");
+			*devp = MAKEDISKDEV(majdev, dv->dv_unit, part);
+			break;
+		}
+#ifdef NFSCLIENT
+		if (dv->dv_class == DV_IFNET &&
+		    strcmp(str, dv->dv_xname) == 0) {
+			*devp = NODEV;
+			break;
+		}
+#endif
+	}
+
+	*cp = c;
+	return (dv);
+}
+
+
+/*
+ * Now that we are fully operational, we can checksum the
+ * disks, and using some heuristics, hopefully are able to
+ * always determine the correct root disk.
+ */
+void
+diskconf()
+{
+	/*
+	 * Configure root, swap, and dump area.  This is
+	 * currently done by running the same checksum
+	 * algorithm over all known disks, as was done in
+	 * /boot.  Then we basically fixup the *dev vars
+	 * from the info we gleaned from this.
+	 */
+#if 0
+	dkcsumattach();
+
+#endif
+	rootconf();
+#if 0
+	swapconf();
+	dumpconf();
+#endif
+}
+
+/*
+ * Configure swap space and related parameters.
+ */
+void
+swapconf()
+{
+	register struct swdevt *swp;
+	register int nblks;
+
+	for (swp = swdevt; swp->sw_dev != NODEV; swp++) {
+		int maj = major(swp->sw_dev);
+
+		if (maj > nblkdev)
+			break;
+		if (bdevsw[maj].d_psize) {
+			nblks = (*bdevsw[maj].d_psize)(swp->sw_dev);
+			if (nblks != -1 &&
+			    (swp->sw_nblks == 0 || swp->sw_nblks > nblks))
+				swp->sw_nblks = nblks;
+			swp->sw_nblks = ctod(dtoc(swp->sw_nblks));
+		}
+	}
+}
+
+void    rootconf(void);
+void    diskconf(void);
+
+
+/*
+ * void cpu_configure()
+ *
+ * Configure all the root devices
+ * The root devices are expected to configure their own children
+ */
+void
+cpu_configure(void)
+{
+	softintr_init();
+
+	/*
+	 * Since various PCI interrupts could be routed via the ICU
+	 * (for PCI devices in the bridge) we need to set up the ICU
+	 * now so that these interrupts can be established correctly
+	 * i.e. This is a hack.
+	 */
+
+	config_rootfound("mainbus", NULL);
+
+	/*
+	 * We can not know which is our root disk, defer
+	 * until we can checksum blocks to figure it out.
+	 */
+	md_diskconf = diskconf;
+	cold = 0;
+
+	/* Time to start taking interrupts so lets open the flood gates .... */
+	(void)spl0();
+
+}
+
+/*
+ * Attempt to find the device from which we were booted.
+ * If we can do so, and not instructed not to do so,
+ * change rootdev to correspond to the load device.
+ */
+void
+rootconf()
+{
+	int  majdev, mindev, unit, part, len;
+	dev_t temp;
+	struct swdevt *swp;
+	struct device *dv;
+	dev_t nrootdev, nswapdev = NODEV;
+	char buf[128];
+	int s;
+
+#if defined(NFSCLIENT)
+	extern char *nfsbootdevname;
+#endif
+
+	printf("boot_file: '%s'\n", boot_file);
+
+	if(boothowto & RB_DFLTROOT)
+		return;		/* Boot compiled in */
+
+	/*
+	 * (raid) device auto-configuration could have returned
+	 * the root device's id in rootdev.  Check this case.
+	 */
+	if (rootdev != NODEV) {
+		majdev = major(rootdev);
+		unit = DISKUNIT(rootdev);
+		part = DISKPART(rootdev);
+
+		len = snprintf(buf, sizeof buf, "%s%d", findblkname(majdev),
+			unit);
+		if (len >= sizeof(buf))
+			panic("rootconf: device name too long");
+
+		bootdv = getdisk(buf, len, part, &rootdev);
+	}
+
+	/* Lookup boot device from boot if not set by configuration */
+	if(bootdv == NULL) {
+		bootdv = parsedisk(boot_file, strlen(boot_file), 0, &temp);
+	}
+	if(bootdv == NULL) {
+		printf("boot device: lookup '%s' failed.\n", boot_file);
+		boothowto |= RB_ASKNAME; /* Don't Panic :-) */
+		/* boothowto |= RB_SINGLE; */
+	} else
+		printf("boot device: %s.\n", bootdv->dv_xname);
+
+	if (boothowto & RB_ASKNAME) {
+		for (;;) {
+			printf("root device ");
+			if (bootdv != NULL)
+				 printf("(default %s%c)",
+					bootdv->dv_xname,
+					bootdv->dv_class == DV_DISK
+						? 'a' : ' ');
+			printf(": ");
+			s = splimp();
+			cnpollc(1);
+			len = getsn(buf, sizeof(buf));
+
+			cnpollc(0);
+			splx(s);
+			if (len == 0 && bootdv != NULL) {
+				strlcpy(buf, bootdv->dv_xname, sizeof buf);
+				len = strlen(buf);
+			}
+			if (len > 0 && buf[len - 1] == '*') {
+				buf[--len] = '\0';
+				dv = getdisk(buf, len, 1, &nrootdev);
+				if (dv != NULL) {
+					bootdv = dv;
+					nswapdev = nrootdev;
+					goto gotswap;
+				}
+			}
+			dv = getdisk(buf, len, 0, &nrootdev);
+			if (dv != NULL) {
+				bootdv = dv;
+				break;
+			}
+		}
+		/*
+		 * because swap must be on same device as root, for
+		 * network devices this is easy.
+		 */
+		if (bootdv->dv_class == DV_IFNET)
+			goto gotswap;
+
+		for (;;) {
+			printf("swap device ");
+			if (bootdv != NULL)
+				printf("(default %s%c)",
+					bootdv->dv_xname,
+					bootdv->dv_class == DV_DISK?'b':' ');
+			printf(": ");
+			s = splimp();
+			cnpollc(1);
+			len = getsn(buf, sizeof(buf));
+			cnpollc(0);
+			splx(s);
+			if (len == 0 && bootdv != NULL) {
+				switch (bootdv->dv_class) {
+				case DV_IFNET:
+					nswapdev = NODEV;
+					break;
+				case DV_DISK:
+					nswapdev = MAKEDISKDEV(major(nrootdev),
+					    DISKUNIT(nrootdev), 1);
+					break;
+				case DV_TAPE:
+				case DV_TTY:
+				case DV_DULL:
+				case DV_CPU:
+					break;
+				}
+				break;
+			}
+			dv = getdisk(buf, len, 1, &nswapdev);
+			if (dv) {
+				if (dv->dv_class == DV_IFNET)
+					nswapdev = NODEV;
+				break;
+			}
+		}
+
+gotswap:
+		rootdev = nrootdev;
+		dumpdev = nswapdev;
+		swdevt[0].sw_dev = nswapdev;
+		swdevt[1].sw_dev = NODEV;
+	}
+	else if(mountroot == NULL) {
+		/*
+		 * `swap generic': Use the device the ROM told us to use.
+		 */
+		if (bootdv == NULL)
+			panic("boot device not known");
+
+		majdev = findblkmajor(bootdv);
+
+		if (majdev >= 0) {
+			/*
+			 * Root and Swap are on disk.
+			 * Boot is always from partition 0.
+			 */
+			rootdev = MAKEDISKDEV(majdev, bootdv->dv_unit, 0);
+			nswapdev = MAKEDISKDEV(majdev, bootdv->dv_unit, 1);
+			dumpdev = nswapdev;
+		} else {
+			/*
+			 *  Root and Swap are on net.
+			 */
+			nswapdev = dumpdev = NODEV;
+		}
+		swdevt[0].sw_dev = nswapdev;
+		swdevt[1].sw_dev = NODEV;
+
+	} else {
+
+		/*
+		 * `root DEV swap DEV': honour rootdev/swdevt.
+		 * rootdev/swdevt/mountroot already properly set.
+		 */
+		return;
+	}
+
+	switch (bootdv->dv_class) {
+#if defined(NFSCLIENT)
+	case DV_IFNET:
+		mountroot = nfs_mountroot;
+		nfsbootdevname = bootdv->dv_xname;
+		return;
+#endif
+	case DV_DISK:
+		mountroot = dk_mountroot;
+		majdev = major(rootdev);
+		mindev = minor(rootdev);
+		unit = DISKUNIT(rootdev);
+		part = DISKPART(rootdev);
+		printf("root on %s%c\n", bootdv->dv_xname, part + 'a');
+		break;
+	default:
+		printf("can't figure root, hope your kernel is right\n");
+		return;
+	}
+
+	/*
+	 * XXX: What is this doing?
+	 */
+	temp = NODEV;
+	for (swp = swdevt; swp->sw_dev != NODEV; swp++) {
+		if (majdev == major(swp->sw_dev) &&
+		    unit == DISKUNIT(swp->sw_dev)) {
+			temp = swdevt[0].sw_dev;
+			swdevt[0].sw_dev = swp->sw_dev;
+			swp->sw_dev = temp;
+			break;
+		}
+	}
+	if (swp->sw_dev == NODEV)
+		return;
+
+	/*
+	 * If dumpdev was the same as the old primary swap device, move
+	 * it to the new primary swap device.
+	 */
+	if (temp == dumpdev)
+		dumpdev = swdevt[0].sw_dev;
+}
+/* End of autoconf.c */
diff --git a/sys/arch/zaurus/zaurus/obio.c b/sys/arch/zaurus/zaurus/obio.c
new file mode 100644
index 00000000000..96f98b5c794
--- /dev/null
+++ b/sys/arch/zaurus/zaurus/obio.c
@@ -0,0 +1,341 @@
+/*	$NetBSD: obio.c,v 1.2 2003/07/15 00:25:06 lukem Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * TODO: dispatch interrupt to SOFTSERIAL or SOFTNET according to requested
+ *       interrupt level.
+ */
+
+#include <sys/cdefs.h>
+/*
+__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.2 2003/07/15 00:25:06 lukem Exp $");
+*/
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/kernel.h>
+#include <sys/reboot.h>
+
+#include <machine/cpu.h>
+#include <machine/bus.h>
+#include <machine/intr.h>
+#include <arm/cpufunc.h>
+
+#include <arm/mainbus/mainbus.h>
+#include <arm/xscale/pxa2x0reg.h>
+#include <arm/xscale/pxa2x0var.h>
+#include <arm/xscale/pxa2x0_gpio.h>
+#include <arm/sa11x0/sa11x0_var.h>
+#include <machine/zaurus_reg.h>
+#include <machine/zaurus_var.h>
+
+/* prototypes */
+static int	obio_match(struct device *, void *, void *);
+static void	obio_attach(struct device *, struct device *, void *);
+static int 	obio_search(struct device *, struct cfdata *, void *);
+static int	obio_print(void *, const char *);
+
+/* attach structures */
+struct cfattach obio_ca = {
+	sizeof (struct obio_softc), obio_match, obio_attach
+};
+
+struct cfdriver obio_cd = {
+	NULL, "obio", DV_DULL
+};
+
+
+uint32_t obio_intr_mask;
+
+static int
+obio_spurious(void *arg)
+{
+	int irqno = (int)arg;
+
+	printf("Spurious interrupt %d on On-board peripheral", irqno);
+	return 1;
+}
+
+
+/*
+ * interrupt handler for GPIO0 (on-board peripherals)
+ *
+ * On Lubbock, 8 interrupts are ORed through on-board logic,
+ * and routed to GPIO0 of PXA250 processor.
+ */
+static int	
+obio_intr(void *arg)
+{
+	int irqno, pending, mask;
+	struct obio_softc *sc = (struct obio_softc *)arg;
+	int psw;
+
+	mask = sc->sc_obio_intr_mask; /* real irq mask for obio */
+
+	psw = disable_interrupts(I32_bit|F32_bit);
+	pending = bus_space_read_2(sc->sc_iot, sc->sc_obioreg_ioh,
+	    LUBBOCK_INTRCTL);
+	/* Here is a chance to lose some interrupts.
+	 * You need to modify FPGA program to avoid it 
+	 */
+	bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRCTL, 0);
+	restore_interrupts(psw);
+
+
+	pending &= mask;
+	while (pending) {
+		irqno = 0;
+
+		for ( ;pending; ++irqno) {
+			if (0 == (pending & (1U<<irqno)))
+				continue;
+			pending &= ~(1U<<irqno);
+
+#ifdef notyet
+			/* if ipl of this irq is higher than current spl level,
+			   call the handler directly instead of dispatching it to
+			   software interrupt. */
+			if (sc->sc_handler[irqno].level > current_spl_level) {
+				(* sc->sc_handler[irqno].func)(
+					sc->sc_handler[irqno].arg );
+			}
+			else 
+#endif
+			{
+				/* mask this interrupt until software
+				   interrupt is handled. */
+				sc->sc_obio_intr_pending |= (1U<<irqno);
+				mask &= ~(1U<<irqno);
+				bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh, 
+				    LUBBOCK_INTRMASK, mask);
+
+				/* handle it later */
+				softintr_schedule(sc->sc_si);
+			}
+		}
+
+		psw = disable_interrupts(I32_bit|F32_bit);
+		pending = bus_space_read_2(sc->sc_iot, sc->sc_obioreg_ioh,
+		    LUBBOCK_INTRCTL);
+		bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, 
+		    LUBBOCK_INTRCTL,0);
+		restore_interrupts(psw);
+		pending &= mask;
+	}
+
+	/* GPIO interrupt is edge triggered.  make a pulse
+	   to let Cotulla notice when other interrupts are
+	   still pending */
+	bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRMASK, 0);
+	bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRMASK, mask);
+	return 1;
+}
+
+static void
+obio_softintr(void *arg)
+{
+	struct obio_softc *sc = (struct obio_softc *)arg;
+	int irqno;
+	int psw;
+	int spl_save = current_spl_level;
+
+	psw = disable_interrupts(I32_bit);
+	while ((irqno = find_first_bit(sc->sc_obio_intr_pending)) >= 0) {
+		sc->sc_obio_intr_pending &= ~(1U<<irqno);
+
+		restore_interrupts(psw);
+
+		_splraise(sc->sc_handler[irqno].level);
+		(* sc->sc_handler[irqno].func)(
+			sc->sc_handler[irqno].arg);
+		splx(spl_save);
+		
+		psw = disable_interrupts(I32_bit);
+	}
+
+	bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh, 
+	    LUBBOCK_INTRMASK, sc->sc_obio_intr_mask);
+
+	restore_interrupts(psw);
+}
+
+/*
+ * int obio_print(void *aux, const char *name)
+ * print configuration info for children
+ */
+
+static int
+obio_print(void *aux, const char *name)
+{
+	struct obio_attach_args *oba = (struct obio_attach_args*)aux;
+
+	if (oba->oba_addr != -1)
+                printf(" addr 0x%lx", oba->oba_addr);
+        if (oba->oba_intr > 0)
+                printf(" intr %d", oba->oba_intr);
+        return (UNCONF);
+}
+
+int
+obio_match(struct device *parent, void *match, void *aux)
+{
+	return 1;
+}
+
+void
+obio_attach(struct device *parent, struct device *self, void *aux)
+{
+	struct obio_softc *sc = (struct obio_softc*)self;
+	int system_id, baseboard_id, expansion_id, processor_card_id;
+	struct pxaip_attach_args *sa = (struct pxaip_attach_args *)aux;
+	char *processor_card_name;
+	int i;
+	
+
+	/* Map on-board FPGA registers */
+	sc->sc_iot = &pxa2x0_bs_tag;
+	if (bus_space_map(sc->sc_iot, LUBBOCK_OBIO_PBASE, LUBBOCK_OBIO_SIZE,
+	    0, &(sc->sc_obioreg_ioh))) {
+		printf("%s: can't map FPGA registers\n", self->dv_xname);
+	}
+
+	system_id = bus_space_read_4(sc->sc_iot, sc->sc_obioreg_ioh,
+	    LUBBOCK_SYSTEMID);
+
+	baseboard_id = (system_id>>8) & 0x0f;
+	expansion_id = (system_id>>4) & 0x0f;
+	processor_card_id = system_id & 0x0f;
+
+	switch (processor_card_id) {
+	case 0: processor_card_name = "Cotulla"; break;
+	case 1: processor_card_name = "Sabinal"; break;
+	default: processor_card_name = "(unknown)";
+	}
+
+	printf(" : baseboard=%d (%s), expansion card=%d, processor card=%d (%s)\n",
+	       baseboard_id,
+	       baseboard_id==8 ? "DBPXA250(lubbock)" : "(unknown)",
+	       expansion_id,
+	       processor_card_id, processor_card_name );
+
+	/*
+	 *  Mask all interrupts.
+	 *  They are later unmasked at each device's attach routine.
+	 */
+	bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
+	    LUBBOCK_INTRMASK,0);
+
+	sc->sc_intr = sa->pxa_intr;	/* irq no. on ICU. */
+	sc->sc_obio_intr_mask = 0;	/* No interrupt used */
+	sc->sc_obio_intr_pending = 0;
+	sc->sc_ipl = IPL_BIO;
+
+	for (i=0; i < N_OBIO_IRQ; ++i) {
+		sc->sc_handler[i].func = obio_spurious;
+		sc->sc_handler[i].arg = (void *)i;
+	}
+
+
+	/*
+	 * establish interrupt handler.
+	 */
+#if 0
+	/*
+	 * level is lowest at first, and changed when
+	 * sub-interrupt handlers are established
+	 */
+	sc->sc_ipl = IPL_BIO;
+#else
+	/*
+	 * level is very high to allow high priority sub-interrupts.
+	 */
+	sc->sc_ipl = IPL_AUDIO;
+#endif
+	sc->sc_ih = pxa2x0_gpio_intr_establish(0, IST_EDGE_FALLING, sc->sc_ipl,
+	    obio_intr, sc, sc->sc_dev.dv_xname);
+	sc->sc_si = softintr_establish(IPL_SOFTNET, obio_softintr, sc);
+
+
+	/*
+	 *  Attach each devices
+	 */
+	obio_search(self, NULL, NULL);
+}
+
+int
+obio_search(parent, cf, aux)
+	struct device *parent;
+	struct cfdata *cf;
+	void *aux;
+{
+	struct obio_softc *sc = (struct obio_softc *)parent;
+	struct obio_attach_args oba;
+
+	oba.oba_sc = sc;
+        oba.oba_iot = sc->sc_iot;
+        oba.oba_addr = -1;
+        oba.oba_intr = -1;
+
+	config_found(parent, &oba, obio_print);
+
+        return 0;
+}
+
+void *
+obio_intr_establish(struct obio_softc *sc,
+		    int irq, int ipl, int (*func)(void *), void *arg)
+{
+	int psw;
+
+	if (irq < 0 || N_OBIO_IRQ <= irq)
+		panic("Bad irq no for obio");
+
+	psw = disable_interrupts(I32_bit);
+
+	sc->sc_handler[irq].func = func;
+	sc->sc_handler[irq].arg = arg;
+	sc->sc_handler[irq].level = ipl;
+
+#ifdef notyet
+	if (ipl > sc->sc_ipl) {
+		pxa2x0_update_intr_masks(sc->sc_intr, ipl);
+		sc->sc_ipl = ipl;
+	}
+#endif
+
+	sc->sc_obio_intr_mask |= (1U << irq);
+	bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
+	    LUBBOCK_INTRMASK, sc->sc_obio_intr_mask);
+
+	enable_interrupts(psw);
+	return &sc->sc_handler[irq];
+}
diff --git a/sys/arch/zaurus/zaurus/zaurus_lcd.c b/sys/arch/zaurus/zaurus/zaurus_lcd.c
new file mode 100644
index 00000000000..4caa2634129
--- /dev/null
+++ b/sys/arch/zaurus/zaurus/zaurus_lcd.c
@@ -0,0 +1,328 @@
+/* $NetBSD: lubbock_lcd.c,v 1.1 2003/08/09 19:38:53 bsh Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * LCD driver for Intel Lubbock.
+ *
+ * Controlling LCD is almost completely done through PXA2X0's
+ * integrated LCD controller.  Codes for it is arm/xscale/pxa2x0_lcd.c.
+ *
+ * Codes in this file provide platform specific things including:
+ *   LCD on/off switch in on-board PLD register.
+ *   LCD panel geometry
+ */
+#include <sys/cdefs.h>
+/*
+__KERNEL_RCSID(0, "$NetBSD: lubbock_lcd.c,v 1.1 2003/08/09 19:38:53 bsh Exp $");
+*/
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/conf.h>
+#include <sys/uio.h>
+#include <sys/malloc.h>
+
+#include <dev/cons.h> 
+#include <dev/wscons/wsconsio.h>
+#include <dev/wscons/wsdisplayvar.h> 
+#include <dev/wscons/wscons_callbacks.h>
+
+#include <machine/bus.h>
+#include <arm/xscale/pxa2x0var.h>
+#include <arm/xscale/pxa2x0reg.h>
+#include <arm/xscale/pxa2x0_lcd.h>
+
+#include <machine/zaurus_reg.h>
+#include <machine/zaurus_var.h>
+
+#include "wsdisplay.h"
+
+int	lcd_match( struct device *, void *, void *);
+void	lcd_attach( struct device *, struct device *, void *);
+int	lcdintr(void *);
+
+#if NWSDISPLAY > 0
+
+/*
+ * wsdisplay glue
+ */
+struct pxa2x0_wsscreen_descr lcd_bpp16_screen = {
+	{
+		"bpp16", 0, 0,
+		&pxa2x0_lcd_emulops,
+		0, 0,
+		WSSCREEN_WSCOLORS,
+	},
+	16				/* bits per pixel */
+}, lcd_bpp8_screen = {
+	{
+		"bpp8", 0, 0,
+		&pxa2x0_lcd_emulops,
+		0, 0,
+		WSSCREEN_WSCOLORS,
+	},
+	8				/* bits per pixel */
+}, lcd_bpp4_screen = {
+	{
+		"bpp4", 0, 0,
+		&pxa2x0_lcd_emulops,
+		0, 0,
+		WSSCREEN_WSCOLORS,
+	},
+	4				/* bits per pixel */
+};
+
+
+static const struct wsscreen_descr *lcd_scr_descr[] = {
+#if 0
+	/* bpp4 needs a patch to rasops4 */
+	&lcd_bpp4_screen.c,
+	&lcd_bpp8_screen.c,
+#endif
+	&lcd_bpp16_screen.c,
+};
+
+const struct wsscreen_list lcd_screen_list = {
+	sizeof lcd_scr_descr / sizeof lcd_scr_descr[0],
+	lcd_scr_descr
+};
+
+int	lcd_ioctl(void *, u_long, caddr_t, int, struct proc *);
+
+int	lcd_show_screen(void *, void *, int,
+	    void (*)(void *, int, int), void *);
+
+const struct wsdisplay_accessops lcd_accessops = {
+	lcd_ioctl,
+	pxa2x0_lcd_mmap,
+	pxa2x0_lcd_alloc_screen,
+	pxa2x0_lcd_free_screen,
+	lcd_show_screen,
+	NULL, /* load_font */
+};
+
+#else
+/*
+ * Interface to LCD framebuffer without wscons
+ */
+dev_type_open(lcdopen);
+dev_type_close(lcdclose);
+dev_type_ioctl(lcdioctl);
+dev_type_mmap(lcdmmap);
+const struct cdevsw lcd_cdevsw = {
+	lcdopen, lcdclose, noread, nowrite,
+	lcdioctl, nostop, notty, nopoll, lcdmmap, D_TTY
+};
+
+#endif
+
+#if 0
+CFATTACH_DECL(lcd_obio, sizeof (struct pxa2x0_lcd_softc),  lcd_match,
+    lcd_attach, NULL, NULL);
+#endif
+struct cfattach lcd_obio_ca = {
+        sizeof (struct pxa2x0_lcd_softc), lcd_match, lcd_attach
+};
+	 
+struct cfdriver lcd_cd = {
+	NULL, "lcd_obio", DV_DULL
+};
+
+int
+lcd_match( struct device *parent, void *cf, void *aux )
+{
+	return 1;
+}
+
+/*
+#define CURRENT_DISPLAY opus
+*/
+#define CURRENT_DISPLAY sharp_LM8V31
+
+static const struct lcd_panel_geometry sharp_LM8V31 =
+{
+    640,			/* Width */
+    480,			/* Height */
+    0,				/* No extra lines */
+
+    LCDPANEL_PASSIVE|LCDPANEL_PCP,
+    10,				/* clock divider */
+    0xff,			/* AC bias pin freq */
+
+    2,				/* horizontal sync pulse width */
+    3,				/* BLW */
+    3,				/* ELW */
+
+    1,				/* vertical sync pulse width */
+    0,				/* BFW */
+    0,				/* EFW */
+
+};
+
+static const struct lcd_panel_geometry opus =
+{
+    240,			/* Width */
+    320,			/* Height */
+    0,				/* No extra lines */
+
+    LCDPANEL_PASSIVE|LCDPANEL_PCP,
+    10,				/* clock divider */
+    0xff,			/* AC bias pin freq */
+
+    2,				/* horizontal sync pulse width */
+    3,				/* BLW */
+    3,				/* ELW */
+
+    1,				/* vertical sync pulse width */
+    0,				/* BFW */
+    0,				/* EFW */
+
+};
+
+void lcd_attach( struct device *parent, struct device *self, void *aux )
+{
+	struct pxa2x0_lcd_softc *sc = (struct pxa2x0_lcd_softc *)self;
+
+	pxa2x0_lcd_attach_sub(sc, aux, &CURRENT_DISPLAY);
+
+
+#if NWSDISPLAY > 0
+
+	{
+		struct wsemuldisplaydev_attach_args aa;
+
+		/* make wsdisplay screen list */
+		pxa2x0_lcd_setup_wsscreen( &lcd_bpp16_screen, &CURRENT_DISPLAY, NULL );
+		/*
+		pxa2x0_lcd_setup_wsscreen( &lcd_bpp8_screen, &CURRENT_DISPLAY, NULL );
+		pxa2x0_lcd_setup_wsscreen( &lcd_bpp4_screen, &CURRENT_DISPLAY, NULL );
+		*/
+
+		aa.console = 0;
+		aa.scrdata = &lcd_screen_list;
+		aa.accessops = &lcd_accessops;
+		aa.accesscookie = sc;
+
+		printf( "\n" );
+
+		(void) config_found(self, &aa, wsemuldisplaydevprint);
+	}
+#else
+	{
+		struct pxa2x0_lcd_screen *screen = pxa2x0_lcd_new_screen( sc, 8 );
+
+		if( screen ){
+			sc->active = screen;
+			pxa2x0_lcd_start_dma( sc, screen );
+		}
+
+		printf( "\n" );
+	}
+#endif
+
+}
+
+#if NWSDISPLAY > 0
+
+int
+lcd_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
+{
+	struct obio_softc *osc = 
+	    (struct obio_softc *)((struct device *)v)->dv_parent;
+	uint16_t reg;
+
+	switch (cmd) {
+	case WSDISPLAYIO_SVIDEO:
+		reg = bus_space_read_2( osc->sc_iot, osc->sc_obioreg_ioh,
+		    LUBBOCK_MISCWR );
+		if( *(int *)data == WSDISPLAYIO_VIDEO_ON )
+			reg |= MISCWR_LCDDISP;
+		else
+			reg &= ~MISCWR_LCDDISP;
+		bus_space_write_2( osc->sc_iot, osc->sc_obioreg_ioh,
+			LUBBOCK_MISCWR, reg );
+		break;			/* turn on/off LCD controller */
+	}
+
+	return pxa2x0_lcd_ioctl( v, cmd, data, flag, p );
+}
+
+int
+lcd_show_screen(void *v, void *cookie, int waitok,
+    void (*cb)(void *, int, int), void *cbarg)
+{
+	struct obio_softc *osc = 
+	    (struct obio_softc *)((struct device *)v)->dv_parent;
+
+	pxa2x0_lcd_show_screen(v,cookie,waitok,cb,cbarg);
+	
+	/* Turn on LCD */
+	bus_space_write_4( osc->sc_iot, osc->sc_obioreg_ioh, LUBBOCK_MISCWR,
+	    MISCWR_LCDDISP |
+	    bus_space_read_4( osc->sc_iot, osc->sc_obioreg_ioh, LUBBOCK_MISCWR ) );
+
+	return (0);
+}
+
+
+
+#else  /* NWSDISPLAY==0 */
+
+int
+lcdopen( dev_t dev, int oflags, int devtype, struct proc *p )
+{
+	return 0;
+}
+
+int
+lcdclose( dev_t dev, int fflag, int devtype, struct proc *p )
+{
+	return 0;
+}
+
+paddr_t
+lcdmmap( dev_t dev, off_t offset, int size )
+{
+	struct pxa2x0_lcd_softc *sc = device_lookup(&lcd_cd, minor(dev));
+	struct pxa2x0_lcd_screen *scr = sc->active;
+
+	return bus_dmamem_mmap( &pxa2x0_bus_dma_tag, scr->segs, scr->nsegs,
+	    offset, 0, BUS_DMA_WAITOK|BUS_DMA_COHERENT );
+}
+
+int
+lcdioctl( dev_t dev, u_long cmd, caddr_t data,
+	    int fflag, struct proc *p )
+{
+	return EOPNOTSUPP;
+}
+
+#endif /* NWSDISPLAY>0 */
diff --git a/sys/arch/zaurus/zaurus/zaurus_machdep.c b/sys/arch/zaurus/zaurus/zaurus_machdep.c
new file mode 100644
index 00000000000..90f030d6f23
--- /dev/null
+++ b/sys/arch/zaurus/zaurus/zaurus_machdep.c
@@ -0,0 +1,1404 @@
+/*	$NetBSD: lubbock_machdep.c,v 1.2 2003/07/15 00:25:06 lukem Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Machine dependant functions for kernel setup for 
+ * Intel DBPXA250 evaluation board (a.k.a. Lubbock).
+ * Based on iq80310_machhdep.c
+ */
+/*
+ * Copyright (c) 2001 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1997,1998 Mark Brinicombe.
+ * Copyright (c) 1997,1998 Causality Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe
+ *	for the NetBSD Project.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * Machine dependant functions for kernel setup for Intel IQ80310 evaluation
+ * boards using RedBoot firmware.
+ */
+
+/*
+ * DIP switches:
+ *
+ * S19: no-dot: set RB_KDB.  enter kgdb session.
+ * S20: no-dot: set RB_SINGLE. don't go multi user mode.
+ */
+
+#include <sys/cdefs.h>
+#include "rd.h"
+#include "lcd.h"
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/exec.h>
+#include <sys/proc.h>
+#include <sys/msgbuf.h>
+#include <sys/reboot.h>
+#include <sys/termios.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <sys/conf.h>
+#include <sys/queue.h>
+#include <sys/device.h>
+#include <dev/cons.h>
+#include <dev/ic/smc91cxxreg.h>
+
+#include <machine/db_machdep.h>
+#include <ddb/db_sym.h>
+#include <ddb/db_extern.h>
+#ifdef KGDB
+#include <sys/kgdb.h>
+#endif
+
+#include <machine/bootconfig.h>
+#include <machine/bus.h>
+#include <machine/cpu.h>
+#include <machine/frame.h>
+#include <arm/undefined.h>
+#include <arm/machdep.h>
+
+#include <arm/xscale/pxa2x0reg.h>
+#include <arm/xscale/pxa2x0var.h>
+#include <arm/xscale/pxa2x0_gpio.h>
+#include <arm/sa11x0/sa1111_reg.h>
+#include <machine/zaurus_reg.h>
+#include <machine/zaurus_var.h>
+
+/* Kernel text starts 2MB in from the bottom of the kernel address space. */
+#define	KERNEL_TEXT_BASE	(KERNEL_BASE + 0x00200000)
+#define	KERNEL_VM_BASE		(KERNEL_BASE + 0x04000000)
+
+/*
+ * The range 0xc1000000 - 0xccffffff is available for kernel VM space
+ * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
+ */
+/*
+#define KERNEL_VM_SIZE		0x0C000000
+*/
+#define KERNEL_VM_SIZE		0x10000000
+
+
+/*
+ * Address to call from cpu_reset() to reset the machine.
+ * This is machine architecture dependant as it varies depending
+ * on where the ROM appears when you turn the MMU off.
+ */
+
+u_int cpu_reset_address = 0;
+
+/* Define various stack sizes in pages */
+#define IRQ_STACK_SIZE	1
+#define ABT_STACK_SIZE	1
+#ifdef IPKDB
+#define UND_STACK_SIZE	2
+#else
+#define UND_STACK_SIZE	1
+#endif
+
+BootConfig bootconfig;		/* Boot config storage */
+char *boot_args = NULL;
+char *boot_file = NULL;
+
+vm_offset_t physical_start;
+vm_offset_t physical_freestart;
+vm_offset_t physical_freeend;
+vm_offset_t physical_end;
+u_int free_pages;
+vm_offset_t pagetables_start;
+int physmem = 0;
+
+/*int debug_flags;*/
+#ifndef PMAP_STATIC_L1S
+int max_processes = 64;			/* Default number */
+#endif	/* !PMAP_STATIC_L1S */
+
+/* Physical and virtual addresses for some global pages */
+pv_addr_t systempage;
+pv_addr_t irqstack;
+pv_addr_t undstack;
+pv_addr_t abtstack;
+extern pv_addr_t kernelstack;
+pv_addr_t minidataclean;
+
+vm_offset_t msgbufphys;
+
+extern u_int data_abort_handler_address;
+extern u_int prefetch_abort_handler_address;
+extern u_int undefined_handler_address;
+
+#ifdef PMAP_DEBUG
+extern int pmap_debug_level;
+#endif
+
+#define KERNEL_PT_SYS		0	/* Page table for mapping proc0 zero page */
+#define KERNEL_PT_KERNEL	1	/* Page table for mapping kernel */
+#define	KERNEL_PT_KERNEL_NUM	32
+#define KERNEL_PT_VMDATA	(KERNEL_PT_KERNEL+KERNEL_PT_KERNEL_NUM)
+				        /* Page tables for mapping kernel VM */
+#define	KERNEL_PT_VMDATA_NUM	8	/* start with 16MB of KVM */
+#define NUM_KERNEL_PTS		(KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
+
+pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
+
+extern struct user *proc0paddr;
+
+/* Prototypes */
+
+#if 0
+void	process_kernel_args(char *);
+void	parse_mi_bootargs(char *args);
+#endif
+
+void	consinit(void);
+void	kgdb_port_init(void);
+void	change_clock(uint32_t v);
+
+bs_protos(bs_notimpl);
+
+#include "com.h"
+#if NCOM > 0
+#include <dev/ic/comreg.h>
+#include <dev/ic/comvar.h>
+#endif
+
+#ifndef CONSPEED
+#define CONSPEED B9600	/* What RedBoot uses */
+#endif
+#ifndef CONMODE
+#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
+#endif
+
+int comcnspeed = CONSPEED;
+int comcnmode = CONMODE;
+
+/*
+ * void boot(int howto, char *bootstr)
+ *
+ * Reboots the system
+ *
+ * Deal with any syncing, unmounting, dumping and shutdown hooks,
+ * then reset the CPU.
+ */
+void
+boot(int howto)
+{
+#ifdef DIAGNOSTIC
+	/* info */
+	printf("boot: howto=%08x curproc=%p\n", howto, curproc);
+#endif
+
+	/*
+	 * If we are still cold then hit the air brakes
+	 * and crash to earth fast
+	 */
+	if (cold) {
+		doshutdownhooks();
+		if ((howto & (RB_HALT | RB_USERREQ)) != RB_USERREQ) {
+			printf("The operating system has halted.\n");
+			printf("Please press any key to reboot.\n\n");
+			cngetc();
+		}
+		printf("rebooting...\n");
+		cpu_reset();
+		/*NOTREACHED*/
+	}
+
+	/* Disable console buffering */
+/*	cnpollc(1);*/
+
+	/*
+	 * If RB_NOSYNC was not specified sync the discs.
+	 * Note: Unless cold is set to 1 here, syslogd will die during the
+	 * unmount.  It looks like syslogd is getting woken up only to find
+	 * that it cannot page part of the binary in as the filesystem has
+	 * been unmounted.
+	 */
+	if (!(howto & RB_NOSYNC))
+		bootsync();
+
+	/* Say NO to interrupts */
+	splhigh();
+
+	/* Do a dump if requested. */
+	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
+		dumpsys();
+	
+	/* Run any shutdown hooks */
+	doshutdownhooks();
+
+	/* Make sure IRQ's are disabled */
+	IRQdisable;
+
+	if (howto & RB_HALT) {
+		printf("The operating system has halted.\n");
+		printf("Please press any key to reboot.\n\n");
+		cngetc();
+	}
+
+	printf("rebooting...\n");
+	cpu_reset();
+	/*NOTREACHED*/
+}
+
+static __inline
+pd_entry_t *
+read_ttb(void)
+{
+  long ttb;
+
+  __asm __volatile("mrc	p15, 0, %0, c2, c0, 0" : "=r" (ttb));
+
+
+  return (pd_entry_t *)(ttb & ~((1<<14)-1));
+}
+
+/*
+ * Mapping table for core kernel memory. These areas are mapped in
+ * init time at fixed virtual address with section mappings. 
+ */
+struct l1_sec_map {
+	vaddr_t	va;
+	vaddr_t	pa;
+	vsize_t	size;
+	int flags;
+} l1_sec_table[] = {
+    {
+	    LUBBOCK_OBIO_VBASE,
+	    LUBBOCK_OBIO_PBASE,
+	    LUBBOCK_OBIO_SIZE,
+	    PTE_NOCACHE,
+    },
+    {
+	    LUBBOCK_GPIO_VBASE,
+	    PXA2X0_GPIO_BASE,
+	    PXA2X0_GPIO_SIZE,
+	    PTE_NOCACHE,
+    },
+    {
+	    LUBBOCK_CLKMAN_VBASE,
+	    PXA2X0_CLKMAN_BASE,
+	    PXA2X0_CLKMAN_SIZE,
+	    PTE_NOCACHE,
+    },
+    {
+	    LUBBOCK_INTCTL_VBASE,
+	    PXA2X0_INTCTL_BASE,
+	    PXA2X0_INTCTL_SIZE,
+	    PTE_NOCACHE,
+    },
+    {
+	    LUBBOCK_INTCTL_VBASE,
+	    PXA2X0_INTCTL_BASE,
+	    PXA2X0_INTCTL_SIZE,
+	    PTE_NOCACHE,
+    },
+    {
+	    LUBBOCK_AGPIO_VBASE,
+	    0x10800000,
+	    0x00010000, /* XXX */
+	    PTE_NOCACHE,
+    },
+    {0, 0, 0, 0,}
+};
+
+static void
+map_io_area(paddr_t pagedir)
+{
+	int loop;
+
+	/*
+	 * Map devices we can map w/ section mappings.
+	 */
+	loop = 0;
+	while (l1_sec_table[loop].size) {
+		vm_size_t sz;
+
+#define VERBOSE_INIT_ARM
+#ifdef VERBOSE_INIT_ARM
+		printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
+		    l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
+		    l1_sec_table[loop].va);
+#endif
+		for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
+			pmap_map_section(pagedir, l1_sec_table[loop].va + sz,
+			    l1_sec_table[loop].pa + sz,
+			    VM_PROT_READ|VM_PROT_WRITE,
+			    l1_sec_table[loop].flags);
+		++loop;
+	}
+}
+
+/*
+ * simple memory mapping function used in early bootstrap stage
+ * before pmap is initialized.
+ * size and cacheability are ignored and map one section with nocache.
+ */
+static vaddr_t section_free = LUBBOCK_VBASE_FREE;
+
+static int
+bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
+    int cacheable, bus_space_handle_t *bshp)
+{
+	u_long startpa;
+	vaddr_t va;
+	pd_entry_t *pagedir = read_ttb();
+	/* This assumes PA==VA for page directory */
+
+	va = section_free;
+	section_free += L1_S_SIZE;
+
+	startpa = trunc_page(bpa);
+	pmap_map_section((vaddr_t)pagedir, va, startpa, 
+	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
+	cpu_tlb_flushD();
+
+	*bshp = (bus_space_handle_t)(va + (bpa - startpa));
+
+	return(0);
+}
+
+static void
+copy_io_area_map(pd_entry_t *new_pd)
+{
+	pd_entry_t *cur_pd = read_ttb();
+	vaddr_t va;
+
+	for (va = LUBBOCK_IO_AREA_VBASE;
+	     (cur_pd[va>>L1_S_SHIFT] & L1_TYPE_MASK) == L1_TYPE_S;
+	     va += L1_S_SIZE) {
+
+		new_pd[va>>L1_S_SHIFT] = cur_pd[va>>L1_S_SHIFT];
+		if (va == (0 - L1_S_SIZE))
+			break; /* STUPID */
+
+	}
+}
+
+void green_on(int virt);
+void
+green_on(int virt)
+{
+	/* clobber green led p */
+	volatile u_int16_t *p;
+	if (virt)
+		p = (u_int16_t *)(LUBBOCK_AGPIO_VBASE+24);
+	else
+		p = (u_int16_t *)0x10800024;
+
+	*p = *p | 2;
+}
+
+void sysprobe(void);
+void
+sysprobe(void)
+{
+	u_int32_t *p;
+
+	p = (void *)0x48000014; /* MECR */
+	printf("MECR %x\n", *p);
+
+	p = (void *)0x48000028; /* MCMEM0 */
+	printf("MCMEM0 %x\n", *p); 
+	p = (void *)0x4800002C; /* MCMEM1 */
+	printf("MCMEM1 %x\n", *p); 
+
+	p = (void *)0x48000030; /* MCATTx */
+	printf("MCATT0 %x\n", *p); 
+	p = (void *)0x48000034; /* MCATTx */
+	printf("MCATT1 %x\n", *p); 
+
+	p = (void *)0x48000038; /* MCIOx */
+	printf("MCIO0 %x\n", *p); 
+	p = (void *)0x4800003C; /* MCIOx */
+	printf("MCIO1 %x\n", *p); 
+}
+
+/*
+ * u_int initarm(...)
+ *
+ * Initial entry point on startup. This gets called before main() is
+ * entered.
+ * It should be responsible for setting up everything that must be
+ * in place when main is called.
+ * This includes
+ *   Taking a copy of the boot configuration structure.
+ *   Initialising the physical console so characters can be printed.
+ *   Setting up page tables for the kernel
+ *   Relocating the kernel to the bottom of physical memory
+ */
+u_int
+initarm(void *arg)
+{
+	extern vaddr_t xscale_cache_clean_addr;
+	int loop;
+	int loop1;
+	u_int l1pagetable;
+	pv_addr_t kernel_l1pt;
+	paddr_t memstart;
+	psize_t memsize;
+
+#if 0
+	int led_data = 0;
+#endif
+#ifdef DIAGNOSTIC
+	extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
+#endif
+	struct bus_space tmp_bs_tag;
+	int	(*map_func_save)(void *, bus_addr_t, bus_size_t, int, 
+	    bus_space_handle_t *);
+#if 0
+#define LEDSTEP_P() 	ioreg_write(LUBBOCK_OBIO_PBASE+LUBBOCK_HEXLED, led_data++)
+#define LEDSTEP() hex_led(led_data++)
+#else
+#define LEDSTEP_P() 	
+#define LEDSTEP()
+#endif
+
+
+
+	/* use physical address until pagetable is set */
+	LEDSTEP_P();
+
+#if 0
+	/* XXX */
+	/* start 32.768KHz OSC */
+	ioreg_write(PXA2X0_CLKMAN_BASE + 0x08, 2);
+#endif
+
+	/*
+	 * Heads up ... Setup the CPU / MMU / TLB functions
+	 */
+	if (set_cpufuncs())
+		panic("cpu not recognized!");
+	LEDSTEP_P();
+
+	/* Get ready for splfoo() */
+	pxa2x0_intr_bootstrap(PXA2X0_INTCTL_BASE);
+
+#if 0
+	/* Calibrate the delay loop. */
+#endif
+
+	/*
+	 * Okay, RedBoot has provided us with the following memory map:
+	 *
+	 * Physical Address Range     Description 
+	 * -----------------------    ---------------------------------- 
+	 * 0x00000000 - 0x01ffffff    flash Memory   (32MB)
+	 * 0x04000000 - 0x05ffffff    Application flash Memory  (32MB)
+	 * 0x08000000 - 0x080000ff    I/O baseboard registers
+	 * 0x0a000000 - 0x0a0fffff    SRAM (1MB)
+	 * 0x0c000000 - 0x0c0fffff    Ethernet Controller
+	 * 0x0e000000 - 0x0e0fffff    Ethernet Controller (Attribute)
+	 * 0x10000000 - 0x103fffff    SA-1111 Companion Chip
+	 * 0x14000000 - 0x17ffffff    Expansion Card (64MB)
+	 * 0x40000000 - 0x480fffff    Processor Registers
+	 * 0xa0000000 - 0xa3ffffff    SDRAM Bank 0 (64MB)
+	 *
+	 *
+	 * Virtual Address Range    X C B  Description 
+	 * -----------------------  - - -  ---------------------------------- 
+	 * 0x00000000 - 0x00003fff  N Y Y  SDRAM 
+	 * 0x00004000 - 0x000fffff  N Y N  Boot ROM
+	 * 0x00100000 - 0x01ffffff  N N N  Application Flash
+	 * 0x04000000 - 0x05ffffff  N N N  Exp Application Flash
+	 * 0x08000000 - 0x080fffff  N N N  I/O baseboard registers
+	 * 0x0a000000 - 0x0a0fffff  N N N  SRAM
+	 * 0x40000000 - 0x480fffff  N N N  Processor Registers
+	 * 0xa0000000 - 0xa000ffff  N Y N  RedBoot SDRAM 
+	 * 0xa0017000 - 0xa3ffffff  Y Y Y  SDRAM
+	 * 0xc0000000 - 0xcfffffff  Y Y Y  Cache Flush Region 
+	 * (done by this routine)
+	 * 0xfd000000 - 0xfd0000ff  N N N  I/O baseboard registers
+	 * 0xfd100000 - 0xfd2fffff  N N N  Processor Registers.
+	 * 0xfd200000 - 0xfd2fffff  N N N  0x10800000 registers
+	 *
+	 * The first level page table is at 0xa0004000.  There are also
+	 * 2 second-level tables at 0xa0008000 and 0xa0008400.
+	 *
+	 */
+
+	{
+		/*
+		 * Tweak RedBoot's pagetable so that we can access to
+		 * some registers at same VA before and after installing 
+		 * our page table. 
+		 */
+		paddr_t ttb = (paddr_t)read_ttb();
+
+		map_io_area(ttb);
+		cpu_tlb_flushD();
+	}
+
+	/* setup GPIO for BTUART, in case bootloader doesn't take care of it */
+	pxa2x0_gpio_bootstrap(LUBBOCK_GPIO_VBASE);
+#if 0
+	pxa2x0_gpio_set_function(42, GPIO_ALT_FN_1_IN);
+	pxa2x0_gpio_set_function(43, GPIO_ALT_FN_2_OUT);
+	pxa2x0_gpio_set_function(44, GPIO_ALT_FN_1_IN);
+	pxa2x0_gpio_set_function(45, GPIO_ALT_FN_2_OUT);
+
+	/* FFUART */
+	pxa2x0_gpio_set_function(34, GPIO_ALT_FN_1_IN);
+	pxa2x0_gpio_set_function(39, GPIO_ALT_FN_2_OUT);
+	pxa2x0_gpio_set_function(35, GPIO_ALT_FN_1_IN);
+	pxa2x0_gpio_set_function(40, GPIO_ALT_FN_2_OUT);
+	pxa2x0_gpio_set_function(41, GPIO_ALT_FN_2_OUT);
+#endif
+
+#if 1
+	/* turn on clock to UART block.
+	   XXX: this should not be done here. */
+	ioreg_write(LUBBOCK_CLKMAN_VBASE+CLKMAN_CKEN, CKEN_FFUART|CKEN_BTUART |
+	    ioreg_read(LUBBOCK_CLKMAN_VBASE+CLKMAN_CKEN));
+#endif
+
+	green_on(0);
+
+	LEDSTEP();
+
+	tmp_bs_tag = pxa2x0_bs_tag;
+	tmp_bs_tag.bs_map = bootstrap_bs_map;
+	map_func_save = pxa2x0_a4x_bs_tag.bs_map;
+	pxa2x0_a4x_bs_tag.bs_map = bootstrap_bs_map;
+
+	LEDSTEP();
+
+
+	consinit();
+	sysprobe();
+	LEDSTEP();
+#ifdef KGDB
+	kgdb_port_init();
+	LEDSTEP();
+#endif
+
+
+	/* Talk to the user */
+	printf("\nOpenBSD/zaurus booting ...\n");
+
+	/* Tweak memory controller */
+	{
+		/* Modify access timing for CS3 (91c96) */
+
+		uint32_t tmp = 
+			ioreg_read(PXA2X0_MEMCTL_BASE+MEMCTL_MSC1);
+		ioreg_write(PXA2X0_MEMCTL_BASE+MEMCTL_MSC1,
+			     (tmp & 0xffff) | (0x3881<<16));
+		/* RRR=3, RDN=8, RDF=8
+		 * XXX: can be faster?
+		 */
+	}
+
+
+	/* Initialize for PCMCIA/CF sockets */
+	{
+		uint32_t tmp;
+
+		/* Activate two sockets.
+		   XXX: This code segment should be moved to
+		        pcmcia MD attach routine.
+		   XXX: These bits should be toggled based on
+		        existene of PCMCIA/CF cards
+		*/
+		ioreg_write(PXA2X0_MEMCTL_BASE+MEMCTL_MECR,
+			     MECR_NOS|MECR_CIT);
+
+		tmp = ioreg_read(LUBBOCK_SACC_PBASE+SACCSBI_SKCR);
+		ioreg_write(LUBBOCK_SACC_PBASE+SACCSBI_SKCR,
+			     (tmp & ~(1<<4)) | (1<<0));
+	}
+
+#if 0
+	/*
+	 * Examine the boot args string for options we need to know about
+	 * now.
+	 */
+	process_kernel_args((char *)nwbootinfo.bt_args);
+#else
+	boothowto = RB_AUTOBOOT;
+#endif
+#ifdef RAMDISK_HOOKS
+        boothowto |= RB_DFLTROOT;
+#endif /* RAMDISK_HOOKS */
+
+
+	{
+		int processor_card_id;
+
+		processor_card_id = 0x000f & 
+			ioreg_read(LUBBOCK_OBIO_VBASE+LUBBOCK_MISCRD);
+		switch(processor_card_id){
+		case 0:
+			/* Cotulla */
+			memstart = 0xa0000000;
+			memsize =  0x02000000; /* 32MB -phone */ 
+			memsize =  0x04000000; /* 64MB */
+			break;
+		case 1:
+			/* XXX: Sabiani */
+			memstart = 0xa0000000;
+			memsize = 0x04000000; /* 64MB */
+			break;
+		default:
+			/* XXX: Unknown  */
+			memstart = 0xa0000000;
+			memsize = 0x04000000; /* 64MB */
+		}
+	}
+
+#if 0
+	{
+		volatile int *p;
+		char *membase;
+		char *memmax;
+		int  chunksize = 0x02000000;
+		printf("probing memory");
+
+		membase = (char *)0xa0000000;
+		memmax  = (char *)0xc0000000;
+		for (p = (int *)membase;
+		    p < (int *)memmax;
+		    p = (int *) (((char *)p) + chunksize)) {
+			printf ("cbase %p\n", p);
+			p[0] = 0x12345678;
+			p[1] = 0x12345678;
+			if ((p[0] != 0x12345678) || (p[1] != 0x12345678))
+				break;
+		}
+			memsize = ((char *)p) - membase;
+
+		printf("probing memory done found memsize %d\n", memsize);
+	}
+#else
+#endif
+
+#define DEBUG
+#ifdef DEBUG
+	printf("initarm: Configuring system ...\n");
+#endif
+
+	/* Fake bootconfig structure for the benefit of pmap.c */
+	/* XXX must make the memory description h/w independant */
+	bootconfig.dramblocks = 1;
+	bootconfig.dram[0].address = memstart;
+	bootconfig.dram[0].pages = memsize / PAGE_SIZE;
+
+	/*
+	 * Set up the variables that define the availablilty of
+	 * physical memory.  For now, we're going to set
+	 * physical_freestart to 0xa0200000 (where the kernel
+	 * was loaded), and allocate the memory we need downwards.
+	 * If we get too close to the page tables that RedBoot
+	 * set up, we will panic.  We will update physical_freestart
+	 * and physical_freeend later to reflect what pmap_bootstrap()
+	 * wants to see.
+	 *
+	 * XXX pmap_bootstrap() needs an enema.
+	 */
+	physical_start = bootconfig.dram[0].address;
+	physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
+
+	physical_freestart = 0xa0009000UL;
+	physical_freeend = 0xa0200000UL;
+
+	physmem = (physical_end - physical_start) / PAGE_SIZE;
+
+#ifdef DEBUG
+	/* Tell the user about the memory */
+	printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
+	    physical_start, physical_end - 1);
+#endif
+
+	/*
+	 * Okay, the kernel starts 2MB in from the bottom of physical
+	 * memory.  We are going to allocate our bootstrap pages downwards
+	 * from there.
+	 *
+	 * We need to allocate some fixed page tables to get the kernel
+	 * going.  We allocate one page directory and a number of page
+	 * tables and store the physical addresses in the kernel_pt_table
+	 * array.
+	 *
+	 * The kernel page directory must be on a 16K boundary.  The page
+	 * tables must be on 4K bounaries.  What we do is allocate the
+	 * page directory on the first 16K boundary that we encounter, and
+	 * the page tables on 4K boundaries otherwise.  Since we allocate
+	 * at least 3 L2 page tables, we are guaranteed to encounter at
+	 * least one 16K aligned region.
+	 */
+
+#ifdef VERBOSE_INIT_ARM
+	printf("Allocating page tables\n");
+#endif
+
+	free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
+
+#ifdef VERBOSE_INIT_ARM
+	printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
+	       physical_freestart, free_pages, free_pages);
+#endif
+
+	/* Define a macro to simplify memory allocation */
+#define	valloc_pages(var, np)				\
+	alloc_pages((var).pv_pa, (np));			\
+	(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
+
+#define alloc_pages(var, np)				\
+	physical_freeend -= ((np) * PAGE_SIZE);		\
+	if (physical_freeend < physical_freestart)	\
+		panic("initarm: out of memory");	\
+	(var) = physical_freeend;			\
+	free_pages -= (np);				\
+	memset((char *)(var), 0, ((np) * PAGE_SIZE));
+
+	loop1 = 0;
+	kernel_l1pt.pv_pa = 0;
+	for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
+		/* Are we 16KB aligned for an L1 ? */
+		if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
+		    && kernel_l1pt.pv_pa == 0) {
+			valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
+		} else {
+			valloc_pages(kernel_pt_table[loop1],
+			    L2_TABLE_SIZE / PAGE_SIZE);
+			++loop1;
+		}
+	}
+
+	/* This should never be able to happen but better confirm that. */
+	if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
+		panic("initarm: Failed to align the kernel page directory");
+
+	LEDSTEP();
+
+	/*
+	 * Allocate a page for the system page mapped to V0x00000000
+	 * This page will just contain the system vectors and can be
+	 * shared by all processes.
+	 */
+	alloc_pages(systempage.pv_pa, 1);
+
+	/* Allocate stacks for all modes */
+	valloc_pages(irqstack, IRQ_STACK_SIZE);
+	valloc_pages(abtstack, ABT_STACK_SIZE);
+	valloc_pages(undstack, UND_STACK_SIZE);
+	valloc_pages(kernelstack, UPAGES);
+
+	/* Allocate enough pages for cleaning the Mini-Data cache. */
+	KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
+	valloc_pages(minidataclean, 1);
+
+#ifdef VERBOSE_INIT_ARM
+	printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
+	    irqstack.pv_va); 
+	printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
+	    abtstack.pv_va); 
+	printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
+	    undstack.pv_va); 
+	printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
+	    kernelstack.pv_va); 
+#endif
+
+	/*
+	 * XXX Defer this to later so that we can reclaim the memory
+	 * XXX used by the RedBoot page tables.
+	 */
+	alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
+
+	/*
+	 * Ok we have allocated physical pages for the primary kernel
+	 * page tables
+	 */
+
+#ifdef VERBOSE_INIT_ARM
+	printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
+#endif
+
+	/*
+	 * Now we start construction of the L1 page table
+	 * We start by mapping the L2 page tables into the L1.
+	 * This means that we can replace L1 mappings later on if necessary
+	 */
+	l1pagetable = kernel_l1pt.pv_pa;
+
+	/* Map the L2 pages tables in the L1 page table */
+	pmap_link_l2pt(l1pagetable, 0x00000000,
+	    &kernel_pt_table[KERNEL_PT_SYS]);
+
+	for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
+		pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
+		    &kernel_pt_table[KERNEL_PT_KERNEL + loop]);
+
+	for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
+		pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
+		    &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
+
+	/* update the top of the kernel VM */
+	pmap_curmaxkvaddr =
+	    KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
+
+#ifdef VERBOSE_INIT_ARM
+	printf("Mapping kernel\n");
+#endif
+
+	/* Now we fill in the L2 pagetable for the kernel static code/data */
+	{
+		extern char etext[], _end[];
+		size_t textsize = (u_int32_t) etext - KERNEL_TEXT_BASE;
+		size_t totalsize = (u_int32_t) _end - KERNEL_TEXT_BASE;
+		u_int logical;
+
+		textsize = (textsize + PGOFSET) & ~PGOFSET;
+		totalsize = (totalsize + PGOFSET) & ~PGOFSET;
+		
+		logical = 0x00200000;	/* offset of kernel in RAM */
+
+		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
+		    physical_start + logical, textsize,
+		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+		logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
+		    physical_start + logical, totalsize - textsize,
+		    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+	}
+
+#ifdef VERBOSE_INIT_ARM
+	printf("Constructing L2 page tables\n");
+#endif
+
+	/* Map the stack pages */
+	pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
+	    IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+	pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
+	    ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+	pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
+	    UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+	pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
+	    UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
+
+	pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
+	    L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
+
+	for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
+		pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
+		    kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
+		    VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
+	}
+
+	/* Map the Mini-Data cache clean area. */
+	xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
+	    minidataclean.pv_pa);
+
+	/* Map the vector page. */
+#if 1
+	/* MULTI-ICE requires that page 0 is NC/NB so that it can download the
+	 * cache-clean code there.  */
+	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
+	    VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
+#else
+	pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
+	    VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+#endif
+
+	/*
+	 * map integrated peripherals at same address in l1pagetable
+	 * so that we can continue to use console.
+	 */
+	copy_io_area_map((pd_entry_t *)l1pagetable);
+
+	/*
+	 * Give the XScale global cache clean code an appropriately
+	 * sized chunk of unmapped VA space starting at 0xff000000
+	 * (our device mappings end before this address).
+	 */
+	xscale_cache_clean_addr = 0xff000000U;
+
+	/*
+	 * Now we have the real page tables in place so we can switch to them.
+	 * Once this is done we will be running with the REAL kernel page
+	 * tables.
+	 */
+
+	/*
+	 * Update the physical_freestart/physical_freeend/free_pages
+	 * variables.
+	 */
+	{
+		extern char _end[];
+
+		physical_freestart = physical_start +
+		    (((((u_int32_t) _end) + PGOFSET) & ~PGOFSET) -
+		     KERNEL_BASE);
+		physical_freeend = physical_end;
+		free_pages =
+		    (physical_freeend - physical_freestart) / PAGE_SIZE;
+	}
+
+	/* be a client to all domains */
+	cpu_domains(0x55555555);
+	/* Switch tables */
+#ifdef VERBOSE_INIT_ARM
+	printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
+	       physical_freestart, free_pages, free_pages);
+	printf("switching to new L1 page table  @%#lx...", kernel_l1pt.pv_pa);
+#endif
+
+	LEDSTEP();
+
+	/* set new intc register address so that splfoo() doesn't
+	   touch illegal address.  */
+	pxa2x0_intr_bootstrap(LUBBOCK_INTCTL_VBASE);
+
+	LEDSTEP();
+
+	cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
+	setttb(kernel_l1pt.pv_pa);
+	cpu_tlb_flushID();
+	cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
+	LEDSTEP();
+
+	/*
+	 * Moved from cpu_startup() as data_abort_handler() references
+	 * this during uvm init
+	 */
+	proc0paddr = (struct user *)kernelstack.pv_va;
+	proc0.p_addr = proc0paddr;
+
+#ifdef VERBOSE_INIT_ARM
+	printf("bootstrap done.\n");
+#endif
+
+        if (boothowto & RB_CONFIG) {
+#ifdef BOOT_CONFIG
+		user_config();
+#else
+		printf("kernel does not support -c; continuing..\n");
+#endif
+							}
+
+
+	arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
+
+	/*
+	 * Pages were allocated during the secondary bootstrap for the
+	 * stacks for different CPU modes.
+	 * We must now set the r13 registers in the different CPU modes to
+	 * point to these stacks.
+	 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
+	 * of the stack memory.
+	 */
+#ifdef VERBOSE_INIT_ARM
+	printf("init subsystems: stacks ");
+#endif
+
+	set_stackptr(PSR_IRQ32_MODE,
+	    irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
+	set_stackptr(PSR_ABT32_MODE,
+	    abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
+	set_stackptr(PSR_UND32_MODE,
+	    undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
+
+	/*
+	 * Well we should set a data abort handler.
+	 * Once things get going this will change as we will need a proper
+	 * handler.
+	 * Until then we will use a handler that just panics but tells us
+	 * why.
+	 * Initialisation of the vectors will just panic on a data abort.
+	 * This just fills in a slighly better one.
+	 */
+#ifdef VERBOSE_INIT_ARM
+	printf("vectors ");
+#endif
+	data_abort_handler_address = (u_int)data_abort_handler;
+	prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
+	undefined_handler_address = (u_int)undefinedinstruction_bounce;
+
+	/* Initialise the undefined instruction handlers */
+#ifdef VERBOSE_INIT_ARM
+	printf("undefined ");
+#endif
+	undefined_init();
+
+	/* Load memory into UVM. */
+#ifdef VERBOSE_INIT_ARM
+	printf("page ");
+#endif
+	uvm_setpagesize();        /* initialize PAGE_SIZE-dependent variables */
+	uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
+	    atop(physical_freestart), atop(physical_freeend),
+	    VM_FREELIST_DEFAULT);
+
+	/* Boot strap pmap telling it where the kernel page table is */
+#ifdef VERBOSE_INIT_ARM
+	printf("pmap ");
+#endif
+	LEDSTEP();
+	pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, KERNEL_VM_BASE,
+	    KERNEL_VM_BASE + KERNEL_VM_SIZE);
+	LEDSTEP();
+
+#ifdef __HAVE_MEMORY_DISK__
+	md_root_setconf(memory_disk, sizeof memory_disk);
+#endif
+
+#if 0
+	/* XXX - drahn */
+	{
+		uint16_t sw = ioreg16_read(LUBBOCK_OBIO_VBASE+LUBBOCK_USERSW);
+
+		if (0 == (sw & (1<<13))) /* check S19 */
+			boothowto |= RB_KDB;
+		if (0 == (sw & (1<<12))) /* S20 */
+			boothowto |= RB_SINGLE;
+	}
+#endif
+
+	LEDSTEP();
+
+#ifdef IPKDB
+	/* Initialise ipkdb */
+	ipkdb_init();
+	if (boothowto & RB_KDB)
+		ipkdb_connect(0);
+#endif
+
+#ifdef KGDB
+	if (boothowto & RB_KDB) {
+		kgdb_debug_init = 1;
+		kgdb_connect(1);
+	}
+#endif
+
+#ifdef DDB
+	db_machine_init();
+
+	/* Firmware doesn't load symbols. */
+	ddb_init();
+
+	if (boothowto & RB_KDB)
+		Debugger();
+#endif
+
+	pxa2x0_a4x_bs_tag.bs_map = map_func_save ;
+
+	/* We return the new stack pointer address */
+	return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
+}
+
+#if 0
+void
+process_kernel_args(char *args)
+{
+
+	boothowto = 0;
+
+	/* Make a local copy of the bootargs */
+	strncpy(bootargs, args, MAX_BOOT_STRING);
+
+	args = bootargs;
+	boot_file = bootargs;
+
+	/* Skip the kernel image filename */
+	while (*args != ' ' && *args != 0)
+		++args;
+
+	if (*args != 0)
+		*args++ = 0;
+
+	while (*args == ' ')
+		++args;
+
+	boot_args = args;
+
+	printf("bootfile: %s\n", boot_file);
+	printf("bootargs: %s\n", boot_args);
+
+	parse_mi_bootargs(boot_args);
+}
+#endif
+
+#ifdef KGDB
+#ifndef KGDB_DEVNAME
+#define KGDB_DEVNAME "ffuart"
+#endif
+const char kgdb_devname[] = KGDB_DEVNAME;
+
+#if (NCOM > 0)
+#ifndef KGDB_DEVMODE
+#define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
+#endif
+int comkgdbmode = KGDB_DEVMODE;
+#endif /* NCOM */
+
+#endif /* KGDB */
+
+
+void
+consinit(void)
+{
+	static int consinit_called = 0;
+	uint32_t ckenreg = ioreg_read(LUBBOCK_CLKMAN_VBASE+CLKMAN_CKEN);
+#if 0
+	char *console = CONSDEVNAME;
+#endif
+
+	if (consinit_called != 0)
+		return;
+
+	consinit_called = 1;
+
+#if NCOM > 0
+
+#ifdef FFUARTCONSOLE
+	/* Check switch. */
+	/*
+	if (0 == (ioreg_read(LUBBOCK_OBIO_VBASE+LUBBOCK_USERSW) & (1<<15))) {
+	*/
+	if (0) {
+		/* We don't use FF serial when S17=no-dot position */
+	}
+#ifdef KGDB
+	else if (0 == strcmp(kgdb_devname, "ffuart")) {
+		/* port is reserved for kgdb */
+	}
+#endif
+	else if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_FFUART_BASE, 
+		     comcnspeed, PXA2X0_COM_FREQ, comcnmode)) {
+#if 0
+		/* XXX: can't call pxa2x0_clkman_config yet */
+		pxa2x0_clkman_config(CKEN_FFUART, 1);
+#else
+		ioreg_write(LUBBOCK_CLKMAN_VBASE+CLKMAN_CKEN,
+		    ckenreg|CKEN_FFUART);
+#endif
+
+		return;
+	}
+#endif /* FFUARTCONSOLE */
+
+#ifdef BTUARTCONSOLE
+#ifdef KGDB
+	if (0 == strcmp(kgdb_devname, "btuart")) {
+		/* port is reserved for kgdb */
+	} else
+#endif
+	if (0 == comcnattach(&pxa2x0_a4x_bs_tag, PXA2X0_BTUART_BASE,
+		comcnspeed, PXA2X0_COM_FREQ, comcnmode)) {
+		ioreg_write(LUBBOCK_CLKMAN_VBASE+CLKMAN_CKEN,
+		    ckenreg|CKEN_BTUART);
+		return;
+	}
+#endif /* BTUARTCONSOLE */
+
+
+#endif /* NCOM */
+
+}
+
+#ifdef KGDB
+void
+kgdb_port_init(void)
+{
+#if (NCOM > 0) && defined(COM_PXA2X0)
+	paddr_t paddr = 0;
+	enum pxa2x0_uart_id uart_id;
+	uint32_t ckenreg = ioreg_read(LUBBOCK_CLKMAN_VBASE+CLKMAN_CKEN);
+
+	if (0 == strcmp(kgdb_devname, "ffuart")) {
+		paddr = PXA2X0_FFUART_BASE;
+		clenreg |= CKEN_FFUART;
+	}
+	else if (0 == strcmp(kgdb_devname, "btuart")) {
+		paddr = PXA2X0_BTUART_BASE;
+		clenreg |= CKEN_BTUART;
+	}
+
+	if (paddr &&
+	    0 == com_kgdb_attach_pxa2x0(&pxa2x0_a4x_bs_tag, paddr,
+		kgdb_rate, PXA2X0_COM_FREQ, COM_TYPE_PXA2x0, comkgdbmode)) {
+
+		ioreg_write(LUBBOCK_CLKMAN_VBASE+CLKMAN_CKEN, ckenreg);
+	}
+#endif
+}
+#endif
+
+#if 0
+/*
+ * display a number in hex LED.
+ * a digit is blank when the corresponding bit in arg blank is 1
+ */
+unsigned short led_control_value = 0;
+
+void
+hex_led_blank(uint32_t value, int blank)
+{
+	int save = disable_interrupts(I32_bit);
+
+	ioreg_write(LUBBOCK_OBIO_VBASE+0x10, value);
+	led_control_value = (led_control_value & 0xff)
+		| ((blank & 0xff)<<8);
+	ioreg_write(LUBBOCK_OBIO_VBASE+0x40, led_control_value);
+	restore_interrupts(save);
+}
+#endif
+
+/*
+ * Cotulla's integrated ICU doesn't have IRQ0..7, so
+ * we map software interrupts to bit 0..3
+ */
+#define SI_TO_IRQBIT(si)  (1U<<(si))
+
+void
+pxa2x0_setipl(int new)
+{
+	current_spl_level = new;
+	intr_mask = pxa2x0_imask[current_spl_level];
+	write_icu( SAIPIC_MR, intr_mask );
+}
+
+
+void
+pxa2x0_splx(int new)
+{
+	int psw;
+
+	psw = disable_interrupts(I32_bit);
+	pxa2x0_setipl(new);
+	restore_interrupts(psw);
+
+	/* If there are software interrupts to process, do it. */
+	if (softint_pending & intr_mask)
+		pxa2x0_do_pending();
+}
+
+
+int
+pxa2x0_splraise(int ipl)
+{
+	int	old, psw;
+
+	old = current_spl_level;
+	if( ipl > current_spl_level ){
+		psw = disable_interrupts(I32_bit);
+		pxa2x0_setipl(ipl);
+		restore_interrupts(psw);
+	}
+
+	return (old);
+}
+
+int
+pxa2x0_spllower(int ipl)
+{
+	int old = current_spl_level;
+	int psw = disable_interrupts(I32_bit);
+	pxa2x0_splx(ipl);
+	restore_interrupts(psw);
+	return(old);
+}
+
+void
+pxa2x0_setsoftintr(int si)
+{
+	#if 0
+	atomic_set_bit( (u_int *)&softint_pending, SI_TO_IRQBIT(si) );
+	#else
+		softint_pending |=  SI_TO_IRQBIT(si);
+	#endif
+
+	/* Process unmasked pending soft interrupts. */
+	if ( softint_pending & intr_mask )
+		pxa2x0_do_pending();
+}
diff --git a/sys/arch/zaurus/zaurus/zaurus_reg.h b/sys/arch/zaurus/zaurus/zaurus_reg.h
new file mode 100644
index 00000000000..d40043cf7c8
--- /dev/null
+++ b/sys/arch/zaurus/zaurus/zaurus_reg.h
@@ -0,0 +1,96 @@
+/*	$NetBSD: lubbock_reg.h,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef _EVBARM_LUBBOCK_REG_H
+#define _EVBARM_LUBBOCK_REG_H
+
+#include <arm/xscale/pxa2x0reg.h>
+
+/* lubbock on-board IOs */
+#define LUBBOCK_OBIO_PBASE PXA2X0_CS2_START /* Physical address */
+#define LUBBOCK_OBIO_SIZE  0x00000100
+
+#define LUBBOCK_SRAM_PBASE (PXA2X0_CS2_START+0x02000000)
+#define LUBBOCK_SRAM_SIZE  0x00100000
+
+#define LUBBOCK_91C96_PBASE PXA2X0_CS3_START
+#define LUBBOCK_91C96_IO	LUBBOCK_91C96_PBASE
+#define LUBBOCK_91C96_ATTRMEM	(LUBBOCK_91C96_PBASE+0x02000000)
+
+
+/* SA-1111 companion chip registers */
+#define LUBBOCK_SACC_PBASE PXA2X0_CS4_START
+
+/*
+ * Logical mapping for onboard/integrated peripherals
+ */
+#define	LUBBOCK_IO_AREA_VBASE	0xfd000000
+#define LUBBOCK_OBIO_VBASE	0xfd000000
+#define LUBBOCK_GPIO_VBASE	0xfd100000
+#define LUBBOCK_CLKMAN_VBASE 	0xfd200000
+#define LUBBOCK_INTCTL_VBASE 	0xfd300000
+#define LUBBOCK_AGPIO_VBASE	0xfd400000
+#define LUBBOCK_VBASE_FREE	0xfd500000
+/* FFUART and/or BTUART are mapped to this area when
+   used for console or kgdb port */
+
+/*
+ * Onboard register address
+ * (offset from LUBBOCK_OBIO_PBASE)
+ */
+#define LUBBOCK_SYSTEMID	0x0000
+#define LUBBOCK_HEXLED  	0x0010
+#define LUBBOCK_LEDCTL		0x0040
+#define LUBBOCK_CONFIGSW	0x0050
+#define LUBBOCK_USERSW		0x0060
+#define LUBBOCK_MISCWR		0x0080
+#define  MISCWR_S1PWR	 	(3U<<14)
+#define  MISCWR_LCDDISP		(1U<<8)
+#define  MISCWR_IRDAMODE	(1U<<4)	/* 1=FIR, 0=SIR */
+#define  MISCWR_GREENLED	(1U<<3)
+#define  MISCWR_ENETEN16	(1U<<2)
+#define  MISCWR_PCRESET		(1U<<1)	/* Processor card reset */
+#define  MSICWR_SYSRESET	(1U<<0)
+#define LUBBOCK_MISCRD		0x0090
+#define LUBBOCK_INTRMASK	0x00c0
+#define LUBBOCK_INTRCTL		0x00d0
+
+#define ioreg_read(a)  (*(volatile unsigned *)(a))
+#define ioreg_write(a,v)  (*(volatile unsigned *)(a)=(v))
+
+#define ioreg16_read(a)  (*(volatile uint16_t *)(a))
+#define ioreg16_write(a,v)  (*(volatile uint16_t *)(a)=(v))
+
+#define ioreg8_read(a)  (*(volatile uint8_t *)(a))
+#define ioreg8_write(a,v)  (*(volatile uint8_t *)(a)=(v))
+
+#endif /* _EVBARM_LUBBOCK_REG_H */
diff --git a/sys/arch/zaurus/zaurus/zaurus_start.S b/sys/arch/zaurus/zaurus/zaurus_start.S
new file mode 100644
index 00000000000..695e0a5fc40
--- /dev/null
+++ b/sys/arch/zaurus/zaurus/zaurus_start.S
@@ -0,0 +1,174 @@
+/*	$NetBSD: lubbock_start.S,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <arm/armreg.h>
+#include <arm/pte.h>
+#include <arm/pmap.h>		/* for PMAP_DOMAIN_KERNEL */
+
+#ifndef SDRAM_START
+#define SDRAM_START	0xa0000000
+#endif
+
+/*
+ * CPWAIT -- Canonical method to wait for CP15 update.
+ * NOTE: Clobbers the specified temp reg.
+ * copied from arm/arm/cpufunc_asm_xscale.S
+ * XXX: better be in a common header file.
+ */
+#define	CPWAIT_BRANCH							 \
+	sub	pc, pc, #4
+
+#define	CPWAIT(tmp)							 \
+	mrc	p15, 0, tmp, c2, c0, 0	/* arbitrary read of CP15 */	;\
+	mov	tmp, tmp		/* wait for it to complete */	;\
+	CPWAIT_BRANCH			/* branch to next insn */
+	
+/*
+ * Kernel start routine for DBPXA250 (Lubbock)
+ * this code is excuted at the very first after the kernel is loaded
+ * by RedBoot.
+ */
+	.text
+
+	.global	_C_LABEL(zaurus_start)
+_C_LABEL(zaurus_start):
+	/* Are we running on ROM ? */
+	cmp     pc, #0x06000000
+	bhi     zaurus_start_ram
+
+	/* move me to RAM
+	 * XXX: we can use memcpy if it is PIC
+	 */
+	ldr r1, Lcopy_size
+	adr r0, _C_LABEL(zaurus_start)
+	add r1, r1, #3
+	mov r1, r1, LSR #2
+	mov r2, #SDRAM_START
+	add r2, r2, #0x00200000
+	mov r4, r2
+
+5:	ldr r3,[r0],#4
+	str r3,[r2],#4
+	subs r1,r1,#1
+	bhi 5b
+
+	cmp	pc, r5
+	/* Jump to RAM */
+	ldr r0, Lstart_off
+
+	blo 1f
+	/* if we were running out of virtual mapped space, disable mmu */
+	mov	r2, #0
+	mov     r1, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
+	mcr     15, 0, r1, c1, c0, 0
+	mcrne   15, 0, r2, c8, c7, 0    /* nail I+D TLB on ARMv4 and greater */
+	
+1:
+	add pc, r4, r0
+
+Lcopy_size:	.word _edata-_C_LABEL(zaurus_start)
+Lstart_off:	.word zaurus_start_ram-_C_LABEL(zaurus_start)
+
+zaurus_start_ram:	
+	/*
+	 *  Kernel is loaded in SDRAM (0xa0200000..), and is expected to run
+	 *  in VA 0xc0200000..  
+	 */
+
+	mrc	p15, 0, r0, c2, c0, 0		/* get ttb prepared by redboot */
+	adr	r4, mmu_init_table2
+	
+#define BUILD_STARTUP_PAGETABLE
+#ifdef BUILD_STARTUP_PAGETABLE
+	mrc	p15, 0, r2, c1, c0, 0
+	mov	r2, #0
+	tst	r2, #CPU_CONTROL_MMU_ENABLE		/* we already have a page table? */
+	bne	3f
+
+	/* build page table from scratch */
+	ldr	r0, Lstartup_pagetable
+	adr	r4, mmu_init_table
+	b	3f
+
+2:
+	str	r3, [r0, r2]
+	add	r2, r2, #4
+	add	r3, r3, #(L1_S_SIZE)
+	adds	r1, r1, #-1
+	bhi	2b
+3:	
+	ldmia	r4!, {r1,r2,r3}   /* # of sections, PA|attr, VA */
+	cmp	r1, #0
+	bne	2b	
+#endif
+
+	mcr	p15, 0, r0, c2, c0, 0	/* Set TTB */
+	mcr	p15, 0, r0, c8, c7, 0	/* Flush TLB */
+
+	/* Set the Domain Access register.  Very important! */
+        mov     r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
+	mcr	p15, 0, r0, c3, c0, 0
+
+	/* Enable MMU */
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #CPU_CONTROL_MMU_ENABLE
+	mcr	p15, 0, r0, c1, c0, 0
+	CPWAIT(r0)
+
+	/* Jump to kernel code in TRUE VA */
+	adr	r0, Lstart
+	ldr	pc, [r0]
+
+Lstart:
+	.word	start
+
+#define MMU_INIT(va,pa,n_sec,attr) \
+	.word	n_sec					    ; \
+	.word	4*((va)>>L1_S_SHIFT)			    ; \
+	.word	(pa)|(attr)				    ;
+	
+#ifdef BUILD_STARTUP_PAGETABLE
+#ifndef STARTUP_PAGETABLE_ADDR
+#define STARTUP_PAGETABLE_ADDR 0xa0004000
+#endif
+Lstartup_pagetable:	.word	STARTUP_PAGETABLE_ADDR
+mmu_init_table:	
+	/* fill all table VA==PA */
+	MMU_INIT(0x00000000, 0x00000000, 1<<(32-L1_S_SHIFT), L1_TYPE_S|L1_S_AP(AP_KRW))
+	/* map SDRAM VA==PA, WT cacheable */
+	MMU_INIT(SDRAM_START, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
+#endif
+mmu_init_table2:	
+	/* map VA 0xc0000000..0xc3ffffff to PA 0xa0000000..0xa3ffffff */
+	MMU_INIT(0xc0000000, SDRAM_START, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
+
+	.word 0	/* end of table */
diff --git a/sys/arch/zaurus/zaurus/zaurus_var.h b/sys/arch/zaurus/zaurus/zaurus_var.h
new file mode 100644
index 00000000000..4455328bf36
--- /dev/null
+++ b/sys/arch/zaurus/zaurus/zaurus_var.h
@@ -0,0 +1,100 @@
+/*	$NetBSD: lubbock_var.h,v 1.1 2003/06/18 10:51:15 bsh Exp $ */
+
+/*
+ * Copyright (c) 2002, 2003  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _EVBARM_LUBBOCK_VAR_H
+#define _EVBARM_LUBBOCK_VAR_H
+
+#include <sys/conf.h>
+#include <sys/device.h>
+
+#include <machine/bus.h>
+#include <machine/zaurus_reg.h>
+
+
+/* 
+ * Lubbock on-board IO bus
+ */
+#define N_OBIO_IRQ  8
+
+struct obio_softc {
+	struct device sc_dev;
+	bus_space_tag_t sc_iot;
+	bus_space_handle_t sc_obioreg_ioh;
+	void	*sc_ih;		/* interrupt handler for obio on pxaip */
+	void	*sc_si;		/* software interrupt handler */
+	int	sc_intr;
+	int	sc_obio_intr_mask;
+	int	sc_obio_intr_pending;
+	int	sc_ipl;		/* Max ipl among sub interrupts */
+	struct obio_handler {
+		int	(* func)(void *);
+		void	*arg;
+		int	level;
+	} sc_handler[N_OBIO_IRQ];
+};
+
+typedef void *obio_chipset_tag_t;
+
+struct obio_attach_args {
+	obio_chipset_tag_t	oba_sc;		
+	bus_space_tag_t		oba_iot; 	/* Bus tag */
+	bus_addr_t		oba_addr;	/* i/o address  */
+	int			oba_intr;
+};
+
+/* on-board hex LED */
+void hex_led_blank( uint32_t value, int blank );
+#define hex_led(value) ioreg_write( LUBBOCK_OBIO_VBASE+LUBBOCK_HEXLED, (value) )
+#define hex_led_p(value) ioreg_write( LUBBOCK_OBIO_PBASE+LUBBOCK_HEXLED, (value) )
+
+#define d_led(value) ioreg16_write( LUBBOCK_OBIO_VBASE+LUBBOCK_LEDCTL, (value) )
+
+/*
+ * IRQ handler
+ */
+void *obio_intr_establish(struct obio_softc *, int, int, int (*)(void *), void *);
+void obio_intr_disestablish(void *);
+
+#define obio_read(offset)  ioreg_read(LUBBOCK_OBIO_VBASE+(offset))
+#define obio_write(offset,value)  \
+	ioreg_write(LUBBOCK_OBIO_VBASE+(offset), (value))
+
+
+#define obio16_read(offset)  ioreg16_read(LUBBOCK_OBIO_VBASE+(offset))
+#define obio16_write(offset,value)  \
+	ioreg16_write(LUBBOCK_OBIO_VBASE+(offset), (value))
+
+#define obio8_read(offset)  ioreg8_read(LUBBOCK_OBIO_VBASE+(offset))
+#define obio8_write(offset,value)  \
+	ioreg8_write(LUBBOCK_OBIO_VBASE+(offset), (value))
+
+
+#endif /* _EVBARM_LUBBOCK_VAR_H */