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authorNiklas Hallqvist <niklas@cvs.openbsd.org>1996-08-19 00:04:16 +0000
committerNiklas Hallqvist <niklas@cvs.openbsd.org>1996-08-19 00:04:16 +0000
commit64a3a0233d870dac5f9a2ddc2b4131d43a891b40 (patch)
tree2a5459a13a84ddf3630886561fa7e65f8a369bb0 /sys/arch
parentd7e0902deeac326c41cce113c644e92ecac84117 (diff)
Merge of Late July NetBSD sources (mostly DRACO support). More to come...
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/amiga/amiga/amiga_init.c53
-rw-r--r--sys/arch/amiga/amiga/autoconf.c18
-rw-r--r--sys/arch/amiga/amiga/drcustom.h14
-rw-r--r--sys/arch/amiga/amiga/locore.s80
-rw-r--r--sys/arch/amiga/amiga/machdep.c151
-rw-r--r--sys/arch/amiga/amiga/sys_machdep.c8
6 files changed, 199 insertions, 125 deletions
diff --git a/sys/arch/amiga/amiga/amiga_init.c b/sys/arch/amiga/amiga/amiga_init.c
index 693cf64c79c..6cdaa6ee485 100644
--- a/sys/arch/amiga/amiga/amiga_init.c
+++ b/sys/arch/amiga/amiga/amiga_init.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: amiga_init.c,v 1.11 1996/05/29 10:14:17 niklas Exp $ */
-/* $NetBSD: amiga_init.c,v 1.41 1996/05/09 20:30:30 is Exp $ */
+/* $OpenBSD: amiga_init.c,v 1.12 1996/08/19 00:04:12 niklas Exp $ */
+/* $NetBSD: amiga_init.c,v 1.41.4.2 1996/06/21 06:45:37 jtc Exp $ */
/*
* Copyright (c) 1994 Michael L. Hitch
@@ -67,7 +67,7 @@ extern u_int lowram;
extern u_int Sysptmap, Sysptsize, Sysseg, Umap, proc0paddr;
extern u_int Sysseg_pa;
extern u_int virtual_avail;
-#ifdef M68040
+#if defined(M68040) || defined(M68060)
extern int protostfree;
#endif
@@ -172,6 +172,7 @@ alloc_z2mem(amount)
* written by Bryan Ford and Niklas Hallqvist.
*
* Very crude 68040 support by Michael L. Hitch.
+ *
*/
int kernel_copyback = 1;
@@ -197,13 +198,16 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
u_int loadbase = 0; /* XXXXXXXXXXXXXXXXXXXXXXXXXXXX */
u_int *shadow_pt = 0; /* XXXXXXXXXXXXXXXXXXXXXXXXXXXX */
+#ifdef DEBUG_KERNEL_START
/* XXX this only is valid if Altais is in slot 0 */
volatile u_int8_t *altaiscolpt = (u_int8_t *)0x200003c8;
volatile u_int8_t *altaiscol = (u_int8_t *)0x200003c9;
+#endif
if ((u_int)&loadbase > cphysize)
loadbase = fphystart;
+#ifdef DEBUG_KERNEL_START
if ((id>>24)==0x7D) {
*altaiscolpt = 0;
*altaiscol = 40;
@@ -211,6 +215,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
*altaiscol = 0;
} else
((volatile struct Custom *)0xdff000)->color[0] = 0xa00; /* RED */
+#endif
RELOC(boot_fphystart, u_long) = fphystart;
RELOC(boot_fphysize, u_long) = fphysize;
@@ -328,7 +333,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
pend = vend + fphystart;
avail -= vstart;
-#ifdef M68040
+#if defined(M68040) || defined(M68060)
if (RELOC(mmutype, int) == MMU_68040)
kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
else
@@ -603,37 +608,21 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
#ifdef DRACO
if ((id >> 24) == 0x7D) {
pg_proto = DRCCBASE | PG_RW | PG_CI | PG_V;
- while (pg_proto < DRCIATOP) {
- if (*pg != PG_NV) {
- *altaiscolpt = 0;
- *altaiscol = 20;
- *altaiscol = 0;
- *altaiscol = 0;
- asm volatile("stop #0x2700"::);
- }
+ while (pg_proto < DRZ2BASE) {
*pg++ = pg_proto;
pg_proto += DRCCSTRIDE;
}
/* NCR 53C710 chip */
- if (*pg != PG_NV) {
- *altaiscolpt = 0;
- *altaiscol = 20;
- *altaiscol = 0;
- *altaiscol = 0;
- asm volatile("stop #0x2700"::);
- }
*pg++ = DRSCSIBASE | PG_RW | PG_CI | PG_V;
- /* XXX Debug Altais register mapping */
- if (*pg != PG_NV) {
- *altaiscolpt = 0;
- *altaiscol = 20;
- *altaiscol = 0;
- *altaiscol = 0;
- asm volatile("stop #0x2700"::);
- }
+#ifdef DEBUG_KERNEL_START
+ /*
+ * early rollcolor Altais mapping
+ * XXX (only works if in slot 0)
+ */
*pg++ = 0x20000000 | PG_RW | PG_CI | PG_V;
+#endif
} else
#endif
{
@@ -793,6 +782,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
*fp++ = *lp++;
}
+#ifdef DEBUG_KERNEL_START
if ((id>>24)==0x7D) {
*altaiscolpt = 0;
*altaiscol = 40;
@@ -800,10 +790,11 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
*altaiscol = 0;
} else
((volatile struct Custom *)0xdff000)->color[0] = 0xAA0; /* YELLOW */
+#endif
/*
* prepare to enable the MMU
*/
-#ifdef M68040
+#if defined(M68040) || defined(M68060)
if (RELOC(mmutype, int) == MMU_68040) {
/*
* movel Sysseg_pa,a0;
@@ -824,6 +815,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
: : "a" (RELOC(Sysseg_pa, u_int)) : "a0");
asm volatile (".word 0xf518" : : );
+#ifdef DEBUG_KERNEL_START
if ((id>>24)==0x7D) {
*altaiscolpt = 0;
*altaiscol = 40;
@@ -831,6 +823,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
*altaiscol = 0;
} else
((volatile struct Custom *)0xdff000)->color[0] = 0xA70; /* ORANGE */
+#endif
asm volatile ("movel #0xc000,d0; .word 0x4e7b,0x0003"
: : :"d0" );
@@ -852,11 +845,12 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
tc = 0x82d08b00;
asm volatile ("pmove %0@,tc" : : "a" (&tc));
}
+#ifdef DEBUG_KERNEL_START
#ifdef DRACO
if ((id >> 24) == 0x7D) { /* mapping on, is_draco() is valid */
int i;
/* XXX experimental Altais register mapping only */
- altaiscolpt = (volatile u_int8_t *)(DRCCADDR+NBPG*8+0x3c8);
+ altaiscolpt = (volatile u_int8_t *)(DRCCADDR+NBPG*9+0x3c8);
altaiscol = altaiscolpt + 1;
for (i=0; i<140000; i++) {
*altaiscolpt = 0;
@@ -867,6 +861,7 @@ start_c(id, fphystart, fphysize, cphysize, esym_addr, flags, inh_sync)
} else
#endif
((volatile struct Custom *)CUSTOMADDR)->color[0] = 0x0a0; /* GREEN */
+#endif
bzero ((u_char *)proc0paddr, USPACE); /* XXXXXXXXXXXXXXXXXXXXX */
pmap_bootstrap(pstart, fphystart); /* XXXXXXXXXXXXXXXXXXXXXXx*/
diff --git a/sys/arch/amiga/amiga/autoconf.c b/sys/arch/amiga/amiga/autoconf.c
index 788ae6f886b..f2a16d2103d 100644
--- a/sys/arch/amiga/amiga/autoconf.c
+++ b/sys/arch/amiga/amiga/autoconf.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: autoconf.c,v 1.5 1996/05/29 10:14:20 niklas Exp $ */
-/* $NetBSD: autoconf.c,v 1.38 1996/05/12 02:41:00 mhitch Exp $ */
+/* $OpenBSD: autoconf.c,v 1.6 1996/08/19 00:04:13 niklas Exp $ */
+/* $NetBSD: autoconf.c,v 1.38.4.1 1996/05/26 16:23:26 is Exp $ */
/*
* Copyright (c) 1994 Christian E. Hopps
@@ -69,7 +69,9 @@ configure()
if (config_rootfound("mainbus", "mainbus") == NULL)
panic("no mainbus found");
+#ifdef DEBUG_KERNEL_START
printf("survived autoconf, going to enable interrupts\n");
+#endif
#ifdef DRACO
if (is_draco()) {
@@ -83,22 +85,34 @@ configure()
/* also enable hardware aided software interrupts */
custom.intena = INTF_SETCLR | INTF_SOFTINT;
}
+#ifdef DEBUG_KERNEL_START
printf("survived interrupt enable\n");
+#endif
#ifdef GENERIC
if ((boothowto & RB_ASKNAME) == 0) {
setroot();
+#ifdef DEBUG_KERNEL_START
printf("survived setroot()\n");
+#endif
}
setconf();
+#ifdef DEBUG_KERNEL_START
printf("survived setconf()\n");
+#endif
#else
setroot();
+#ifdef DEBUG_KERNEL_START
printf("survived setroot()\n");
#endif
+#endif
+#ifdef DEBUG_KERNEL_START
printf("survived root device search\n");
+#endif
swapconf();
+#ifdef DEBUG_KERNEL_START
printf("survived swap device search\n");
+#endif
cold = 0;
}
diff --git a/sys/arch/amiga/amiga/drcustom.h b/sys/arch/amiga/amiga/drcustom.h
index 923c5d0dc14..d8660e73296 100644
--- a/sys/arch/amiga/amiga/drcustom.h
+++ b/sys/arch/amiga/amiga/drcustom.h
@@ -1,6 +1,6 @@
/*
- * $OpenBSD: drcustom.h,v 1.2 1996/06/04 12:49:13 niklas Exp $
- * $NetBSD: drcustom.h,v 1.1 1996/05/09 20:30:36 is Exp $
+ * $OpenBSD: drcustom.h,v 1.3 1996/08/19 00:04:13 niklas Exp $
+ * $NetBSD: drcustom.h,v 1.1.4.1 1996/06/21 06:42:44 jtc Exp $
*
* Motherboard addresses for the DraCo.
*
@@ -18,10 +18,10 @@
#define DRCIATOP 0x02802000
#define NDRCIAPG ((DRCIATOP - DRCIABASE) / NBPG) /* which is 1 */
-#define NDRCCPG (7+1+1) /* (3 int+msc+ctrl+superio+cia)+scsi+altais */
+#define NDRCCPG (8+1+1) /* (3 int+msc+ctrl+superio+cia+1stkick)+scsi+altais */
#define DRCCBASE 0x01000000
-#define DRCCSTRIDE 0x00400000 /* for up to and including CIA */
+#define DRCCSTRIDE 0x00400000 /* for up to and including 1st kick pg */
#define DRZ2BASE 0x03000000 /*
* not really used, appears as Z3 to
@@ -45,7 +45,11 @@
#define DRIOCTLPG 4
#define DRSUPIOPG 5
#define DRCIAPG 6
-#define DRSCSIPG 7
+#define DRKICKPG 7 /*
+ * kick page, used only as a stopgap delay address
+ * for early DraCos
+ */
+#define DRSCSIPG 8
#ifdef _KERNEL
#ifndef _LOCORE
diff --git a/sys/arch/amiga/amiga/locore.s b/sys/arch/amiga/amiga/locore.s
index c2b6d6a5c66..605198d5808 100644
--- a/sys/arch/amiga/amiga/locore.s
+++ b/sys/arch/amiga/amiga/locore.s
@@ -1,5 +1,5 @@
-/* $OpenBSD: locore.s,v 1.10 1996/05/29 10:14:27 niklas Exp $ */
-/* $NetBSD: locore.s,v 1.56 1996/05/21 18:22:13 is Exp $ */
+/* $OpenBSD: locore.s,v 1.11 1996/08/19 00:04:14 niklas Exp $ */
+/* $NetBSD: locore.s,v 1.56.2.2 1996/06/14 11:20:45 is Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -209,18 +209,38 @@ Lbe10:
cmpw #12,d0 | address error vector?
jeq Lisaerr | yes, go to it
movl d1,a0 | fault address
- ptestr #1,a0@,#7 | do a table search
+ movl sp@,d0 | function code from ssw
+ btst #8,d0 | data fault?
+ jne Lbe10a
+ movql #1,d0 | user program access FC
+ | (we dont seperate data/program)
+ btst #5,a1@ | supervisor mode?
+ jeq Lbe10a | if no, done
+ movql #5,d0 | else supervisor program access
+Lbe10a:
+ ptestr d0,a0@,#7 | do a table search
pmove psr,sp@ | save result
- btst #7,sp@ | bus error bit set?
- jeq Lismerr | no, must be MMU fault
- clrw sp@ | yes, re-clear pad word
- jra Lisberr | and process as normal bus error
+ movl sp@,d1
+ btst #26,d1 | invalid (incl. limit viol. and berr)?
+ jeq Lmightnotbemerr | no -> wp check
+ btst #31,d1 | is it MMU table berr?
+ jeq Lismerr | no, must be fast
+ jra Lisberr1 | real bus err needs not be fast.
+Lmightnotbemerr:
+ btst #27,d1 | write protect bit set?
+ jeq Lisberr1 | no: must be bus error
+ | ssw is in low word of d1
+ andw #0xc0,d1 | Write protect is set on page:
+ cmpw #0x40,d1 | was it read cycle?
+ jeq Lisberr1 | yes, was not WPE, must be bus err
Lismerr:
movl #T_MMUFLT,sp@- | show that we are an MMU fault
jra Ltrapnstkadj | and deal with it
Lisaerr:
movl #T_ADDRERR,sp@- | mark address error
jra Ltrapnstkadj | and deal with it
+Lisberr1:
+ clrw sp@ | re-clear pad word
Lisberr:
movl #T_BUSERR,sp@- | mark bus error
Ltrapnstkadj:
@@ -524,7 +544,7 @@ _DraCoLev2intr:
CIAAADDR(a0)
movb a0@(CIAICR),d0 | read irc register (clears ints!)
tstb d0 | check if CIAB was source
- jeq Lintrcommon
+ jeq Ldrintrcommon
movel _draco_intpen,a0
| andib #4,a0@
|XXX this would better be
@@ -544,7 +564,24 @@ Ldraciaend:
moveml sp@+,#0x0303
addql #1,_cnt+V_INTR
jra rei
+/* XXX on the DraCo, lev 1, 3, 4, 5 and 6 are vectored here by initcpu() */
+ .globl _DraCoIntr
+_DraCoIntr:
+ moveml #0xC0C0,sp@-
+Ldrintrcommon:
+ lea Drintrcnt-4,a0
+ movw sp@(22),d0 | use vector offset
+ andw #0xfff,d0 | sans frame type
+ addql #1,a0@(-0x60,d0:w) | to increment apropos counter
+ movw sr,sp@- | push current SR value
+ clrw sp@- | padded to longword
+ jbsr _intrhand | handle interrupt
+ addql #4,sp | pop SR
+ moveml sp@+,#0x0303
+ addql #1,_cnt+V_INTR
+ jra rei
#endif
+
_lev5intr:
moveml d0/d1/a0/a1,sp@-
@@ -566,7 +603,6 @@ _lev3intr:
_lev4intr:
#endif
moveml d0-d1/a0-a1,sp@-
-/* XXX on the DraCo, lev 4, 5 and 6 are vectored here by initcpu() */
Lintrcommon:
lea _intrcnt,a0
movw sp@(22),d0 | use vector offset
@@ -692,7 +728,7 @@ Lexterdone:
#endif
addql #1,_intrcnt+24 | count EXTER interrupts
jra Llev6done
-/* XXX endifndef DRACO used to be here */
+/* XXX endif DRACO used to be here */
#else /* IPL_REMAP_1 */
@@ -881,6 +917,7 @@ start:
| we dont need the AGA mode register.
movel #100000,d3
LisDraco0:
+#ifdef DEBUG_KERNEL_START
movb #0,0x200003c8
movb #00,0x200003c9
movb #40,0x200003c9
@@ -892,6 +929,7 @@ LisDraco0:
movb #00,0x200003c9
subql #1,d3
jcc LisDraco0
+#endif
RELOC(_chipmem_start, a0)
movl #0,a0@
@@ -1471,6 +1509,13 @@ Lres2:
.word 0xf518 | pflusha (68040)
| movl #CACHE40_ON,d0
| movc d0,cacr | invalidate cache(s)
+#ifdef M68060
+ btst #7,_machineid+3
+ jeq Lres3
+ movc cacr,d2
+ orl #0x00200000,d2 | clear user branch cache entries
+ movc d2,cacr
+#endif
Lres3:
movl a1@(PCB_USTP),d0 | get USTP
moveq #PGSHIFT,d1
@@ -1762,7 +1807,7 @@ Lmc68851d:
pflushs #0,#4 | flush user TLB entries
rts
Ltbiau040:
-| 68040 can't specify supervisor/user on pflusha, so we flush all
+| 68040 cannot specify supervisor/user on pflusha, so we flush all
.word 0xf518 | pflusha
#ifdef M68060
btst #7,_machineid+3
@@ -2322,8 +2367,21 @@ _intrnames:
.asciz "nmi" | non-maskable
.asciz "clock" | clock interrupts
.asciz "spur6" | spurious level 6
+#ifdef DRACO
+ .asciz "kbd/soft" | 1: native keyboard, soft ints
+ .asciz "cia/zbus" | 2: cia, PORTS
+ .asciz "lclbus" | 3: local bus, e.g. Altais vbl
+ .asciz "drscsi" | 4: mainboard scsi
+ .asciz "superio" | 5: superio chip
+ .asciz "lcl/zbus" | 6: lcl/zorro lev6
+ .asciz "buserr" | 7: nmi: bus timeout
+#endif
_eintrnames:
.align 2
_intrcnt:
.long 0,0,0,0,0,0,0,0,0,0
+#ifdef DRACO
+Drintrcnt:
+ .long 0,0,0,0,0,0,0
+#endif
_eintrcnt:
diff --git a/sys/arch/amiga/amiga/machdep.c b/sys/arch/amiga/amiga/machdep.c
index 99b214fcaf4..9621cbbef7d 100644
--- a/sys/arch/amiga/amiga/machdep.c
+++ b/sys/arch/amiga/amiga/machdep.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: machdep.c,v 1.14 1996/07/27 11:40:26 deraadt Exp $ */
-/* $NetBSD: machdep.c,v 1.72 1996/05/19 14:55:31 is Exp $ */
+/* $OpenBSD: machdep.c,v 1.15 1996/08/19 00:04:15 niklas Exp $ */
+/* $NetBSD: machdep.c,v 1.72.4.1 1996/05/26 16:23:23 is Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -519,7 +519,7 @@ again:
phys_segs[i].first_page);
#endif
-#ifdef DEBUG
+#ifdef DEBUG_KERNEL_START
printf("calling initcpu...\n");
#endif
/*
@@ -527,7 +527,7 @@ again:
*/
initcpu();
-#ifdef DEBUG
+#ifdef DEBUG_KERNEL_START
printf("survived initcpu...\n");
#endif
/*
@@ -535,7 +535,7 @@ again:
*/
bufinit();
-#ifdef DEBUG
+#ifdef DEBUG_KERNEL_START
printf("survived bufinit...\n");
#endif
/*
@@ -549,7 +549,7 @@ again:
#endif
}
configure();
-#ifdef DEBUG
+#ifdef DEBUG_KERNEL_START
printf("survived configure...\n");
#endif
}
@@ -1280,10 +1280,11 @@ initcpu()
#else
extern u_int8_t illinst;
#endif
+ extern u_int8_t fpfault;
#endif
#ifdef DRACO
- extern u_int8_t DraCoLev2intr, lev2intr;
+ extern u_int8_t DraCoIntr, DraCoLev2intr;
#endif
#ifdef M68060
@@ -1310,15 +1311,18 @@ initcpu()
#else
vectab[61] = &illinst;
#endif
+ vectab[48] = &fpfault;
}
#endif
#ifdef DRACO
if (is_draco()) {
+ vectab[24+1] = &DraCoIntr;
vectab[24+2] = &DraCoLev2intr;
- vectab[24+4] = &lev2intr;
- vectab[24+5] = &lev2intr;
- vectab[24+6] = &lev2intr;
+ vectab[24+3] = &DraCoIntr;
+ vectab[24+4] = &DraCoIntr;
+ vectab[24+5] = &DraCoIntr;
+ vectab[24+6] = &DraCoIntr;
}
#endif
DCIS();
@@ -1573,31 +1577,30 @@ add_isr(isr)
{
struct isr **p, *q;
-#if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
- p = isr->isr_ipl == 2 ? &isr_ports : &isr_exter[isr->isr_mapped_ipl];
- if (isr->isr_ipl == 6) {
- if (isr->isr_mapped_ipl > isr_exter_highipl)
- isr_exter_highipl = isr->isr_mapped_ipl;
- if (isr->isr_mapped_ipl < isr_exter_lowipl)
- isr_exter_lowipl = isr->isr_mapped_ipl;
- }
-#else
-#ifdef DRACO
switch (isr->isr_ipl) {
case 2:
p = &isr_ports;
break;
+#ifdef DRACO
case 3:
+ panic("DraCo IPL3 not yet supported here");
p = &isr_slot3;
break;
- default: /* was case 6:; make gcc -Wall quiet */
+#endif
+ case 6:
+#if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
+ p = &isr_exter[isr->isr_mapped_ipl];
+ if (isr->isr_mapped_ipl > isr_exter_highipl)
+ isr_exter_highipl = isr->isr_mapped_ipl;
+ if (isr->isr_mapped_ipl < isr_exter_lowipl)
+ isr_exter_lowipl = isr->isr_mapped_ipl;
+#else
p = &isr_exter;
+#endif
break;
+ default:
+ panic("add_isr: bad isr_ipl (%d)", isr->isr_ipl);
}
-#else
- p = isr->isr_ipl == 2 ? &isr_ports : &isr_exter;
-#endif
-#endif
while ((q = *p) != NULL)
p = &q->isr_forw;
isr->isr_forw = NULL;
@@ -1617,77 +1620,77 @@ void
remove_isr(isr)
struct isr *isr;
{
- struct isr **p, *q;
+ struct isr **p, *q, **chain;
-#if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
- p = isr->isr_ipl == 6 ? &isr_exter[isr->isr_mapped_ipl] : &isr_ports;
-#else
-#ifdef DRACO
switch (isr->isr_ipl) {
case 2:
- p = &isr_ports;
+ chain = &isr_ports;
break;
+#ifdef DRACO
case 3:
- p = &isr_slot3;
+ panic("DraCo IPL3 not yet supported here");
+ chain = &isr_slot3;
break;
- default: /* XXX to make gcc -Wall quiet, was 6: */
- p = &isr_exter;
- break;
- }
-#else
- p = isr->isr_ipl == 6 ? &isr_exter : &isr_ports;
#endif
+ case 6:
+#if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
+ chain = &isr_exter[isr->isr_mapped_ipl];
+#else
+ chain = &isr_exter;
#endif
- while ((q = *p) != NULL && q != isr)
- p = &q->isr_forw;
+ break;
+ default:
+ panic("remove_isr: bad isr_ipl (%d)", isr->isr_ipl);
+ }
+ for (p = chain; (q = *p) != NULL && q != isr; p = &q->isr_forw)
+ ;
if (q)
*p = q->isr_forw;
else
panic("remove_isr: handler not registered");
- /* disable interrupt if no more handlers */
+ if (*chain == NULL)
+ switch (isr->isr_ipl) {
+ case 2:
+#ifdef DRACO
+ if (is_draco())
+ *draco_intena &= ~DRIRQ_INT2;
+ else
+#endif
+ custom.intena = INTF_PORTS;
+ break;
+#ifdef DRACO
+ case 3:
+ panic("DraCo IPL3 not yet supported here");
+ break;
+#endif
+ case 6:
#if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
- p = isr->isr_ipl == 6 ? &isr_exter[isr->isr_mapped_ipl] : &isr_ports;
- if (*p == NULL) {
- if (isr->isr_ipl == 6) {
- if (isr->isr_mapped_ipl == isr_exter_lowipl)
+ if (isr->isr_mapped_ipl == isr_exter_lowipl) {
while (isr_exter_lowipl++ < 6 &&
- !isr_exter[isr_exter_lowipl])
+ isr_exter[isr_exter_lowipl] == NULL)
;
+ if (isr_exter_lowipl == 7)
+#ifdef DRACO
+ if (is_draco())
+ *draco_intena &= ~DRIRQ_INT6;
+ else
+#endif
+ custom.intena = INTF_EXTER;
+ }
if (isr->isr_mapped_ipl == isr_exter_highipl)
while (isr_exter_highipl-- > 0 &&
- !isr_exter[isr_exter_highipl])
+ isr_exter[isr_exter_highipl] == NULL)
;
- if (isr_exter_lowipl == 7)
- custom.intena = INTF_EXTER;
- } else if (isr->isr_ipl == 2)
- custom.intena = INTF_PORTS;
- }
-#else
-#ifdef DRACO
- switch (isr->isr_ipl) {
- case 2:
- p = &isr_ports;
- break;
- case 3:
- p = &isr_slot3;
- break;
- case 6:
- p = &isr_exter;
- break;
- }
#else
- p = isr->isr_ipl == 6 ? &isr_exter : &isr_ports;
-#endif
- if (*p == NULL)
#ifdef DRACO
- if (is_draco())
- *draco_intena &= isr->isr_ipl == 6 ?
- ~DRIRQ_INT6 : ~DRIRQ_INT2;
- else
+ if (is_draco())
+ *draco_intena &= ~DRIRQ_INT6;
+ else
#endif
- custom.intena = isr->isr_ipl == 6 ?
- INTF_EXTER : INTF_PORTS;
+ custom.intena = INTF_EXTER;
#endif
+ break;
+ }
}
void
diff --git a/sys/arch/amiga/amiga/sys_machdep.c b/sys/arch/amiga/amiga/sys_machdep.c
index f000374cabc..459e12ca793 100644
--- a/sys/arch/amiga/amiga/sys_machdep.c
+++ b/sys/arch/amiga/amiga/sys_machdep.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: sys_machdep.c,v 1.3 1996/05/02 06:43:23 niklas Exp $ */
-/* $NetBSD: sys_machdep.c,v 1.14 1996/04/21 21:07:13 veego Exp $ */
+/* $OpenBSD: sys_machdep.c,v 1.4 1996/08/19 00:04:15 niklas Exp $ */
+/* $NetBSD: sys_machdep.c,v 1.14.4.1 1996/05/26 16:23:34 is Exp $ */
/*
* Copyright (c) 1982, 1986 Regents of the University of California.
@@ -127,7 +127,7 @@ cachectl(req, addr, len)
int len;
{
int error = 0;
-#ifdef M68040
+#if defined(M68040) || defined(M68060)
if (mmutype == MMU_68040) {
register int inc = 0;
int pa = 0, doall = 0;
@@ -237,7 +237,7 @@ dma_cachectl(addr, len)
caddr_t addr;
int len;
{
-#ifdef M68040
+#if defined(M68040) || defined(M68060)
if (mmutype == MMU_68040) {
register int inc = 0;
int pa = 0;