diff options
author | Steve Murphree <smurph@cvs.openbsd.org> | 2001-12-19 07:04:43 +0000 |
---|---|---|
committer | Steve Murphree <smurph@cvs.openbsd.org> | 2001-12-19 07:04:43 +0000 |
commit | 8130d56a7bb2e09e2c8b782f3f4a54133a0bb161 (patch) | |
tree | 1dd36d374c7d72391551b03ca96630523b33efe7 /sys/arch | |
parent | 0941b7f1f3dcc38dc20d2613943aa615d5b3c25b (diff) |
Introduce brdtyp and change what cputyp means.
Diffstat (limited to 'sys/arch')
25 files changed, 677 insertions, 682 deletions
diff --git a/sys/arch/mvme88k/conf/GENERIC b/sys/arch/mvme88k/conf/GENERIC index 332568d3a67..e121cca15a3 100644 --- a/sys/arch/mvme88k/conf/GENERIC +++ b/sys/arch/mvme88k/conf/GENERIC @@ -1,12 +1,14 @@ -# $OpenBSD: GENERIC,v 1.27 2001/12/19 04:02:25 smurph Exp $ +# $OpenBSD: GENERIC,v 1.28 2001/12/19 07:04:41 smurph Exp $ machine mvme88k include "../../../conf/GENERIC" -option MVME187 # support for 187 -option MVME188 # support for 188 -#option MVME197 # support for 197 +option M88100 # support for mc88110 processor +#option M88110 # support for mc88110 processor +option MVME187 # support for 187 (M88100 required) +option MVME188 # support for 188 (M88100 required) +#option MVME197 # support for 197 (M88110 required) option "NCPUS=1" # number of CPUs supported (max 4) option BUGMAP # use the Bug ROM VME mappings #option DEBUG # print debugging statements @@ -31,7 +33,7 @@ pcctwo0 at mainbus0 addr 0xfff00000 syscon0 at mainbus0 addr 0xfff00000 bussw0 at mainbus0 addr 0xfff00000 -# ----------------------------- busswitch devices ----------------------- +# ------------------------------ bussw devices -------------------------- pcctwo0 at bussw0 offset 0x42000 # ------------------------------ pcctwo devices ------------------------- diff --git a/sys/arch/mvme88k/conf/M187 b/sys/arch/mvme88k/conf/M187 index 74d46e2606b..ad8e1a97614 100644 --- a/sys/arch/mvme88k/conf/M187 +++ b/sys/arch/mvme88k/conf/M187 @@ -1,10 +1,11 @@ -# $OpenBSD: M187,v 1.17 2001/12/16 23:49:43 miod Exp $ +# $OpenBSD: M187,v 1.18 2001/12/19 07:04:41 smurph Exp $ machine mvme88k include "../../../conf/GENERIC" -option MVME187 # support for 187 +option M88100 # support for mc88110 processor +option MVME187 # support for 187 (M88100 required) option "NCPUS=1" # Number of cpus supported (max 4) option BUGMAP # use Bug Rom VME Mappings #option DEBUG # print debugging statements diff --git a/sys/arch/mvme88k/conf/M188 b/sys/arch/mvme88k/conf/M188 index 4e48675002b..00918c29935 100644 --- a/sys/arch/mvme88k/conf/M188 +++ b/sys/arch/mvme88k/conf/M188 @@ -1,10 +1,11 @@ -# $OpenBSD: M188,v 1.14 2001/12/16 23:49:43 miod Exp $ +# $OpenBSD: M188,v 1.15 2001/12/19 07:04:41 smurph Exp $ machine mvme88k include "../../../conf/GENERIC" -option MVME188 # support for 187 +option M88100 # support for mc88110 processor +option MVME188 # support for 188 (M88100 required) option "NCPUS=1" # Number of cpus supported (max 4) option BUGMAP # use Bug Rom VME Mappings #option DEBUG # print debugging statements diff --git a/sys/arch/mvme88k/conf/M197 b/sys/arch/mvme88k/conf/M197 index 56716a4243b..8209274535d 100644 --- a/sys/arch/mvme88k/conf/M197 +++ b/sys/arch/mvme88k/conf/M197 @@ -1,10 +1,11 @@ -# $OpenBSD: M197,v 1.13 2001/12/19 04:02:25 smurph Exp $ +# $OpenBSD: M197,v 1.14 2001/12/19 07:04:41 smurph Exp $ machine mvme88k include "../../../conf/GENERIC" -option MVME197 # support for 197 +option M88110 # support for mc88110 processor +option MVME197 # support for 197 (M88110 required) option "NCPUS=1" # Number of cpus supported (max 4) option BUGMAP # use Bug Rom VME Mappings #option DEBUG # print debugging statements diff --git a/sys/arch/mvme88k/dev/bussw.c b/sys/arch/mvme88k/dev/bussw.c index 91989db7b58..53c9fe1f0d1 100644 --- a/sys/arch/mvme88k/dev/bussw.c +++ b/sys/arch/mvme88k/dev/bussw.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bussw.c,v 1.3 2001/12/19 04:02:25 smurph Exp $ */ +/* $OpenBSD: bussw.c,v 1.4 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1999 Steve Murphree, Jr. @@ -79,8 +79,8 @@ bussw_match(parent, vcf, args) { struct confargs *ca = args; struct bussw_reg *bussw; - /* Don't match if wrong cpu */ - if (cputyp != CPU_197) return (0); + /* Don't match if wrong cpu */ + if (brdtyp != BRD_197) return (0); /* The only one... */ bussw = (struct bussw_reg *)(IIOV(ca->ca_paddr)); if (badvaddr((vm_offset_t)bussw, 4)) { diff --git a/sys/arch/mvme88k/dev/cl.c b/sys/arch/mvme88k/dev/cl.c index 2d7929327ed..a7c9cf885ac 100644 --- a/sys/arch/mvme88k/dev/cl.c +++ b/sys/arch/mvme88k/dev/cl.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cl.c,v 1.17 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: cl.c,v 1.18 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1995 Dale Rahn. All rights reserved. @@ -217,8 +217,6 @@ int dopoll = 1; #define CL_CHANNEL(x) (minor(x) & 3) #define CL_TTY(x) (minor(x)) -extern int cputyp; - struct tty *cltty __P((dev_t dev)); struct tty *cltty(dev) @@ -247,20 +245,17 @@ clprobe(parent, self, aux) */ struct clreg *cl_reg; struct confargs *ca = aux; - int ret; - if (cputyp != CPU_187) + + if (brdtyp == BRD_188) return 0; ca->ca_ipl = IPL_TTY; - ca->ca_paddr = (void *)CD2400_BASE_ADDR; + ca->ca_vaddr = ca->ca_paddr = (void *)CD2400_BASE_ADDR; cl_reg = (struct clreg *)ca->ca_vaddr; -#if 0 - ret = !badvaddr(&cl_reg->cl_gfrcr,1); -#else - ret = 1; -#endif - return ret; + if (badvaddr((vm_offset_t)&cl_reg->cl_gfrcr,1)) + return 0; + return 1; } void @@ -928,7 +923,7 @@ clcnprobe(cp) int maj; /* bomb if it'a a MVME188 */ - if (cputyp == CPU_188) { + if (brdtyp == BRD_188) { cp->cn_pri = CN_DEAD; return 0; } @@ -948,7 +943,7 @@ clcninit(cp) { volatile struct clreg *cl_reg; - cl_cons.cl_paddr = (void *)0xfff45000; + cl_cons.cl_paddr = (void *)CD2400_BASE_ADDR; cl_cons.cl_vaddr = (struct clreg *)IIOV(cl_cons.cl_paddr); cl_cons.pcctwoaddr = (void *)IIOV(0xfff42000); cl_reg = cl_cons.cl_vaddr; diff --git a/sys/arch/mvme88k/dev/clock.c b/sys/arch/mvme88k/dev/clock.c index 6eb693c7a29..3d9f772e23c 100644 --- a/sys/arch/mvme88k/dev/clock.c +++ b/sys/arch/mvme88k/dev/clock.c @@ -1,4 +1,4 @@ -/* $OpenBSD: clock.c,v 1.14 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: clock.c,v 1.15 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1999 Steve Murphree, Jr. * Copyright (c) 1995 Theo de Raadt @@ -264,7 +264,7 @@ delay(us) * Do not go to the real timer until vme device is present. * Or, in the case of MVME188, not at all. */ - if (sys_vme2 == NULL || cputyp == CPU_188) { + if (sys_vme2 == NULL || brdtyp == BRD_188) { c = 3 * us; while (--c > 0); return (0); diff --git a/sys/arch/mvme88k/dev/dart.c b/sys/arch/mvme88k/dev/dart.c index 243b5e53fdb..48e9b56e733 100644 --- a/sys/arch/mvme88k/dev/dart.c +++ b/sys/arch/mvme88k/dev/dart.c @@ -1,4 +1,4 @@ -/* $OpenBSD: dart.c,v 1.14 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: dart.c,v 1.15 2001/12/19 07:04:41 smurph Exp $ */ /* * Mach Operating System @@ -185,10 +185,11 @@ dartmatch(parent, vcf, args) union dartreg *addr; /* Don't match if wrong cpu */ - if (cputyp != CPU_188) return (0); + if (brdtyp != BRD_188) return (0); ca->ca_vaddr = ca->ca_paddr; /* 1:1 */ addr = (union dartreg *)ca->ca_vaddr; - if (badvaddr((vaddr_t)addr, 2) <= 0) { + + if (badvaddr((vaddr_t)addr, 2)) { printf("==> dart: failed address check.\n"); return (0); } @@ -1138,7 +1139,7 @@ dartcnprobe(cp) { int maj; - if (cputyp != CPU_188) { + if (brdtyp != BRD_188) { cp->cn_pri = CN_DEAD; return 0; } diff --git a/sys/arch/mvme88k/dev/mainbus.c b/sys/arch/mvme88k/dev/mainbus.c index 29fd9af6b3f..3aef5680da7 100644 --- a/sys/arch/mvme88k/dev/mainbus.c +++ b/sys/arch/mvme88k/dev/mainbus.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mainbus.c,v 1.6 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: mainbus.c,v 1.7 2001/12/19 07:04:41 smurph Exp $ */ /* Copyright (c) 1998 Steve Murphree, Jr. */ #include <sys/param.h> #include <sys/systm.h> @@ -69,7 +69,7 @@ mainbus_attach(parent, self, args) struct device *parent, *self; void *args; { - printf (" machine type MVME%x\n", cputyp); + printf (" machine type MVME%x\n", brdtyp); /* XXX * should have a please-attach-first list for mainbus, diff --git a/sys/arch/mvme88k/dev/nvram.c b/sys/arch/mvme88k/dev/nvram.c index 814c635c214..f537cfbc9c4 100644 --- a/sys/arch/mvme88k/dev/nvram.c +++ b/sys/arch/mvme88k/dev/nvram.c @@ -1,4 +1,4 @@ -/* $OpenBSD: nvram.c,v 1.15 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: nvram.c,v 1.16 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -102,13 +102,7 @@ nvrammatch(parent, vcf, args) #if 0 bugrtcrd(&rtc); - ret = badvaddr(IIOV(ca->ca_vaddr), 1); - if (ret != 0) - ret = badvaddr(IIOV(ca->ca_vaddr), 2); - if (ret != 0) - ret = badvaddr(IIOV(ca->ca_vaddr), 4); - - if (ret != 0) { + if (badvaddr(IIOV(ca->ca_vaddr), 1)) { printf("==> nvram: address 0x%x failed check\n", ca->ca_vaddr); return (0); } else @@ -130,7 +124,7 @@ nvramattach(parent, self, args) sc->sc_paddr = ca->ca_paddr; sc->sc_vaddr = ca->ca_vaddr; - if (cputyp == CPU_188) { + if (brdtyp == BRD_188) { sc->sc_len = MK48T02_SIZE; } else { sc->sc_len = MK48T08_SIZE; @@ -142,7 +136,7 @@ nvramattach(parent, self, args) /*X*/ if (sc->sc_vaddr == NULL) /*X*/ panic("failed to map!"); - if (cputyp != CPU_188) { + if (brdtyp != BRD_188) { sc->sc_regs = (void *)(sc->sc_vaddr + sc->sc_len - sizeof(struct clockreg)); } else { @@ -322,7 +316,7 @@ inittodr(base) base = 21*SECYR + 186*SECDAY + SECDAY/2; badbase = 1; } - if (cputyp != CPU_188) { + if (brdtyp != BRD_188) { register struct clockreg *cl = (struct clockreg *)sc->sc_regs; cl->cl_csr |= CLK_READ; /* enable read (stop time) */ sec = cl->cl_sec; @@ -378,7 +372,7 @@ void resettodr() { struct nvramsoftc *sc = (struct nvramsoftc *) nvram_cd.cd_devs[0]; struct chiptime c; - if (cputyp != CPU_188) { + if (brdtyp != BRD_188) { register struct clockreg *cl = (struct clockreg *)sc->sc_regs; if (!time.tv_sec || cl == NULL) diff --git a/sys/arch/mvme88k/dev/pcctwo.c b/sys/arch/mvme88k/dev/pcctwo.c index fc4a589aa28..42b0abd49b7 100644 --- a/sys/arch/mvme88k/dev/pcctwo.c +++ b/sys/arch/mvme88k/dev/pcctwo.c @@ -1,5 +1,5 @@ -/* $OpenBSD: pcctwo.c,v 1.12 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: pcctwo.c,v 1.13 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -81,32 +81,32 @@ int pcctwo_scan __P((struct device *parent, void *child, void *args)); int pcctwomatch(parent, vcf, args) - struct device *parent; - void *vcf, *args; +struct device *parent; +void *vcf, *args; { struct confargs *ca = args; struct pcctworeg *pcc2; /* Bomb if wrong cpu */ - switch (cputyp) { - case CPU_187: - pcc2 = (struct pcctworeg *)(IIOV(ca->ca_paddr) + PCC2_PCC2CHIP_OFF); - break; - case CPU_197: /* pcctwo is a child of buswitch XXX smurph */ - pcc2 = (struct pcctworeg *)(IIOV(ca->ca_paddr)); - break; - default: - /* Bomb if wrong cpu */ - return (0); - } - - if (badvaddr((vm_offset_t)pcc2, 4) <= 0){ - printf("==> pcctwo: failed address check.\n"); - return (0); + switch (brdtyp) { + case BRD_187: + pcc2 = (struct pcctworeg *)(IIOV(ca->ca_paddr) + PCC2_PCC2CHIP_OFF); + break; + case BRD_197: /* pcctwo is a child of buswitch XXX smurph */ + pcc2 = (struct pcctworeg *)(IIOV(ca->ca_paddr)); + break; + default: + /* Bomb if wrong board */ + return (0); + } + + if (badvaddr((vm_offset_t)pcc2, 4) <= 0) { + printf("==> pcctwo: failed address check.\n"); + return (0); } - if (pcc2->pcc2_chipid != PCC2_CHIPID){ - printf("==> pcctwo: wrong chip id %x.\n", pcc2->pcc2_chipid); - return (0); + if (pcc2->pcc2_chipid != PCC2_CHIPID) { + printf("==> pcctwo: wrong chip id %x.\n", pcc2->pcc2_chipid); + return (0); } return (1); } @@ -160,8 +160,8 @@ pcctwo_scan(parent, child, args) void pcctwoattach(parent, self, args) - struct device *parent, *self; - void *args; +struct device *parent, *self; +void *args; { struct confargs *ca = args; struct pcctwosoftc *sc = (struct pcctwosoftc *)self; @@ -175,14 +175,14 @@ pcctwoattach(parent, self, args) */ sc->sc_paddr = ca->ca_paddr; sc->sc_vaddr = (void *)IIOV(sc->sc_paddr); - switch (cputyp) { - case CPU_187: - sc->sc_pcc2 = (struct pcctworeg *)(sc->sc_vaddr + PCC2_PCC2CHIP_OFF); - break; - case CPU_197: /* pcctwo is a child of buswitch XXX smurph */ - sc->sc_pcc2 = (struct pcctworeg *)sc->sc_vaddr; - break; - } + switch (brdtyp) { + case BRD_187: + sc->sc_pcc2 = (struct pcctworeg *)(sc->sc_vaddr + PCC2_PCC2CHIP_OFF); + break; + case BRD_197: /* pcctwo is a child of buswitch XXX smurph */ + sc->sc_pcc2 = (struct pcctworeg *)sc->sc_vaddr; + break; + } sys_pcc2 = sc->sc_pcc2; printf(": rev %d\n", sc->sc_pcc2->pcc2_chiprev); diff --git a/sys/arch/mvme88k/dev/sram.c b/sys/arch/mvme88k/dev/sram.c index 84d530d5aaa..b2d73c92d80 100644 --- a/sys/arch/mvme88k/dev/sram.c +++ b/sys/arch/mvme88k/dev/sram.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sram.c,v 1.6 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: sram.c,v 1.7 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -72,7 +72,7 @@ srammatch(parent, vcf, args) struct confargs *ca = args; int ret; - if (cputyp != CPU_187) + if (brdtyp != BRD_187) /* The only one... */ return (0); ca->ca_paddr = (void *)0xffe00000; @@ -101,20 +101,20 @@ sramattach(parent, self, args) struct mcreg *mc; int i; - switch (cputyp) { + switch (brdtyp) { #ifdef MVME167 - case CPU_167: - case CPU_166: + case BRD_167: + case BRD_166: sc->sc_len = 128*1024; /* always 128K */ break; #endif #ifdef MVME177 - case CPU_177: + case BRD_177: sc->sc_len = 128*1024; /* always 128K */ break; #endif #ifdef MVME187 - case CPU_187: + case BRD_187: sc->sc_len = 128*1024; /* always 128K */ break; #endif diff --git a/sys/arch/mvme88k/dev/syscon.c b/sys/arch/mvme88k/dev/syscon.c index 6ae58882c04..afdefa919d7 100644 --- a/sys/arch/mvme88k/dev/syscon.c +++ b/sys/arch/mvme88k/dev/syscon.c @@ -1,4 +1,4 @@ -/* $OpenBSD: syscon.c,v 1.7 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: syscon.c,v 1.8 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1999 Steve Murphree, Jr. * All rights reserved. @@ -117,7 +117,7 @@ sysconmatch(parent, vcf, args) struct sysconreg *syscon; /* Don't match if wrong cpu */ - if (cputyp != CPU_188) return (0); + if (brdtyp != BRD_188) return (0); /* The only one... */ /* Uh, MVME188 better have on of these, so always match if it * is a MVME188... */ syscon = (struct sysconreg *)(IIOV(ca->ca_paddr)); diff --git a/sys/arch/mvme88k/dev/vx.c b/sys/arch/mvme88k/dev/vx.c index e851eb4cd96..af00446df81 100644 --- a/sys/arch/mvme88k/dev/vx.c +++ b/sys/arch/mvme88k/dev/vx.c @@ -1,4 +1,4 @@ -/* $OpenBSD: vx.c,v 1.14 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: vx.c,v 1.15 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1999 Steve Murphree, Jr. * All rights reserved. @@ -197,8 +197,6 @@ vxmatch(parent, self, aux) struct vxreg *vx_reg; struct confargs *ca = aux; - if (cputyp != CPU_187) - return 0; #ifdef OLD_MAPPINGS ca->ca_vaddr = ca->ca_paddr; #endif diff --git a/sys/arch/mvme88k/include/cpu_number.h b/sys/arch/mvme88k/include/cpu_number.h index 51bd18ce32e..7744fc4d8ed 100644 --- a/sys/arch/mvme88k/include/cpu_number.h +++ b/sys/arch/mvme88k/include/cpu_number.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu_number.h,v 1.8 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: cpu_number.h,v 1.9 2001/12/19 07:04:41 smurph Exp $ */ /* * Mach Operating System @@ -39,8 +39,7 @@ static unsigned cpu_number __P((void)); static __inline__ unsigned cpu_number(void) { register unsigned cpu; - - if (cputyp != CPU_188 || number_cpus == 1) return 0; + if (brdtyp != BRD_188 || number_cpus == 1) return 0; __asm__ ("ldcr %0, cr18" : "=r" (cpu)); return (cpu & 3); } diff --git a/sys/arch/mvme88k/include/cpus.h b/sys/arch/mvme88k/include/cpus.h index aecc8d49114..ecf5bd9e2d5 100644 --- a/sys/arch/mvme88k/include/cpus.h +++ b/sys/arch/mvme88k/include/cpus.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpus.h,v 1.10 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: cpus.h,v 1.11 2001/12/19 07:04:41 smurph Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1992 Carnegie Mellon University @@ -58,8 +58,8 @@ union cpupid { }; #endif /* _LOCORE */ -#define M88100 0 -#define M88200 5 -#define M88204 6 +#define M88100_ID 0 +#define M88200_ID 5 +#define M88204_ID 6 #endif /* __MACHINE_CPUS_H__ */ diff --git a/sys/arch/mvme88k/include/param.h b/sys/arch/mvme88k/include/param.h index f5349e16a24..ca85f79244e 100644 --- a/sys/arch/mvme88k/include/param.h +++ b/sys/arch/mvme88k/include/param.h @@ -1,4 +1,4 @@ -/* $OpenBSD: param.h,v 1.25 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: param.h,v 1.26 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1999 Steve Murphree, Jr. * Copyright (c) 1988 University of Utah. @@ -173,16 +173,30 @@ extern int delay __P((int)); #define DELAY(x) delay(x) extern int cputyp; +extern int brdtyp; extern int cpumod; #endif /* + * Values for the brdtyp variable. + */ +#define BRD_187 0x187 +#define BRD_188 0x188 +#define BRD_197 0x197 +#define BRD_8120 0x8120 + +/* * Values for the cputyp variable. */ -#define CPU_187 0x187 -#define CPU_188 0x188 -#define CPU_197 0x197 -#define CPU_8120 0x8120 +#define CPU_88100 0x100 +#define CPU_88110 0x110 + +/* + * Values for the cpumod variable. + */ +#define MOD_LE 0x01 +#define MOD_SP 0x02 +#define MOD_DP 0x03 #endif /* !_MACHINE_PARAM_H_ */ diff --git a/sys/arch/mvme88k/mvme88k/cmmu.c b/sys/arch/mvme88k/mvme88k/cmmu.c index fdd9d692d5d..7f63e1a6649 100644 --- a/sys/arch/mvme88k/mvme88k/cmmu.c +++ b/sys/arch/mvme88k/mvme88k/cmmu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cmmu.c,v 1.16 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: cmmu.c,v 1.17 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -66,10 +66,10 @@ #include <machine/cmmu.h> #include <machine/cpus.h> #include <machine/cpu_number.h> -#if defined(MVME187) || defined(MVME188) +#ifdef M88100 #include <machine/m882xx.h> #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 +#ifdef M88110 #include <machine/m88110.h> #endif /* MVME197 */ @@ -95,56 +95,53 @@ int cpu_cmmu_ratio; void show_apr(unsigned value) { - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_show_apr(value); - break; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_show_apr(value); + break; #endif -#ifdef MVME197 - case CPU_197: - m197_show_apr(value); - break; +#ifdef M88110 + case CPU_88110: + m197_show_apr(value); + break; #endif - } + } } void show_sctr(unsigned value) { - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_show_sctr(value); - break; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_show_sctr(value); + break; #endif -#ifdef MVME197 - case CPU_197: - m197_show_sctr(value); - break; +#ifdef M88110 + case CPU_88110: + m197_show_sctr(value); + break; #endif - } + } } #endif /* CMMU_DEBUG */ void setup_board_config(void) { - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_setup_board_config(); - break; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_setup_board_config(); + break; #endif -#ifdef MVME197 - case CPU_197: - m197_setup_board_config(); - break; +#ifdef M88110 + case CPU_88110: + m197_setup_board_config(); + break; #endif - } + } } void @@ -156,14 +153,13 @@ setup_cmmu_config(void) cpu_sets[cpu] = 0; switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: +#ifdef M88100 + case CPU_88100: m18x_setup_cmmu_config(); break; #endif -#ifdef MVME197 - case CPU_197: +#ifdef M88110 + case CPU_88110: m197_setup_cmmu_config(); break; #endif @@ -173,19 +169,18 @@ setup_cmmu_config(void) void cmmu_dump_config(void) { - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_dump_config(); - break; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_dump_config(); + break; #endif -#ifdef MVME197 - case CPU_197: - m197_cmmu_dump_config(); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_dump_config(); + break; #endif - } + } } #ifdef DDB @@ -195,23 +190,22 @@ cmmu_dump_config(void) unsigned cmmu_get_by_mode(int cpu, int mode) { - unsigned retval; - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - retval = m18x_cmmu_get_by_mode(cpu, mode); - break; + unsigned retval; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + retval = m18x_cmmu_get_by_mode(cpu, mode); + break; #endif -#ifdef MVME197 - case CPU_197: - retval = m197_cmmu_get_by_mode(cpu, mode); - break; +#ifdef M88110 + case CPU_88110: + retval = m197_cmmu_get_by_mode(cpu, mode); + break; #endif - } - CMMU_UNLOCK; - return retval; + } + CMMU_UNLOCK; + return retval; } #endif @@ -223,21 +217,20 @@ cmmu_get_by_mode(int cpu, int mode) void cpu_configuration_print(int master) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cpu_configuration_print(master); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cpu_configuration_print(master); + break; #endif -#ifdef MVME197 - case CPU_197: - m197_cpu_configuration_print(master); - break; +#ifdef M88110 + case CPU_88110: + m197_cpu_configuration_print(master); + break; #endif - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /* @@ -250,14 +243,13 @@ cmmu_init(void) simple_lock_init(&cmmu_cpu_lock); switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: +#ifdef M88100 + case CPU_88100: m18x_cmmu_init(); break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: +#ifdef M88110 + case CPU_88110: m197_cmmu_init(); break; #endif /* MVME197 */ @@ -270,21 +262,20 @@ cmmu_init(void) void cmmu_shutdown_now(void) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_shutdown_now(); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_shutdown_now(); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_shutdown_now(); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_shutdown_now(); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } #define PARITY_ENABLE @@ -296,21 +287,20 @@ void cmmu_parity_enable(void) { #ifdef PARITY_ENABLE - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_parity_enable(); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_parity_enable(); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_parity_enable(); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_parity_enable(); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; #endif /* PARITY_ENABLE */ } @@ -322,23 +312,22 @@ cmmu_parity_enable(void) unsigned cmmu_cpu_number(void) { - unsigned retval; - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - retval = m18x_cmmu_cpu_number(); - break; + unsigned retval; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + retval = m18x_cmmu_cpu_number(); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - retval = m197_cmmu_cpu_number(); - break; +#ifdef M88110 + case CPU_88110: + retval = m197_cmmu_cpu_number(); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; - return retval; + } + CMMU_UNLOCK; + return retval; } /** @@ -348,21 +337,20 @@ cmmu_cpu_number(void) void cmmu_remote_set(unsigned cpu, unsigned r, unsigned data, unsigned x) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_remote_set(cpu, r, data, x); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_remote_set(cpu, r, data, x); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_remote_set(cpu, r, data, x); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_remote_set(cpu, r, data, x); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /* @@ -372,86 +360,82 @@ cmmu_remote_set(unsigned cpu, unsigned r, unsigned data, unsigned x) unsigned cmmu_remote_get(unsigned cpu, unsigned r, unsigned data) { - unsigned retval; - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - retval = m18x_cmmu_remote_get(cpu, r, data); - break; + unsigned retval; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + retval = m18x_cmmu_remote_get(cpu, r, data); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - retval = m197_cmmu_remote_get(cpu, r, data); - break; +#ifdef M88110 + case CPU_88110: + retval = m197_cmmu_remote_get(cpu, r, data); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; - return retval; + } + CMMU_UNLOCK; + return retval; } /* Needs no locking - read only registers */ unsigned cmmu_get_idr(unsigned data) { - unsigned retval; - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - retval = m18x_cmmu_get_idr(data); - break; + unsigned retval; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + retval = m18x_cmmu_get_idr(data); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - retval = m197_cmmu_get_idr(data); - break; +#ifdef M88110 + case CPU_88110: + retval = m197_cmmu_get_idr(data); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; - return retval; + } + CMMU_UNLOCK; + return retval; } void cmmu_set_sapr(unsigned ap) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_set_sapr(ap); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_set_sapr(ap); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_set_sapr(ap); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_set_sapr(ap); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } void cmmu_remote_set_sapr(unsigned cpu, unsigned ap) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_remote_set_sapr(cpu, ap); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_remote_set_sapr(cpu, ap); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_remote_set_sapr(cpu, ap); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_remote_set_sapr(cpu, ap); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } void @@ -460,14 +444,13 @@ cmmu_set_uapr(unsigned ap) register int s = splhigh(); CMMU_LOCK; switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: +#ifdef M88100 + case CPU_88100: m18x_cmmu_set_uapr(ap); break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: +#ifdef M88110 + case CPU_88110: m197_cmmu_set_uapr(ap); break; #endif /* MVME197 */ @@ -491,21 +474,20 @@ cmmu_set_batc_entry( unsigned data, /* 1 = data, 0 = instruction */ unsigned value) /* the value to stuff into the batc */ { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_set_batc_entry(cpu, entry_no, data, value); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_set_batc_entry(cpu, entry_no, data, value); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_set_batc_entry(cpu, entry_no, data, value); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_set_batc_entry(cpu, entry_no, data, value); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /* @@ -518,21 +500,20 @@ cmmu_set_pair_batc_entry( unsigned entry_no, unsigned value) /* the value to stuff into the batc */ { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_set_pair_batc_entry(cpu, entry_no, value); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_set_pair_batc_entry(cpu, entry_no, value); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_set_pair_batc_entry(cpu, entry_no, value); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_set_pair_batc_entry(cpu, entry_no, value); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /** @@ -546,21 +527,20 @@ cmmu_set_pair_batc_entry( void cmmu_flush_remote_tlb(unsigned cpu, unsigned kernel, vm_offset_t vaddr, int size) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_flush_remote_tlb(cpu, kernel, vaddr, size); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_flush_remote_tlb(cpu, kernel, vaddr, size); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_flush_remote_tlb(cpu, kernel, vaddr, size); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_flush_remote_tlb(cpu, kernel, vaddr, size); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /* @@ -569,9 +549,9 @@ cmmu_flush_remote_tlb(unsigned cpu, unsigned kernel, vm_offset_t vaddr, int size void cmmu_flush_tlb(unsigned kernel, vm_offset_t vaddr, int size) { - int cpu; - cpu = cpu_number(); - cmmu_flush_remote_tlb(cpu, kernel, vaddr, size); + int cpu; + cpu = cpu_number(); + cmmu_flush_remote_tlb(cpu, kernel, vaddr, size); } /* @@ -589,14 +569,13 @@ cmmu_pmap_activate( register int s = splhigh(); CMMU_LOCK; switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: +#ifdef M88100 + case CPU_88100: m18x_cmmu_pmap_activate(cpu, uapr, i_batc, d_batc); break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: +#ifdef M88110 + case CPU_88110: m197_cmmu_pmap_activate(cpu, uapr, i_batc, d_batc); break; #endif /* MVME197 */ @@ -624,21 +603,20 @@ cmmu_pmap_activate( void cmmu_flush_remote_cache(int cpu, vm_offset_t physaddr, int size) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_flush_remote_cache(cpu, physaddr, size); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_flush_remote_cache(cpu, physaddr, size); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_flush_remote_cache(cpu, physaddr, size); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_flush_remote_cache(cpu, physaddr, size); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /* @@ -647,8 +625,8 @@ cmmu_flush_remote_cache(int cpu, vm_offset_t physaddr, int size) void cmmu_flush_cache(vm_offset_t physaddr, int size) { - int cpu = cpu_number(); - cmmu_flush_remote_cache(cpu, physaddr, size); + int cpu = cpu_number(); + cmmu_flush_remote_cache(cpu, physaddr, size); } /* @@ -657,21 +635,20 @@ cmmu_flush_cache(vm_offset_t physaddr, int size) void cmmu_flush_remote_inst_cache(int cpu, vm_offset_t physaddr, int size) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_flush_remote_inst_cache(cpu, physaddr, size); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_flush_remote_inst_cache(cpu, physaddr, size); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_flush_remote_inst_cache(cpu, physaddr, size); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_flush_remote_inst_cache(cpu, physaddr, size); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /* @@ -680,29 +657,28 @@ cmmu_flush_remote_inst_cache(int cpu, vm_offset_t physaddr, int size) void cmmu_flush_inst_cache(vm_offset_t physaddr, int size) { - int cpu; - cpu = cpu_number(); - cmmu_flush_remote_inst_cache(cpu, physaddr, size); + int cpu; + cpu = cpu_number(); + cmmu_flush_remote_inst_cache(cpu, physaddr, size); } void cmmu_flush_remote_data_cache(int cpu, vm_offset_t physaddr, int size) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_flush_remote_data_cache(cpu, physaddr, size); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_flush_remote_data_cache(cpu, physaddr, size); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_flush_remote_data_cache(cpu, physaddr, size); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_flush_remote_data_cache(cpu, physaddr, size); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } /* @@ -711,9 +687,9 @@ cmmu_flush_remote_data_cache(int cpu, vm_offset_t physaddr, int size) void cmmu_flush_data_cache(vm_offset_t physaddr, int size) { - int cpu; - cpu = cpu_number(); - cmmu_flush_remote_data_cache(cpu, physaddr, size); + int cpu; + cpu = cpu_number(); + cmmu_flush_remote_data_cache(cpu, physaddr, size); } #if 0 @@ -723,82 +699,78 @@ cmmu_flush_data_cache(vm_offset_t physaddr, int size) void cmmu_sync_cache(vm_offset_t physaddr, int size) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_sync_cache(physaddr, size); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_sync_cache(physaddr, size); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_sync_cache(physaddr, size); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_sync_cache(physaddr, size); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } void cmmu_sync_inval_cache(vm_offset_t physaddr, int size) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_sync_inval_cache(physaddr, size); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_sync_inval_cache(physaddr, size); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_sync_inval_cache(physaddr, size); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_sync_inval_cache(physaddr, size); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } void cmmu_inval_cache(vm_offset_t physaddr, int size) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_inval_cache(physaddr, size); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_inval_cache(physaddr, size); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_inval_cache(physaddr, size); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_inval_cache(physaddr, size); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } #endif void dma_cachectl(vm_offset_t va, int size, int op) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_dma_cachectl(va, size, op); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_dma_cachectl(va, size, op); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_dma_cachectl(va, size, op); - break; +#ifdef M88110 + case CPU_88110: + m197_dma_cachectl(va, size, op); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } #ifdef DDB @@ -814,59 +786,56 @@ cmmu_show_translation( unsigned verbose_flag, int cmmu_num) { - CMMU_LOCK; - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_show_translation(address, supervisor_flag, - verbose_flag, cmmu_num); - break; + CMMU_LOCK; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_show_translation(address, supervisor_flag, + verbose_flag, cmmu_num); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_show_translation(address, supervisor_flag, - verbose_flag, cmmu_num); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_show_translation(address, supervisor_flag, + verbose_flag, cmmu_num); + break; #endif /* MVME197 */ - } - CMMU_UNLOCK; + } + CMMU_UNLOCK; } void cmmu_cache_state(unsigned addr, unsigned supervisor_flag) { - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_cmmu_cache_state(addr, supervisor_flag); - break; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_cmmu_cache_state(addr, supervisor_flag); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_cmmu_cache_state(addr, supervisor_flag); - break; +#ifdef M88110 + case CPU_88110: + m197_cmmu_cache_state(addr, supervisor_flag); + break; #endif /* MVME197 */ - } + } } void show_cmmu_info(unsigned addr) { - switch (cputyp) { -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: - m18x_show_cmmu_info(addr); - break; + switch (cputyp) { +#ifdef M88100 + case CPU_88100: + m18x_show_cmmu_info(addr); + break; #endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 - case CPU_197: - m197_show_cmmu_info(addr); - break; +#ifdef M88110 + case CPU_88110: + m197_show_cmmu_info(addr); + break; #endif /* MVME197 */ - } + } } #endif /* end if DDB */ diff --git a/sys/arch/mvme88k/mvme88k/eh.S b/sys/arch/mvme88k/mvme88k/eh.S index fb9b4689a13..f04e61297d6 100644 --- a/sys/arch/mvme88k/mvme88k/eh.S +++ b/sys/arch/mvme88k/mvme88k/eh.S @@ -1,4 +1,4 @@ -/* $OpenBSD: eh.S,v 1.24 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: eh.S,v 1.25 2001/12/19 07:04:41 smurph Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1991 Carnegie Mellon University @@ -216,10 +216,9 @@ #include "assym.h" #include <machine/asm.h> #include <machine/board.h> +#include <machine/param.h> /* CPU_ and BRD_ defines */ #include <machine/trap.h> /* for T_ defines */ -#ifdef MVME188 -#include <machine/mvme188.h> -#endif +#include <machine/board.h> /* * The exception frame as defined in "machine/pcb.h" (among other places) is @@ -286,7 +285,7 @@ Lbadcpupanic: ** (which is pointed-to by r31). **/ -#if defined(MVME187) || defined (MVME188) +#ifdef M88100 #define PREP(NAME, NUM, BIT, SSBR_STUFF, FLAG_PRECHECK) ; \ xcr FLAGS, FLAGS, SR1 ; \ FLAG_PRECHECK ; \ @@ -319,9 +318,9 @@ Lbadcpupanic: ; \ /* All general regs free -- do any debugging */ ; \ PREP_DEBUG(BIT, NAME) -#endif /* defined(MVME187) || defined (MVME188) */ +#endif /* m88100 */ -#ifdef MVME197 +#ifdef M88110 #define PREP2(NAME, NUM, BIT, SSBR_STUFF, FLAG_PRECHECK); \ xcr FLAGS, FLAGS, SR1 ; \ FLAG_PRECHECK ; \ @@ -341,17 +340,13 @@ Lbadcpupanic: or TMP2, r0, NUM ; \ st TMP2, r31, REG_OFF(EF_VECTOR) ; \ ; \ - /* Clear any bits in the SSBR (held in TMP) */ ; \ - /* SSBR_STUFF may be empty, though. */ ; \ - SSBR_STUFF ; \ - ; \ /* call setup_phase_two to restart the FPU */ ; \ /* and to save all general registers. */ ; \ bsr m197_setup_phase_two ; \ ; \ /* All general regs free -- do any debugging */ ; \ PREP_DEBUG(BIT, NAME) -#endif /* MVME197 */ +#endif /* M88110 */ /* Some defines for use with PREP() */ #define No_SSBR_Stuff /* empty */ @@ -423,7 +418,7 @@ GLOBAL(eh_debug) word 0x00000000 #define DONE(num) br return_from_exception_handler #endif -#if defined(MVME187) || defined (MVME188) +#ifdef M88100 /*#########################################################################*/ /*#### THE ACTUAL EXCEPTION HANDLER ENTRY POINTS for MVME18x ##############*/ /*#########################################################################*/ @@ -684,9 +679,9 @@ GLOBAL(error_handler) #if 0 /* MVME188 */ #define IST_REG 0xfff84040 /* interrupt status addr */ /* check if it's a mvme188 */ - or.u r10, r0, hi16(_cputyp) - ld r11, r10, lo16(_cputyp) - cmp r10, r11, 0x188 + or.u r10, r0, hi16(_brdtyp) + ld r11, r10, lo16(_brdtyp) + cmp r10, r11, BRD_188 bb1 ne, r10, 3f or.u r10, r0, hi16(IST_REG) /* interrupt status register */ ld r11, r10, lo16(IST_REG) @@ -896,9 +891,9 @@ ASGLOBAL(ignore_data_exception) /* the following jumps to "badaddr__return_nonzero" in below */ RTE -#endif /* defined(MVME187) || defined (MVME188) */ +#endif /* m88100 */ -#ifdef MVME197 +#ifdef M88110 /* * This is part of baddadr (below). */ @@ -929,7 +924,7 @@ ASGLOBAL(m197_ignore_data_exception) /* the following jumps to "badaddr__return_nonzero" in below */ NOP RTE -#endif /* MVME197 */ +#endif /* M88110 */ /* @@ -1059,7 +1054,7 @@ ASGLOBAL(badaddr__return) ****************************************************************************** */ -#if defined(MVME187) || defined (MVME188) +#ifdef M88100 ASGLOBAL(setup_phase_one) /***************** REGISTER STATUS BLOCK ***********************\ @@ -1235,9 +1230,9 @@ ASGLOBAL(have_pcb) */ #ifdef MVME188 /* check if it's a mvme188 */ - or.u TMP, r0, hi16(_cputyp) - ld TMP2, TMP, lo16(_cputyp) - cmp TMP, TMP2, 0x188 + or.u TMP, r0, hi16(_brdtyp) + ld TMP2, TMP, lo16(_brdtyp) + cmp TMP, TMP2, BRD_188 bb1 ne, TMP, 5f extu TMP, FLAGS, FLAG_CPU_FIELD_WIDTH<0> /* TMP = cpu# */ @@ -1419,7 +1414,7 @@ ASGLOBAL(DMT_check_finished) ldcr r1, SR2 jmp r1 /* return to allow the handler to clear more SSBR bits */ -#endif /* defined(MVME187) || defined (MVME188) */ +#endif /* m88100 */ /************************************************************************/ /************************************************************************/ @@ -1504,16 +1499,13 @@ ASGLOBAL(clear_FPp_ssbr_bit) br.n 3f set TMP3, TMP3, 1<5> /* set size=1 -- clear one bit for "float" */ 2: set TMP3, TMP3, 1<6> /* set size=2 -- clear two bit for "double" */ -3: - clr TMP, TMP, TMP3 /* clear bit(s) in ssbr. */ -4: - jmp r1 +3: clr TMP, TMP, TMP3 /* clear bit(s) in ssbr. */ +4: jmp r1 /************************************************************************/ /************************************************************************/ - ASGLOBAL(clear_dest_ssbr_bit) /* * There are various cases where an exception can leave the @@ -1615,7 +1607,7 @@ ASGLOBAL(misaligned_double) /************************************************************************/ /************************************************************************/ -#if defined(MVME187) || defined (MVME188) +#ifdef M88100 ASGLOBAL(setup_phase_two) /***************** REGISTER STATUS BLOCK ***********************\ @@ -1868,7 +1860,7 @@ exception_handler_has_ksp: global exception_handler_has_ksp ASGLOBAL(return_to_calling_exception_handler) jmp r14 /* loaded above */ -#endif /* defined(MVME187) || defined (MVME188) */ +#endif /* m88100 */ /* @@ -1924,15 +1916,14 @@ GLOBAL(return_from_main) * and thread_bootstrap in luna88k/locore.c. * */ -#if (defined(MVME187) || defined(MVME188)) && defined(MVME197) +#ifdef M88110 or.u r2, r0, hi16(_cputyp) ld r3, r2, lo16(_cputyp) - cmp r2, r3, 0x197 + cmp r2, r3, CPU_88110 bb1 eq, r2, m197_return_code #endif - +#ifdef M88100 /* 18x part for return_from_exception_handler() follows... */ -#if defined(MVME187) || defined(MVME188) #define FPTR r14 ld FPTR, r31, 0 /* grab exception frame pointer */ ld r3, FPTR, REG_OFF(EF_DMT0) @@ -1994,9 +1985,9 @@ GLOBAL(return_from_main) st r0 , FPTR, REG_OFF(EF_DMT0) 2: br _check_ast -#endif /* defined(MVME187) || defined(MVME188) */ +#endif /* M88100 */ /* 197 part for return_from_exception_handler() follows... */ -#ifdef MVME197 +#ifdef M88110 ASLOCAL(m197_return_code) #define FPTR r14 ld FPTR, r31, 0 /* grab exception frame pointer */ @@ -2059,7 +2050,7 @@ ASLOCAL(m197_return_code) /* clear the dmt0 word in the E.F. */ st r0, FPTR, REG_OFF(EF_DSR) 2: -#endif /* MVME197 */ +#endif /* M88110 */ /* * If the saved ipl is 0, then call dosoftint() to process soft @@ -2076,6 +2067,7 @@ GLOBAL(check_ast) subu r31, r31, 32 bsr.n _setipl or r2,r0,1 + /* at ipl 1 now */ addu r31, r31, 32 bsr _dosoftint /* is this needed? we are going to restore the ipl below XXX nivas */ @@ -2097,45 +2089,37 @@ GLOBAL(check_ast) /* * trap(AST,...) will service ast's. */ - -#if defined(MVME187) || defined(MVME188) -#if defined(MVME197) +#ifdef M88110 or.u r2, r0, hi16(_cputyp) ld r3, r2, lo16(_cputyp) - cmp r2, r3, 0x197 - bb1 eq, r2, 1f -#endif - CALL(_C_LABEL(trap18x), T_ASTFLT, FPTR) -#if defined(MVME197) - br 2f -1: -#endif -#endif -#if defined(MVME197) + cmp r2, r3, CPU_88110 + bb0 eq, r2, 2f CALL(_C_LABEL(trap197), T_ASTFLT, FPTR) + br no_ast 2: #endif +#ifdef M88100 + CALL(_C_LABEL(trap18x), T_ASTFLT, FPTR) +#endif #if 0 /* assert that ipl is 0; if going back to user, it should be 0 */ bsr _getipl - bcnd eq0, r2, 2f + bcnd eq0, r2, 3f bsr _panic -2: +3: #endif ASGLOBAL(no_ast) /* disable interrupts */ - ldcr r1, PSR set r1, r1, 1<PSR_INTERRUPT_DISABLE_BIT> FLUSH_PIPELINE stcr r1, PSR /* now ready to return....*/ - ld r2, FPTR, REG_OFF(EF_MASK) /* get pre-exception ipl */ bsr.n _setipl subu r31, r31, 40 @@ -2145,7 +2129,6 @@ ASGLOBAL(no_ast) * Transfer the frame pointer to r31, since we no longer need a stack. * No page faults here, and interrupts are disabled. */ - or r31, r0, FPTR /* restore r1 later */ ld.d r2 , r31, GENREG_OFF(2) @@ -2170,18 +2153,20 @@ ASGLOBAL(no_ast) FLUSH_PIPELINE stcr r1, PSR + /* reload the control regs*/ +#ifdef M88110 or.u r1, r0, hi16(_cputyp) ld r1, r1, lo16(_cputyp) - cmp r1, r1, 0x197 - bb0 eq, r1, 1f - + cmp r1, r30, CPU_88110 + bb1 ne, r1, 1f + /* mc88110 needs the EXIP */ ld r30, r31, REG_OFF(EF_SNIP) ld r1, r31, REG_OFF(EF_SXIP) stcr r30, SNIP stcr r1, SXIP br 2f 1: - /* reload the control regs*/ +#endif st r0, r31, REG_OFF(EF_IPFSR) st r0, r31, REG_OFF(EF_DPFSR) @@ -2212,7 +2197,7 @@ ASGLOBAL(no_ast) ASGLOBAL(return_from_exception) RTE -#ifdef MVME197 +#ifdef M88110 /*#########################################################################*/ /*#### THE ACTUAL EXCEPTION HANDLER ENTRY POINTS - MVME197 ################*/ /*#########################################################################*/ @@ -2376,7 +2361,6 @@ GLOBAL(m197_userbpt) #endif /* DDB */ /*--------------------------------------------------------------------------*/ - /* * The error exception handler. * The error exception is raised when any other non-trap exception is raised @@ -2934,17 +2918,16 @@ ASGLOBAL(m197_fpu_enable) /* * If it's not the interrupt exception, enable interrupts and * take care of any data access exceptions...... - * -#if INTSTACK - * If interrupt exception, switch to interrupt stack if not - * already there. Else, switch to kernel stack. -#endif */ or r30, r0, r31 /* get a copy of the e.f. pointer */ ld r2, r31, REG_OFF(EF_EPSR) bb1 PSR_SUPERVISOR_MODE_BIT, r2, 1f /* If in kernel mode */ #if INTSTACK + /* + * If interrupt exception, switch to interrupt stack if not + * already there. Else, switch to kernel stack. + */ ld r3, r31, REG_OFF(EF_VECTOR) cmp r3, r3, 1 /* is interrupt ? */ bb0 eq, r3, 2f diff --git a/sys/arch/mvme88k/mvme88k/locore.S b/sys/arch/mvme88k/mvme88k/locore.S index 7d2a677e7ac..8fbce094c4f 100644 --- a/sys/arch/mvme88k/mvme88k/locore.S +++ b/sys/arch/mvme88k/mvme88k/locore.S @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.S,v 1.22 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: locore.S,v 1.23 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -94,9 +94,9 @@ GLOBAL(doboot) */ #ifdef MVME188 /* check if it's a mvme188 */ - or.u r4, r0, hi16(_C_LABEL(cputyp)) - ld r3, r4, lo16(_C_LABEL(cputyp)) - cmp r4, r3, 0x188 + or.u r4, r0, hi16(_C_LABEL(brdtyp)) + ld r3, r4, lo16(_C_LABEL(brdtyp)) + cmp r4, r3, BRD_188 bb1 ne, r4, 1f bsr _C_LABEL(m188_reset) br m188_doboot_fail @@ -140,7 +140,7 @@ GLOBAL(start_text) /* This is the *real* start upon poweron or reset */ */ /* * (*entry)(flag, bugargs.ctrl_addr, cp, kernel.smini, - * kernel.emini, bootdev, cputyp); + * kernel.emini, bootdev, brdtyp); */ or.u r13, r0, hi16(_boothowto) st r2, r13, lo16(_boothowto) @@ -154,8 +154,21 @@ GLOBAL(start_text) /* This is the *real* start upon poweron or reset */ #endif or.u r13, r0, hi16(_bootdev) st r7, r13, lo16(_bootdev) + or.u r13, r0, hi16(_brdtyp) + st r8, r13, lo16(_brdtyp) + + /* set _cputyp */ + cmp r2, r8, BRD_197 /* r8 contains brdtyp */ + bb1 ne, r2, 1f /* if it's a '197, CPU is 88110 */ + or.u r13, r0, hi16(CPU_88110) + or r8, r13, lo16(CPU_88110)/* r8 contains 0x110 */ + br 2f +1: + or.u r13, r0, hi16(CPU_88100) + or r8, r13, lo16(CPU_88100)/* r8 contains 0x100 */ +2: or.u r13, r0, hi16(_cputyp) - st r8, r13, lo16(_cputyp) + st r8, r13, lo16(_cputyp) /* r8 contains cputyp */ /* * CPU Initialization @@ -191,8 +204,9 @@ GLOBAL(start_text) /* This is the *real* start upon poweron or reset */ * * jfriedl@omron.co.jp */ - cmp r2, r8, 0x197 /* r8 contains cputyp */ - bb1 eq, r2, 1f /* if it's a '197, skip SSBR */ + + cmp r2, r8, CPU_88110 /* r8 contains cputyp */ + bb1 eq, r2, 1f /* if it's a 'mc88110, skip SSBR */ stcr r0, SSBR /* clear this for later */ 1: stcr r0, SR0 /* clear "current thread" */ @@ -206,8 +220,9 @@ GLOBAL(start_text) /* This is the *real* start upon poweron or reset */ stcr r11, PSR stcr r0, VBR /* set Vector Base Register to 0, ALWAYS! */ FLUSH_PIPELINE - cmp r2, r8, 0x197 /* r8 contains cputyp */ + cmp r2, r8, CPU_88110 /* r8 contains cputyp */ bb1 eq, r2, master_start /* if it's a '197, skip to master_start */ + #if 0 /* clear BSS. Boot loader might have already done this... */ or.u r2, r0, hi16(_edata) @@ -296,17 +311,17 @@ ASGLOBAL(master_start) or r31, r31, lo16(_intstack_end) clr r31, r31, 3<0> /* round down to 8-byte boundary */ -#ifdef MVME197 - cmp r2, r8, 0x197 /* r8 contains cputyp */ - bb1 ne, r2, 1f /* if it's a '197, use different vectors */ +#ifdef M88110 + cmp r2, r8, CPU_88110 /* r8 contains cputyp */ + bb1 ne, r2, 1f /* if it's a 'mc88110, use different vectors */ or.u r3, r0, hi16(_m197_vector_list) or r3, r3, lo16(_m197_vector_list) bsr.n _vector_init ldcr r2, VBR br 2f -#endif /* MVME197 */ +#endif /* M88110 */ 1: -#if defined(MVME187) || defined(MVME188) +#ifdef M88100 /* * Want to make the call: * vector_init(VBR, vector_list) @@ -315,7 +330,7 @@ ASGLOBAL(master_start) or r3, r3, lo16(_vector_list) bsr.n _vector_init ldcr r2, VBR -#endif /* defined(MVME187) || defined(MVME188) */ +#endif /* M88100 */ 2: /* still on int stack */ bsr.n _mvme_bootstrap @@ -390,21 +405,22 @@ GLOBAL(spin_cpu) /*****************************************************************************/ data +#ifdef M88100 .align 4096 /* VBR points to page aligned list */ -#if defined(MVME187) || defined(MVME188) global _vector_list, _vector_list_end _vector_list: /* references memory BELOW this line */ #include "machine/exception_vectors.h" _vector_list_end: word END_OF_VECTOR_LIST -#endif /* defined(MVME187) || defined(MVME188) */ -#ifdef MVME197 +#endif /* M88100 */ +#ifdef M88110 + .align 4096 /* VBR points to page aligned list */ global _m197_vector_list, _m197_vector_list_end -_m197_vector_list: /* references memory BELOW this line */ +_m197_vector_list: /* references memory BELOW this line */ #include "machine/exception_vectors2.h" _m197_vector_list_end: word END_OF_VECTOR_LIST -#endif /* MVME197 */ +#endif /* M88110 */ .align 4096 /* SDT (segment descriptor table */ global _kernel_sdt _kernel_sdt: diff --git a/sys/arch/mvme88k/mvme88k/locore_c_routines.c b/sys/arch/mvme88k/mvme88k/locore_c_routines.c index 88fcd848e6c..68f2aadd38a 100644 --- a/sys/arch/mvme88k/mvme88k/locore_c_routines.c +++ b/sys/arch/mvme88k/mvme88k/locore_c_routines.c @@ -1,4 +1,4 @@ -/* $OpenBSD: locore_c_routines.c,v 1.16 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: locore_c_routines.c,v 1.17 2001/12/19 07:04:41 smurph Exp $ */ /* * Mach Operating System * Copyright (c) 1993-1991 Carnegie Mellon University @@ -62,8 +62,23 @@ #define DMT_HALF 2 #define DMT_WORD 4 -extern volatile u_char *int_mask_level; /* machdep.c */ +typedef struct { + unsigned word_one, + word_two; +} m88k_exception_vector_area; + +extern volatile unsigned int * int_mask_reg[MAX_CPUS]; /* in machdep.c */ +extern unsigned master_cpu; /* in cmmu.c */ +#if defined(MVME187) || defined(MVME197) +extern u_char *int_mask_level; +extern u_char *int_pri_level; +#endif /* defined(MVME187) || defined(MVME197) */ + +/* FORWARDS */ +void vector_init(m88k_exception_vector_area *vector, unsigned *vector_init_list); + +#ifdef M88100 static struct { unsigned char offset; unsigned char size; @@ -73,6 +88,7 @@ static struct { {0, DMT_BYTE}, {0, 0}, {0, 0}, {0, 0}, {0, DMT_HALF}, {0, 0}, {0, 0}, {0, DMT_WORD} }; +#endif #ifdef DATA_DEBUG int data_access_emulation_debug = 0; @@ -94,7 +110,7 @@ void setlevel __P((int)); void db_setlevel __P((int)); #endif -#if defined(MVME187) || defined(MVME188) +#ifdef M88100 void dae_print(unsigned *eframe) { @@ -136,7 +152,6 @@ dae_print(unsigned *eframe) } } -#endif /* defined(MVME187) || defined(MVME188) */ void data_access_emulation(unsigned *eframe) @@ -281,6 +296,7 @@ data_access_emulation(unsigned *eframe) } eframe[EF_DMT0] = 0; } +#endif /* M88100 */ /* *********************************************************************** @@ -292,13 +308,6 @@ data_access_emulation(unsigned *eframe) #define EMPTY_BR 0xC0000000U /* empty "br" instruction */ #define NO_OP 0xf4005800U /* "or r0, r0, r0" */ -typedef struct { - unsigned word_one, - word_two; -} m88k_exception_vector_area; - -void vector_init __P((m88k_exception_vector_area *, unsigned *)); - #define BRANCH(FROM, TO) (EMPTY_BR | ((unsigned)(TO) - (unsigned)(FROM)) >> 2) #define SET_VECTOR(NUM, to, VALUE) { \ @@ -329,8 +338,8 @@ vector_init(m88k_exception_vector_area *vector, unsigned *vector_init_list) } switch (cputyp) { -#ifdef MVME197 - case CPU_197: +#ifdef M88110 + case CPU_88110: while (num < 496) { SET_VECTOR(num, to, m197_sigsys); num++; @@ -348,9 +357,8 @@ vector_init(m88k_exception_vector_area *vector, unsigned *vector_init_list) SET_VECTOR(511, to, m197_userbpt); break; #endif /* MVME197 */ -#if defined(MVME187) || defined(MVME188) - case CPU_187: - case CPU_188: +#ifdef M88100 + case CPU_88100: while (num < 496) { SET_VECTOR(num, to, sigsys); num++; @@ -485,16 +493,16 @@ spl(void) int cpu = 0; /* prevent warning */ #endif psr = disable_interrupts_return_psr(); - switch (cputyp) { + switch (brdtyp) { #ifdef MVME188 - case CPU_188: + case BRD_188: cpu = cpu_number(); curspl = m188_curspl[cpu]; break; #endif /* MVME188 */ #if defined(MVME187) || defined(MVME197) - case CPU_187: - case CPU_197: + case BRD_187: + case BRD_197: curspl = *int_mask_level; break; #endif /* defined(MVME187) || defined(MVME197) */ @@ -514,16 +522,16 @@ db_spl(void) #endif psr = disable_interrupts_return_psr(); - switch (cputyp) { + switch (brdtyp) { #ifdef MVME188 - case CPU_188: + case BRD_188: cpu = cpu_number(); curspl = m188_curspl[cpu]; break; #endif /* MVME188 */ #if defined(MVME187) || defined(MVME197) - case CPU_187: - case CPU_197: + case BRD_187: + case BRD_197: curspl = *int_mask_level; break; #endif /* defined(MVME187) || defined(MVME197) */ @@ -560,17 +568,17 @@ setipl(unsigned level) } psr = disable_interrupts_return_psr(); - switch (cputyp) { + switch (brdtyp) { #ifdef MVME188 - case CPU_188: + case BRD_188: cpu = cpu_number(); curspl = m188_curspl[cpu]; setlevel(level); break; #endif /* MVME188 */ #if defined(MVME187) || defined(MVME197) - case CPU_187: - case CPU_197: + case BRD_187: + case BRD_197: curspl = *int_mask_level; *int_mask_level = level; break; @@ -598,17 +606,17 @@ db_setipl(unsigned level) #endif psr = disable_interrupts_return_psr(); - switch (cputyp) { + switch (brdtyp) { #ifdef MVME188 - case CPU_188: + case BRD_188: cpu = cpu_number(); curspl = m188_curspl[cpu]; db_setlevel(level); break; #endif /* MVME188 */ #if defined(MVME187) || defined(MVME197) - case CPU_187: - case CPU_197: + case BRD_187: + case BRD_197: curspl = *int_mask_level; *int_mask_level = level; break; diff --git a/sys/arch/mvme88k/mvme88k/m18x_cmmu.c b/sys/arch/mvme88k/mvme88k/m18x_cmmu.c index 6336d28e47f..78b287b6eb8 100644 --- a/sys/arch/mvme88k/mvme88k/m18x_cmmu.c +++ b/sys/arch/mvme88k/mvme88k/m18x_cmmu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: m18x_cmmu.c,v 1.16 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: m18x_cmmu.c,v 1.17 2001/12/19 07:04:41 smurph Exp $ */ /* * Copyright (c) 1998 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -340,9 +340,9 @@ m18x_setup_board_config() volatile unsigned long *whoami; master_cpu = 0; /* temp to get things going */ - switch (cputyp) { + switch (brdtyp) { #ifdef MVME187 - case CPU_187: + case BRD_187: vme188_config = 10; /* There is no WHOAMI reg on MVME1x7 - fake it... */ cmmu[0].cmmu_regs = (void *)SBC_CMMU_I; cmmu[0].cmmu_cpu = 0; @@ -359,7 +359,7 @@ m18x_setup_board_config() break; #endif /* defined(MVME187) */ #ifdef MVME188 - case CPU_188: + case BRD_188: whoami = (volatile unsigned long *)MVME188_WHOAMI; vme188_config = (*whoami & 0xf0) >> 4; dprintf(DB_CMMU,("m18x_setup_board_config: WHOAMI @ 0x%08x holds value 0x%08x vme188_config = %d\n", @@ -415,7 +415,7 @@ m18x_setup_cmmu_config() union cpupid id; id.cpupid = cmmu[cmmu_num].cmmu_regs->idr; - if (id.m88200.type != M88200 && id.m88200.type != M88204) { + if (id.m88200.type != M88200_ID && id.m88200.type != M88204_ID) { printf("WARNING: non M8820x circuit found at CMMU address 0x%08x\n", cmmu[cmmu_num].cmmu_regs); continue; @@ -444,7 +444,7 @@ m18x_setup_cmmu_config() cpu_sets[num] = 1; /* This cpu installed... */ id.cpupid = cmmu[num*cpu_cmmu_ratio].cmmu_regs->idr; - if (id.m88200.type == M88204) + if (id.m88200.type == M88204_ID) printf("CPU%d is attached with %d MC88204 CMMUs\n", num, cpu_cmmu_ratio); else @@ -621,13 +621,13 @@ m18x_cmmu_dump_config() DEBUG_MSG("Current CPU/CMMU configuration:\n\n"); - switch (cputyp) { + switch (brdtyp) { #ifdef MVME187 - case CPU_187: + case BRD_187: DEBUG_MSG("VME1x7 split mode\n\n"); #endif /* defined(MVME187) */ #ifdef MVME188 - case CPU_188: + case BRD_188: pcnfa = (volatile unsigned long *)MVME188_PCNFA; pcnfb = (volatile unsigned long *)MVME188_PCNFB; DEBUG_MSG("VME188 address decoder: PCNFA = 0x%1x, PCNFB = 0x%1x\n\n", *pcnfa & 0xf, *pcnfb & 0xf); @@ -833,7 +833,7 @@ m18x_cmmu_init() } /* 88204 has additional cache to clear */ - if (id.m88200.type == M88204) { + if (id.m88200.type == M88204_ID) { for (tmp = 0; tmp < 255; tmp++) { cmmu[cmmu_num].cmmu_regs->sar = tmp<<4; cmmu[cmmu_num].cmmu_regs->cssp1 = 0x3f0ff000; @@ -903,7 +903,7 @@ m18x_cmmu_init() * We enable it for instruction cmmus as well so that we can have * breakpoints, etc, and modify code. */ - if (cputyp == CPU_188) { + if (brdtyp == BRD_188) { tmp = ! CMMU_SCTR_PE | /* not parity enable */ CMMU_SCTR_SE | /* snoop enable */ @@ -967,7 +967,7 @@ m18x_cmmu_shutdown_now() * Now set some state as we like... */ for (cmmu_num = 0; cmmu_num < MAX_CMMUS; cmmu_num++) { - if (cputyp == CPU_188) { + if (brdtyp == BRD_188) { tmp = ! CMMU_SCTR_PE | /* parity enable */ ! CMMU_SCTR_SE | /* snoop enable */ diff --git a/sys/arch/mvme88k/mvme88k/machdep.c b/sys/arch/mvme88k/mvme88k/machdep.c index af190cf1756..acf5f522730 100644 --- a/sys/arch/mvme88k/mvme88k/machdep.c +++ b/sys/arch/mvme88k/mvme88k/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.75 2001/12/16 23:49:46 miod Exp $ */ +/* $OpenBSD: machdep.c,v 1.76 2001/12/19 07:04:42 smurph Exp $ */ /* * Copyright (c) 1998, 1999, 2000, 2001 Steve Murphree, Jr. * Copyright (c) 1996 Nivas Madhur @@ -102,6 +102,7 @@ #include <mvme88k/dev/sysconreg.h> #include <mvme88k/dev/pcctworeg.h> +#include <mvme88k/dev/busswreg.h> #include "assym.h" /* EF_EPSR, etc. */ #include "ksyms.h" @@ -251,6 +252,8 @@ extern char *esym; int boothowto; /* read in locore.S */ int bootdev; /* read in locore.S */ int cputyp; +int brdtyp; /* set in locore.S */ +int cpumod = 0; /* set in mvme_bootstrap() */ int cpuspeed = 25; /* 25 MHZ XXX should be read from NVRAM */ vm_offset_t first_addr = 0; @@ -282,7 +285,8 @@ static struct consdev bootcons = { bootcnpollc, NULL, makedev(14,0), - 1}; + 1 +}; /* * Console initialization: called early on from main, @@ -351,10 +355,11 @@ size_memory() break; *look = save; } - if ((look > (unsigned int *)0x01FFF000) && (cputyp == CPU_188)) { + if ((look > (unsigned int *)0x01FFF000) && (brdtyp == BRD_188)) { /* temp hack to fake 32Meg on MVME188 */ look = (unsigned int *)0x01FFF000; } + physmem = btoc(trunc_page((unsigned)look)); /* in pages */ return (trunc_page((unsigned)look)); } @@ -397,8 +402,7 @@ void identifycpu() { cpuspeed = getcpuspeed(); - sprintf(cpu_model, "Motorola MVME%x %dMhz", cputyp, cpuspeed); - printf("\nModel: %s\n", cpu_model); + printf("\nModel: Motorola MVME%x %dMhz\n", brdtyp, cpuspeed); } /* @@ -517,14 +521,27 @@ cpu_startup() /* * Grab machine dependant memory spaces */ - switch (cputyp) { + switch (brdtyp) { #ifdef MVME187 - case CPU_187: + case BRD_187: + /* + * Grab the SRAM space that we hardwired in pmap_bootstrap + */ + sramva = SRAM_START; + uvm_map(kernel_map, (vaddr_t *)&sramva, SRAM_SIZE, + NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE, + UVM_PROT_NONE, + UVM_INH_NONE, + UVM_ADV_NORMAL, 0)); + + if (sramva != SRAM_START) { + printf("sramva %x: SRAM not free\n", sramva); + panic("bad sramva"); + } #endif #ifdef MVME197 - case CPU_197: + case BRD_197: #endif - #if defined(MVME187) || defined(MVME197) /* * Grab the BUGROM space that we hardwired in pmap_bootstrap @@ -542,21 +559,6 @@ cpu_startup() } /* - * Grab the SRAM space that we hardwired in pmap_bootstrap - */ - sramva = SRAM_START; - uvm_map(kernel_map, (vaddr_t *)&sramva, SRAM_SIZE, - NULL, UVM_UNKNOWN_OFFSET, 0, UVM_MAPFLAG(UVM_PROT_NONE, - UVM_PROT_NONE, - UVM_INH_NONE, - UVM_ADV_NORMAL, 0)); - - if (sramva != SRAM_START) { - printf("sramva %x: SRAM not free\n", sramva); - panic("bad sramva"); - } - - /* * Grab the OBIO space that we hardwired in pmap_bootstrap */ obiova = OBIO_START; @@ -572,7 +574,7 @@ cpu_startup() break; #endif #ifdef MVME188 - case CPU_188: + case BRD_188: /* * Grab the UTIL space that we hardwired in pmap_bootstrap */ @@ -1324,9 +1326,9 @@ setupiackvectors() * map a page in for phys address 0xfffe0000 (M187) and set the * addresses for various levels. */ - switch (cputyp) { + switch (brdtyp) { #ifdef MVME187 - case CPU_187: + case BRD_187: #ifdef MAP_VEC /* do for MVME188 too */ vaddr = (u_char *)iomap_mapin(M187_IACK, NBPG, 1); #else @@ -1335,7 +1337,7 @@ setupiackvectors() break; #endif /* MVME187 */ #ifdef MVME188 - case CPU_188: + case BRD_188: #ifdef MAP_VEC /* do for MVME188 too */ vaddr = (u_char *)iomap_mapin(M188_IACK, NBPG, 1); #else @@ -1350,11 +1352,11 @@ setupiackvectors() ivec[6] = vaddr + 0x18; ivec[7] = vaddr + 0x1c; ivec[8] = vaddr + 0x20; /* for self inflicted interrupts */ - *ivec[8] = M188_IVEC; /* supply a vector for m188ih */ + *ivec[8] = M188_IVEC; /* supply a vector base for m188ih */ break; #endif /* MVME188 */ #ifdef MVME197 - case CPU_197: + case BRD_197: #ifdef MAP_VEC /* do for MVME188 too */ vaddr = (u_char *)iomap_mapin(M197_IACK, NBPG, 1); #else @@ -1368,7 +1370,7 @@ setupiackvectors() #endif #if defined(MVME187) || defined(MVME197) - if (cputyp != CPU_188) { + if (brdtyp != BRD_188) { ivec[0] = vaddr + 0x03; /* We dont use level 0 */ ivec[1] = vaddr + 0x07; ivec[2] = vaddr + 0x0b; @@ -1794,7 +1796,7 @@ sbc_ext_int(u_int v, struct m88100_saved_state *eframe) out: #ifdef MVME187 - if (cputyp != CPU_197) { + if (brdtyp != BRD_197) { if (eframe->dmt0 & DMT_VALID) { trap18x(T_DATAFLT, eframe); data_access_emulation((unsigned *)eframe); @@ -2102,13 +2104,13 @@ regdump(struct trapframe *f) printf("R24-29: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", R(24),R(25),R(26),R(27),R(28),R(29)); printf("R30-31: 0x%08x 0x%08x\n",R(30),R(31)); - if (cputyp == CPU_197) { + if (cputyp == CPU_88110) { printf("exip %x enip %x\n", f->sxip, f->snip); } else { printf("sxip %x snip %x sfip %x\n", f->sxip, f->snip, f->sfip); } -#if defined(MVME187) || defined(MVME188) - if (f->vector == 0x3 && cputyp != CPU_197) { +#ifdef M88100 + if (f->vector == 0x3 && cputyp != CPU_88110) { /* print dmt stuff for data access fault */ printf("dmt0 %x dmd0 %x dma0 %x\n", f->dmt0, f->dmd0, f->dma0); printf("dmt1 %x dmd1 %x dma1 %x\n", f->dmt1, f->dmd1, f->dma1); @@ -2116,7 +2118,7 @@ regdump(struct trapframe *f) printf("fault type %d\n", (f->dpfsr >> 16) & 0x7); dae_print((unsigned *)f); } - if (longformat && cputyp != CPU_197) { + if (longformat && cputyp != CPU_88110) { printf("fpsr %x ", f->fpsr); printf("fpcr %x ", f->fpcr); printf("epsr %x ", f->epsr); @@ -2137,7 +2139,7 @@ regdump(struct trapframe *f) printf("cpu %x\n", f->cpu); } #endif -#ifdef MVME197 +#ifdef M88110 if (longformat && cputyp == CPU_197) { printf("fpsr %x ", f->fpsr); printf("fpcr %x ", f->fpcr); @@ -2159,7 +2161,7 @@ regdump(struct trapframe *f) } #endif #ifdef MVME188 - if (cputyp == CPU_188 ) { + if (brdtyp == BRD_188 ) { unsigned int istr, cur_mask; istr = *(volatile int *)IST_REG; @@ -2190,19 +2192,19 @@ mvme_bootstrap() buginit(); /* init the bug routines */ bugbrdid(&brdid); - cputyp = brdid.brdno; + brdtyp = brdid.brdno; /* to support the M8120. It's based off of MVME187 */ - if (cputyp == 0x8120) - cputyp = CPU_187; + if (brdtyp == BRD_8120) + brdtyp = BRD_187; /* * set up interrupt and fp exception handlers * based on the machine. */ - switch (cputyp) { + switch (brdtyp) { #ifdef MVME188 - case CPU_188: + case BRD_188: mdfp.interrupt_func = &m188_ext_int; mdfp.fp_precise_func = &m88100_Xfp_precise; /* clear and disable all interrupts */ @@ -2213,13 +2215,13 @@ mvme_bootstrap() break; #endif /* MVME188 */ #ifdef MVME187 - case CPU_187: + case BRD_187: mdfp.interrupt_func = &sbc_ext_int; mdfp.fp_precise_func = &m88100_Xfp_precise; break; #endif /* MVME187 */ #ifdef MVME197 - case CPU_197: + case BRD_197: mdfp.interrupt_func = &sbc_ext_int; mdfp.fp_precise_func = &m88110_Xfp_precise; set_tcfp(); /* Set Time Critical Floating Point Mode */ @@ -2246,7 +2248,7 @@ mvme_bootstrap() printf("CPU%d is master CPU\n", master_cpu); #ifdef notevenclose - if (cputyp == CPU_188 && (boothowto & RB_MINIROOT)) { + if (brdtyp == BRD_188 && (boothowto & RB_MINIROOT)) { int i; for (i=0; i<MAX_CPUS; i++) { if (!spin_cpu(i)) @@ -2260,13 +2262,13 @@ mvme_bootstrap() * Steal MSGBUFSIZE at the top of physical memory for msgbuf */ avail_end -= round_page(MSGBUFSIZE); + #ifdef DEBUG - printf("MVME%x boot: memory from 0x%x to 0x%x\n", cputyp, avail_start, avail_end); + printf("MVME%x boot: memory from 0x%x to 0x%x\n", brdtyp, avail_start, avail_end); #endif pmap_bootstrap((vm_offset_t)trunc_page((unsigned)&kernelstart) /* = loadpt */, &avail_start, &avail_end, &virtual_avail, &virtual_end); - /* * Tell the VM system about available physical memory. * mvme88k only has one segment. diff --git a/sys/arch/mvme88k/mvme88k/pmap.c b/sys/arch/mvme88k/mvme88k/pmap.c index 14d7a2e85e6..a96ce89f73a 100644 --- a/sys/arch/mvme88k/mvme88k/pmap.c +++ b/sys/arch/mvme88k/mvme88k/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.54 2001/12/16 23:49:47 miod Exp $ */ +/* $OpenBSD: pmap.c,v 1.55 2001/12/19 07:04:42 smurph Exp $ */ /* * Copyright (c) 1996 Nivas Madhur * All rights reserved. @@ -165,7 +165,7 @@ kpdt_entry_t kpdt_free; #define M1x7_PDT_SIZE 0 #endif -#define OBIO_PDT_SIZE ((cputyp == CPU_188) ? M188_PDT_SIZE : M1x7_PDT_SIZE) +#define OBIO_PDT_SIZE ((brdtyp == BRD_188) ? M188_PDT_SIZE : M1x7_PDT_SIZE) #define MAX_KERNEL_PDT_SIZE (KERNEL_PDT_SIZE + OBIO_PDT_SIZE) /* @@ -387,9 +387,21 @@ m88k_protection(pmap_t map, vm_prot_t prot) p.bits = 0; p.pte.prot = (prot & VM_PROT_WRITE) ? 0 : 1; - +#ifdef M88110 + if (cputyp == CPU_88110) { + p.pte.pg_used = 1; + p.pte.modified = p.pte.prot ? 0 : 1; + /* if the map is the kernel's map and since this + * is not a paged kernel, we go ahead and mark + * the page as modified to avoid an exception + * upon writing to the page the first time. XXX smurph + */ + if (map == kernel_pmap) { + p.pte.modified = p.pte.prot ? 0 : 1; + } + } +#endif return (p.bits); - } /* m88k_protection */ /* @@ -601,7 +613,7 @@ pmap_map(vm_offset_t virt, vm_offset_t start, vm_offset_t end, vm_prot_t prot) *pte = template.pte; #ifdef MVME197 /* hack for MVME197 */ - if (cputyp == CPU_197 && m197_atc_initialized == FALSE) { + if (brdtyp == BRD_197 && m197_atc_initialized == FALSE) { int i; for (i = 0; i < 32; i++) @@ -973,8 +985,8 @@ pmap_bootstrap(vm_offset_t load_start, #ifdef DEBUG if ((pmap_con_dbg & (CD_BOOT | CD_FULL)) == (CD_BOOT | CD_FULL)) { - printf("kernel_pmap->sdt_paddr = %x\n",kernel_pmap->sdt_paddr); - printf("kernel_pmap->sdt_vaddr = %x\n",kernel_pmap->sdt_vaddr); + printf("kernel_pmap->sdt_paddr = 0x%x\n",kernel_pmap->sdt_paddr); + printf("kernel_pmap->sdt_vaddr = 0x%x\n",kernel_pmap->sdt_vaddr); } /* init double-linked list of pmap structure */ kernel_pmap->next = kernel_pmap; @@ -993,8 +1005,8 @@ pmap_bootstrap(vm_offset_t load_start, * Just to be consistent, we will maintain the shadow table for * kernel pmap also. */ - kernel_pmap_size = 2*SDT_SIZE; + #ifdef DEBUG printf("kernel segment table from 0x%x to 0x%x\n", kernel_pmap->sdt_vaddr, kernel_pmap->sdt_vaddr + kernel_pmap_size); @@ -1106,7 +1118,7 @@ pmap_bootstrap(vm_offset_t load_start, * used by the 1x7 ethernet driver. Remove this when that is fixed. * XXX -nivas */ - if (cputyp != CPU_188) { /* != CPU_188 */ + if (brdtyp != BRD_188) { /* != BRD_188 */ *phys_start = vaddr; etherlen = ETHERPAGES * NBPG; etherbuf = (void *)vaddr; @@ -1525,7 +1537,7 @@ pmap_pinit(pmap_t p) #endif #ifdef MVME188 - if (cputyp == CPU_188) { + if (brdtyp == BRD_188) { /* * memory for page tables should be CACHE DISABLED on MVME188 */ @@ -2429,7 +2441,7 @@ pmap_expand(pmap_t map, vm_offset_t v) pmap_extract(kernel_pmap, pdt_vaddr, &pdt_paddr); #ifdef MVME188 - if (cputyp == CPU_188) { + if (brdtyp == BRD_188) { /* * the page for page tables should be CACHE DISABLED on MVME188 */ diff --git a/sys/arch/mvme88k/mvme88k/pmap_table.c b/sys/arch/mvme88k/mvme88k/pmap_table.c index b314ed54ae2..5c20ec3c2ae 100644 --- a/sys/arch/mvme88k/mvme88k/pmap_table.c +++ b/sys/arch/mvme88k/mvme88k/pmap_table.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap_table.c,v 1.11 2001/12/16 23:49:47 miod Exp $ */ +/* $OpenBSD: pmap_table.c,v 1.12 2001/12/19 07:04:42 smurph Exp $ */ /* * Mach Operating System @@ -63,7 +63,6 @@ static pmap_table_entry m188_board_table[] = { #ifdef MVME197 static pmap_table_entry m197_board_table[] = { { BUGROM_START, BUGROM_START, BUGROM_SIZE, RW, CI}, - { SRAM_START , SRAM_START , SRAM_SIZE , RW, CG}, { OBIO_START , OBIO_START , OBIO_SIZE , RW, CI}, { 0 , 0 , 0xffffffff , 0 , 0}, }; @@ -76,19 +75,19 @@ pmap_table_build(endoftext) unsigned int i; pmap_table_t bt, pbt; - switch (cputyp) { + switch (brdtyp) { #ifdef MVME187 - case CPU_187: + case BRD_187: bt = m187_board_table; break; #endif #ifdef MVME188 - case CPU_188: + case BRD_188: bt = m188_board_table; break; #endif #ifdef MVME197 - case CPU_197: + case BRD_197: bt = m197_board_table; break; #endif |