initial sgi import

75 files changed, 7831 insertions, 0 deletions

diff --git a/sys/arch/sgi/conf/GENERIC b/sys/arch/sgi/conf/GENERIC
new file mode 100644
index 00000000000..278774f2b92
--- /dev/null
+++ b/sys/arch/sgi/conf/GENERIC
@@ -0,0 +1,117 @@
+#	$OpenBSD: GENERIC,v 1.1 2004/08/06 21:12:18 pefo Exp $
+#
+
+machine		sgi mips64
+
+include "../../../conf/GENERIC"
+
+maxusers	32
+
+# Make options
+#makeoption	ISALEV="-mips3 -mlong64 -fno-builtin"
+makeoption	ISALEV="-mips2 -D_MIPS_ISA=_MIPS_ISA_MIPS2" 
+makeoption	ENDIAN="-EB"
+
+# MD options
+option		NATIVE_ELF	# Systems uses ELF as native format
+#option		COMPAT_O32	# Mips o32 ABI compat
+#option		DB_ELFSIZE=32
+
+#option		APERTURE
+
+#option		WSDISPLAY_COMPAT_RAWKBD
+
+option		UVM
+#option		UVMHIST		# enable uvm history logging
+
+#option		DEBUG
+#option		SYSCALL_DEBUG
+
+# Define what targets to support
+#option		TGT_INDY
+#option		TGT_INDIGO
+#option		TGT_ORIGIN200
+option		TGT_O2
+#option		TGT_OCTANE
+
+# Specify storage configuration (its a joke..)
+config		bsd	swap generic
+
+#
+# Definition of system
+#
+mainbus0	at root
+cpu*		at mainbus0
+
+#### Main local buses
+#crimebus0	at mainbus0
+macebus0	at mainbus0	# MACE controller localbus.
+
+# Localbus devices
+clock0		at macebus0
+com0		at macebus0 sys 0x18 base 0x00390000 irq 5
+com1		at macebus0 sys 0x18 base 0x00398000 irq 5
+
+#### PCI Bus
+macepcibr0	at macebus0	# MACE controller PCI Bus bridge.
+pci*		at macepcibr?
+
+#### SCSI
+ahc*		at pci? dev ? function ?
+siop*		at pci? dev ? function ?
+scsibus*	at siop?
+scsibus*	at ahc?
+
+#### NICs
+dc*		at pci? dev ? function ?	# 21143, "tulip" clone ethernet
+ep*		at pci? dev ? function ?	# 3Com 3c59x
+fxp*		at pci? dev ? function ?	# EtherExpress 10/100B ethernet
+mtd*		at pci? dev ? function ?	# Myson MTD803 3-in-1 Ethernet
+ne*		at pci? dev ? function ?	# NE2000-compatible Ethernet
+ti*		at pci? dev ? function ?	# Alteon ACEnic gigabit Ethernet
+vr*		at pci? dev ? function ?	# VIA Rhine Fast Ethernet
+xl*		at pci? dev ? function ?	# 3C9xx ethernet
+
+
+
+##### Media Independent Interface (mii) drivers
+exphy*		at mii? phy ?		# 3Com internal PHYs
+inphy*		at mii? phy ?		# Intel 82555 PHYs
+iophy*		at mii? phy ?		# Intel 82553 PHYs
+icsphy*		at mii? phy ?		# ICS 1890 PHYs
+lxtphy*		at mii? phy ?		# Level1 LXT970 PHYs
+nsphy*		at mii? phy ?		# NS and compatible PHYs
+nsphyter*	at mii? phy ?		# NS and compatible PHYs
+qsphy*		at mii? phy ?		# Quality Semi QS6612 PHYs
+sqphy*		at mii? phy ?		# Seeq 8x220 PHYs
+rlphy*		at mii? phy ?		# RealTek 8139 internal PHYs
+mtdphy*		at mii? phy ?		# Myson MTD972 PHYs
+dcphy*		at mii? phy ?		# Digital Clone PHYs
+acphy*		at mii? phy ?		# Altima AC101 PHYs
+amphy*		at mii? phy ?		# AMD 79C873 PHYs
+tqphy*		at mii? phy ?		# TDK 78Q212x PHYs
+bmtphy*		at mii? phy ?		# Broadcom 10/100 PHYs
+brgphy*		at mii? phy ?		# Broadcom Gigabit PHYs
+eephy*		at mii? phy ?		# Marvell 88E1000 series PHY
+xmphy*		at mii? phy ?		# XaQti XMAC-II PHYs
+nsgphy*		at mii? phy ?		# NS gigabit PHYs
+urlphy*		at mii? phy ?		# Realtek RTL8150L internal PHY
+rgephy*		at mii? phy ?		# Realtek 8169S/8110S PHY
+ukphy*		at mii? phy ?		# "unknown" PHYs
+
+
+
+#### WS console
+#wsdisplay*	at vga? console?
+#wskbd*		at ukbd? console ? mux 1
+
+#### SCSI Bus devices
+
+sd*		at scsibus? target ? lun ?
+st*		at scsibus? target ? lun ?
+cd*		at scsibus? target ? lun ?
+ch*		at scsibus? target ? lun ?
+ss*		at scsibus? target ? lun ?
+uk*		at scsibus? target ? lun ?
+
+#pseudo-device	wsmux	2	# mouse & keyboard multiplexor
diff --git a/sys/arch/sgi/conf/Makefile.sgi b/sys/arch/sgi/conf/Makefile.sgi
new file mode 100644
index 00000000000..ab3f0f601db
--- /dev/null
+++ b/sys/arch/sgi/conf/Makefile.sgi
@@ -0,0 +1,188 @@
+#	$OpenBSD: Makefile.sgi,v 1.1 2004/08/06 21:12:18 pefo Exp $
+
+# Makefile for OpenBSD
+#
+# This makefile is constructed from a machine description:
+#	config ``machineid''
+# Most changes should be made in the machine description
+#	/sys/arch/sgi/conf/``machineid''
+# after which you should do
+#	 config ``machineid''
+# Machine generic makefile changes should be made in
+#	/sys/arch/sgi/conf/Makefile.``machinetype''
+# after which config should be rerun for all machines of that type.
+#
+# N.B.: NO DEPENDENCIES ON FOLLOWING FLAGS ARE VISIBLE TO MAKEFILE
+#	IF YOU CHANGE THE DEFINITION OF ANY OF THESE RECOMPILE EVERYTHING
+#
+# -DTRACE	compile in kernel tracing hooks
+# -DQUOTA	compile in file system quotas
+
+
+# DEBUG is set to -g if debugging
+# PROF is set to -pg if profiling
+
+AS?=	as
+CC?=	cc
+MKDEP?=	mkdep
+CPP?=	cpp
+LD?=	ld ${ENDIAN}
+STRIP?=	strip
+TOUCH?=	touch
+ISALEV?=-mips3 -mlong64 -fno-builtin
+CPP+=${ENDIAN}
+CC+=${ENDIAN}
+AS+=${ENDIAN}
+LD+=${ENDIAN}
+
+# source tree is located via $S relative to the compilation directory
+.ifndef S
+S!=	cd ../../../..; pwd
+.endif
+SGI=$S/arch/sgi
+MIPS64=	$S/arch/mips64
+
+INCLUDES=	-I. -I$S/arch -I$S
+CPPFLAGS=	${INCLUDES} ${IDENT} -D_KERNEL -Dmips_cachealias -D__sgi__
+
+CDIAGFLAGS=	-Werror -Wall -Wmissing-prototypes -Wstrict-prototypes \
+		-Wno-uninitialized -Wno-format -Wno-main
+
+CFLAGS=		${DEBUG} -O2 ${CDIAGFLAGS} -mno-abicalls ${ISALEV} \
+		${COPTS}
+AFLAGS=		-x assembler-with-cpp -traditional-cpp -mno-abicalls ${ISALEV} -D_LOCORE
+
+### find out what to use for libkern
+.include "$S/lib/libkern/Makefile.inc"
+.ifndef PROF
+LIBKERN=	${KERNLIB}
+.else
+LIBKERN=	${KERNLIB_PROF}
+.endif
+
+### find out what to use for libcompat
+.include "$S/compat/common/Makefile.inc"
+.ifndef PROF
+LIBCOMPAT=	${COMPATLIB}
+.else
+LIBCOMPAT=	${COMPATLIB_PROF}
+.endif
+
+# compile rules: rules are named ${TYPE}_${SUFFIX}${CONFIG_DEP}
+# where TYPE is NORMAL, DRIVER, or PROFILE}; SUFFIX is the file suffix,
+# capitalized (e.g. C for a .c file), and CONFIG_DEP is _C if the file
+# is marked as config-dependent.
+
+USRLAND_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+USRLAND_C_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $<
+
+NORMAL_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+NORMAL_C_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $<
+
+DRIVER_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c $<
+DRIVER_C_C=	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} ${PARAM} -c $<
+
+NORMAL_S=	${CC} ${AFLAGS} ${CPPFLAGS} -c $<
+NORMAL_S_C=	${AS}  ${COPTS} ${PARAM} $< -o $@
+
+%OBJS
+
+%CFILES
+
+%SFILES
+
+# load lines for config "xxx" will be emitted as:
+# xxx: ${SYSTEM_DEP} swapxxx.o
+#	${SYSTEM_LD_HEAD}
+#	${SYSTEM_LD} swapxxx.o
+#	${SYSTEM_LD_TAIL}
+
+SYSTEM_OBJ=	locore.o ${OBJS} param.o ioconf.o \
+		${LIBKERN} ${LIBCOMPAT}
+#
+SYSTEM_DEP=	Makefile ${SYSTEM_OBJ}
+SYSTEM_LD_HEAD=	rm -f $@
+SYSTEM_LD=	-@if [ X${DEBUG} = X-g ]; \
+		then strip=-X; \
+		else strip=-x; \
+		fi; \
+		echo ${LD} $$strip -o $@ -e start -T ../../conf/ld.script \
+			'$${SYSTEM_OBJ}' vers.o; \
+		${LD} $$strip -o $@ -e start -T ../../conf/ld.script \
+			${SYSTEM_OBJ} vers.o
+#
+SYSTEM_LD_TAIL=	chmod 755 $@; \
+		size $@
+
+%LOAD
+
+newvers:
+	sh $S/conf/newvers.sh
+	${CC} $(CFLAGS) -c vers.c
+
+clean::
+	rm -f eddep bsd bsd.gdb bsd.ecoff tags *.o locore.i [a-z]*.s \
+	    Errs errs linterrs makelinks 
+
+lint: /tmp param.c
+	@lint -hbxn -DGENERIC -Dvolatile= ${COPTS} ${PARAM} -UKGDB \
+	    ${CFILES} ioconf.c param.c
+
+symbols.sort: ${SGI}/sgi/symbols.raw
+	grep -v '^#' ${SGI}/sgi/symbols.raw \
+	    | sed 's/^	//' | sort -u > symbols.sort
+
+locore.o: ${SGI}/sgi/locore.S ${MIPS64}/include/asm.h \
+	${MIPS64}/include/cpu.h ${MIPS64}/include/reg.h assym.h
+	${NORMAL_S} ${ISALEV} ${SGI}/sgi/locore.S
+
+# the following are necessary because the files depend on the types of
+# cpu's included in the system configuration
+clock.o machdep.o autoconf.o conf.o: Makefile
+
+# depend on network configuration
+uipc_domain.o uipc_proto.o vfs_conf.o: Makefile
+if_tun.o if_loop.o if_ethersubr.o: Makefile
+if_arp.o if_ether.o: Makefile
+ip_input.o ip_output.o in_pcb.o in_proto.o: Makefile
+tcp_subr.o tcp_timer.o tcp_output.o: Makefile
+
+
+assym.h: $S/kern/genassym.sh ${SGI}/sgi/genassym.cf Makefile
+	sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} \
+	    ${PARAM} < ${SGI}/sgi/genassym.cf > assym.h.tmp && \
+	    mv -f assym.h.tmp assym.h
+
+links:
+	egrep '#if' ${CFILES} | sed -f $S/conf/defines | \
+	  sed -e 's/:.*//' -e 's/\.c/.o/' | sort -u > dontlink
+	echo ${CFILES} | tr -s ' ' '\12' | sed 's/\.c/.o/' | \
+	  sort -u | comm -23 - dontlink | \
+	  sed 's,../.*/\(.*.o\),rm -f \1;ln -s ../GENERIC/\1 \1,' > makelinks
+	sh makelinks && rm -f dontlink
+
+tags:
+	@echo "see $S/kern/Makefile for tags"
+
+ioconf.o: ioconf.c
+	${NORMAL_C}
+
+param.c: $S/conf/param.c
+	rm -f param.c
+	cp $S/conf/param.c .
+
+param.o: param.c Makefile
+	${NORMAL_C_C}
+
+newvers: ${SYSTEM_DEP} ${SYSTEM_SWAP_DEP}
+	sh $S/conf/newvers.sh
+	${CC} ${CFLAGS} ${CPPFLAGS} ${PROF} -c vers.c
+
+depend:: .depend
+.depend: ${SRCS} assym.h param.c
+	mkdep ${AFLAGS} ${CPPFLAGS} ${SGI}/sgi/locore.s
+	mkdep -a ${CFLAGS} ${CPPFLAGS} param.c ioconf.c ${CFILES}
+#	mkdep -a ${AFLAGS} ${CPPFLAGS} ${SFILES}
+
+%RULES
+
diff --git a/sys/arch/sgi/conf/RAMDISK b/sys/arch/sgi/conf/RAMDISK
new file mode 100644
index 00000000000..f04f512f6de
--- /dev/null
+++ b/sys/arch/sgi/conf/RAMDISK
@@ -0,0 +1,137 @@
+#	$OpenBSD: RAMDISK,v 1.1 2004/08/06 21:12:18 pefo Exp $
+#
+
+machine		sgi mips64
+
+maxusers	4
+option		TIMEZONE=0	# minutes west of GMT (for)
+option		DST=0		# use daylight savings rules
+
+# Make options
+makeoption	ISALEV="-mips2 -D_MIPS_ISA=_MIPS_ISA_MIPS2"
+makeoption	ENDIAN="-EB"
+
+# Standard system options
+option		SWAPPAGER	# swap pager (anonymous and swap space)
+option		DEVPAGER	# device pager (mapped devices)
+
+option 		UVM		# uses unified VM system
+option		NATIVE_ELF	# Systems uses ELF as native format
+
+option		DIAGNOSTIC	# extra kernel debugging checks
+#option		DEBUG		# extra kernel debugging support
+option		DDB
+
+# Filesystem options
+option		CD9660		# ISO 9660 + Rock Ridge file system
+#option		FDESC		# user file descriptor filesystem (/dev/fd)
+option		FIFO		# POSIX fifo support (in all filesystems)
+option		FFS		# fast filesystem
+option		KERNFS		# kernel data-structure filesystem
+#option		MFS		# memory-based filesystem
+#option		MSDOSFS		# Ability to read write MS-Dos filsystem
+option		NFSCLIENT	# Sun NFS-compatible filesystem (client)
+#option		NULLFS		# null layer filesystem
+#option		PROCFS		# /proc
+
+
+# Networking options
+#option		GATEWAY		# IP packet forwarding
+option		INET		# Internet protocols
+#option		NS		# XNS
+#option		IPX		# IPX+SPX
+#option		ISO,TPIP	# OSI networking
+#option		EON		# OSI tunneling over IP
+
+# RAMDISK stuff
+option		MINIROOTSIZE=8192
+option		RAMDISK_HOOKS
+
+# Define what targets to support
+option		TGT_O2
+
+# Specify storage configuration using ramdisk
+config		bsd	root on rd0a swap on rd0b
+
+#
+# Definition of system
+#
+mainbus0	at root
+cpu*		at mainbus0
+
+#### Main local buses
+
+macebus0	at mainbus0	# MACE controller localbus.
+
+#### Localbus devices
+
+clock0		at macebus0
+com0		at macebus0 sys 0x18 base 0x00390000 irq 5
+com1		at macebus0 sys 0x18 base 0x00398000 irq 5
+
+#### PCI Bus
+macepcibr0	at macebus0 	# MACE controller PCI Bus bridge.
+pci*		at macepcibr?	# PCI is on pci bridge
+
+#### SCSI controllers
+ahc*		at pci? dev ? function ?
+siop*		at pci? dev ? function ?
+
+#### NICs
+dc*		at pci? dev ? function ?	# 21143, "tulip" clone ethernet
+ep*		at pci? dev ? function ?	# 3Com 3c59x
+fxp*		at pci? dev ? function ?	# EtherExpress 10/100B ethernet
+mtd*		at pci? dev ? function ?	# Myson MTD803 3-in-1 Ethernet
+ne*		at pci? dev ? function ?	# NE2000-compatible Ethernet
+ti*		at pci? dev ? function ?	# Alteon ACEnic gigabit Ethernet
+vr*		at pci? dev ? function ?	# VIA Rhine Fast Ethernet
+xl*		at pci? dev ? function ?	# 3C9xx ethernet
+
+
+
+##### Media Independent Interface (mii) drivers
+exphy*		at mii? phy ?		# 3Com internal PHYs
+inphy*		at mii? phy ?		# Intel 82555 PHYs
+iophy*		at mii? phy ?		# Intel 82553 PHYs
+icsphy*		at mii? phy ?		# ICS 1890 PHYs
+lxtphy*		at mii? phy ?		# Level1 LXT970 PHYs
+nsphy*		at mii? phy ?		# NS and compatible PHYs
+nsphyter*	at mii? phy ?		# NS and compatible PHYs
+qsphy*		at mii? phy ?		# Quality Semi QS6612 PHYs
+sqphy*		at mii? phy ?		# Seeq 8x220 PHYs
+rlphy*		at mii? phy ?		# RealTek 8139 internal PHYs
+mtdphy*		at mii? phy ?		# Myson MTD972 PHYs
+dcphy*		at mii? phy ?		# Digital Clone PHYs
+acphy*		at mii? phy ?		# Altima AC101 PHYs
+amphy*		at mii? phy ?		# AMD 79C873 PHYs
+tqphy*		at mii? phy ?		# TDK 78Q212x PHYs
+bmtphy*		at mii? phy ?		# Broadcom 10/100 PHYs
+brgphy*		at mii? phy ?		# Broadcom Gigabit PHYs
+eephy*		at mii? phy ?		# Marvell 88E1000 series PHY
+xmphy*		at mii? phy ?		# XaQti XMAC-II PHYs
+nsgphy*		at mii? phy ?		# NS gigabit PHYs
+urlphy*		at mii? phy ?		# Realtek RTL8150L internal PHY
+rgephy*		at mii? phy ?		# Realtek 8169S/8110S PHY
+ukphy*		at mii? phy ?		# "unknown" PHYs
+
+
+#### SCSI Bus devices
+
+scsibus*	at ahc?
+scsibus*	at siop?
+
+sd*		at scsibus? target ? lun ?
+st*		at scsibus? target ? lun ?
+cd*		at scsibus? target ? lun ?
+#ch*		at scsibus? target ? lun ?
+#ss*		at scsibus? target ? lun ?
+#uk*		at scsibus? target ? lun ?
+
+
+#### PSEUDO Devices
+
+pseudo-device	loop		 1	# network loopback
+pseudo-device	bpfilter	 1	# packet filter ports
+
+pseudo-device	rd		 1	# Ram disk.
+
diff --git a/sys/arch/sgi/conf/files.sgi b/sys/arch/sgi/conf/files.sgi
new file mode 100644
index 00000000000..700dbdd4753
--- /dev/null
+++ b/sys/arch/sgi/conf/files.sgi
@@ -0,0 +1,120 @@
+#	$OpenBSD: files.sgi,v 1.1 2004/08/06 21:12:18 pefo Exp $
+#
+# maxpartitions must be first item in files.${ARCH}
+#
+maxpartitions 16
+
+maxusers 2 8 64
+
+#	Required files
+
+file	arch/sgi/sgi/autoconf.c
+file	arch/sgi/sgi/conf.c
+file	arch/sgi/sgi/machdep.c
+file	arch/sgi/dev/wscons_machdep.c	wsdisplay
+
+#
+# Media Indepedent Interface (mii)
+#
+include "dev/mii/files.mii"
+
+#
+#	Machine-independent ATAPI drivers 
+#
+
+include "dev/atapiscsi/files.atapiscsi"
+include "dev/ata/files.ata"
+
+#
+#	System BUS types
+#
+define	mainbus {}
+device	mainbus
+attach	mainbus at root
+
+#	Our CPU configurator
+device	cpu
+attach	cpu at mainbus
+
+#
+#	MACE localbus autoconfiguration devices
+#
+define	macebus { [sys = - 1], [base = -1 ], [irq = -1] }
+device	macebus
+attach	macebus at mainbus
+file	arch/sgi/localbus/macebus.c		macebus
+file	arch/sgi/localbus/macectrl.S		macebus
+
+#
+#	PCI Bus bridges
+#
+device	macepcibr {} : pcibus
+attach	macepcibr at macebus
+file	arch/sgi/pci/macepcibridge.c		macepcibr needs-flag
+file	arch/sgi/pci/macepcimap.c		macepcibr
+
+#	Use machine independent SCSI driver routines
+include	"scsi/files.scsi"
+major	{sd = 0}
+major	{cd = 3}
+
+include "dev/i2o/files.i2o"
+
+include "dev/pci/files.pci"
+
+# Clock device
+device	clock
+attach	clock at macebus
+file	arch/sgi/sgi/clock_md.c			clock
+
+# 16[45]50-based "com" ports on localbus
+attach	com at macebus with com_localbus
+file	arch/sgi/localbus/com_lbus.c		com_localbus
+
+# PC parallel ports (XXX what chip?)
+attach	lpt at macebus with lpt_localbus
+file	arch/sgi/dev/lpt_lbus.c			lpt_localbus
+
+# Raster operations
+include "dev/rasops/files.rasops"
+include "dev/wsfont/files.wsfont"
+
+#
+#  wscons console
+#
+include "dev/wscons/files.wscons"
+
+#
+#	PCI Bus support
+#
+
+#
+# Machine-independent USB drivers
+#
+include "dev/usb/files.usb"
+
+#
+# Machine-independent IEEE1394 drivers
+#
+include "dev/ieee1394/files.ieee1394"
+
+#
+# Specials.
+#
+# RAM disk for boot
+major {rd = 8}
+
+#
+#	Common files
+#
+
+file	dev/cons.c
+file	dev/cninit.c
+file	netinet/in_cksum.c
+file	netns/ns_cksum.c			ns
+
+#
+# mips o32 ABI compat.
+#
+#include "compat/mipso32/files.mipso32"
+
diff --git a/sys/arch/sgi/conf/ld.script b/sys/arch/sgi/conf/ld.script
new file mode 100644
index 00000000000..fb0b624d553
--- /dev/null
+++ b/sys/arch/sgi/conf/ld.script
@@ -0,0 +1,74 @@
+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradbigmips",
+	      "elf32-tradlittlemips")
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = 0x80100000 + SIZEOF_HEADERS;
+  .text      :
+  {
+    _ftext = . ;
+    *(.text)
+    *(.rodata)
+    *(.rodata1)
+    *(.reginfo)
+    *(.init)
+    *(.stub)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+  } =0
+  _etext = .;
+  PROVIDE (etext = .);
+  .fini      : { *(.fini)    } =0
+  .data    :
+  {
+    _fdata = . ;
+    *(.data)
+    CONSTRUCTORS
+  }
+  .data1   : { *(.data1) }
+  .ctors         : { *(.ctors)   }
+  .dtors         : { *(.dtors)   }
+  _gp = ALIGN(16) + 0x7ff0;
+  .got           :
+  {
+    *(.got.plt) *(.got)
+   }
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  .sdata     : { *(.sdata) }
+  .lit8 : { *(.lit8) }
+  .lit4 : { *(.lit4) }
+  _edata  =  .;
+  PROVIDE (edata = .);
+  __bss_start = .;
+  _fbss = .;
+  .sbss      : { *(.sbss) *(.scommon) }
+  .bss       :
+  {
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+  /* These are needed for ELF backends which have not yet been
+     converted to the new style linker.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  /* DWARF debug sections.
+     Symbols in the .debug DWARF section are relative to the beginning of the
+     section so we begin .debug at 0.  It's not clear yet what needs to happen
+     for the others.   */
+  .debug          0 : { *(.debug) }
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  .line           0 : { *(.line) }
+  /* These must appear regardless of  .  */
+  .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
+  .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
+}
diff --git a/sys/arch/sgi/dev/lpt_lbus.c b/sys/arch/sgi/dev/lpt_lbus.c
new file mode 100644
index 00000000000..8ad2d573e3a
--- /dev/null
+++ b/sys/arch/sgi/dev/lpt_lbus.c
@@ -0,0 +1,162 @@
+/*	$OpenBSD: lpt_lbus.c,v 1.1 2004/08/06 21:12:18 pefo Exp $	*/
+
+/*
+ * Copyright (c) 1993, 1994 Charles Hannum.
+ * Copyright (c) 1990 William F. Jolitz, TeleMuse
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This software is a component of "386BSD" developed by 
+ *	William F. Jolitz, TeleMuse.
+ * 4. Neither the name of the developer nor the name "386BSD"
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS A COMPONENT OF 386BSD DEVELOPED BY WILLIAM F. JOLITZ 
+ * AND IS INTENDED FOR RESEARCH AND EDUCATIONAL PURPOSES ONLY. THIS 
+ * SOFTWARE SHOULD NOT BE CONSIDERED TO BE A COMMERCIAL PRODUCT. 
+ * THE DEVELOPER URGES THAT USERS WHO REQUIRE A COMMERCIAL PRODUCT 
+ * NOT MAKE USE OF THIS WORK.
+ *
+ * FOR USERS WHO WISH TO UNDERSTAND THE 386BSD SYSTEM DEVELOPED
+ * BY WILLIAM F. JOLITZ, WE RECOMMEND THE USER STUDY WRITTEN 
+ * REFERENCES SUCH AS THE  "PORTING UNIX TO THE 386" SERIES 
+ * (BEGINNING JANUARY 1991 "DR. DOBBS JOURNAL", USA AND BEGINNING 
+ * JUNE 1991 "UNIX MAGAZIN", GERMANY) BY WILLIAM F. JOLITZ AND 
+ * LYNNE GREER JOLITZ, AS WELL AS OTHER BOOKS ON UNIX AND THE 
+ * ON-LINE 386BSD USER MANUAL BEFORE USE. A BOOK DISCUSSING THE INTERNALS 
+ * OF 386BSD ENTITLED "386BSD FROM THE INSIDE OUT" WILL BE AVAILABLE LATE 1992.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE DEVELOPER ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE DEVELOPER BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Device Driver for AT parallel printer port
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/autoconf.h>
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/ic/lptreg.h>
+#include <dev/ic/lptvar.h>
+
+int lpt_localbus_probe __P((struct device *, void *, void *));
+void lpt_localbus_attach __P((struct device *, struct device *, void *));
+
+struct cfattach lpt_pica_ca = {
+	sizeof(struct lpt_softc), lpt_localbus_probe, lpt_localbus_attach
+};
+
+struct cfattach lpt_algor_ca = {
+	sizeof(struct lpt_softc), lpt_localbus_probe, lpt_localbus_attach
+};
+
+int
+lpt_localbus_probe(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	struct confargs *ca = aux;
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
+	bus_addr_t base;
+	u_int8_t mask, data;
+	int i;
+
+#ifdef DEBUG
+#define	ABORT								     \
+	do {								     \
+		printf("lpt_localbus_probe: mask %x data %x failed\n", mask, \
+		    data);						     \
+		return 0;						     \
+	} while (0)
+#else
+#define	ABORT	return 0
+#endif
+
+	if(!BUS_MATCHNAME(ca, "lpt"))
+		 return(0);
+
+	iot = &pmonmips_bus_io;
+	base = (bus_addr_t)BUS_CVTADDR(ca);
+	if (bus_space_map(iot, base, LPT_NPORTS, 0, &ioh)) {
+		return 0;
+        }
+
+	mask = 0xff;
+
+	data = 0x55;				/* Alternating zeros */
+	if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
+		ABORT;
+
+	data = 0xaa;				/* Alternating ones */
+	if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
+		ABORT;
+
+	for (i = 0; i < CHAR_BIT; i++) {	/* Walking zero */
+		data = ~(1 << i);
+		if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
+			ABORT;
+	}
+
+	for (i = 0; i < CHAR_BIT; i++) {	/* Walking one */
+		data = (1 << i);
+		if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
+			ABORT;
+	}
+
+	bus_space_write_1(iot, ioh, lpt_data, 0);
+	bus_space_write_1(iot, ioh, lpt_control, 0);
+
+	return 1;
+}
+
+void
+lpt_localbus_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct lpt_softc *sc = (void *)self;
+	struct confargs *ca = aux;
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
+	bus_addr_t base;
+
+	printf("\n");
+
+	sc->sc_state = 0;
+	iot = sc->sc_iot = &pmonmips_bus_io;
+	base = (bus_space_handle_t)BUS_CVTADDR(ca);
+	if (bus_space_map(iot, base, LPT_NPORTS, 0, &ioh)) {
+		panic("unexpected bus_space_map error");
+        }
+	sc->sc_ioh = ioh;
+
+	bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
+
+	BUS_INTR_ESTABLISH(ca, lptintr, sc);
+}
diff --git a/sys/arch/sgi/dev/wscons_machdep.c b/sys/arch/sgi/dev/wscons_machdep.c
new file mode 100644
index 00000000000..25a181f9a67
--- /dev/null
+++ b/sys/arch/sgi/dev/wscons_machdep.c
@@ -0,0 +1,132 @@
+/*	$OpenBSD: wscons_machdep.c,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001 Aaron Campbell
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Aaron Campbell.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/conf.h>
+#include <sys/device.h>
+#include <sys/extent.h>
+
+#include <machine/autoconf.h>
+#include <machine/bus.h>
+
+#include <dev/cons.h>
+#include <dev/ic/mc6845reg.h>
+#include <dev/ic/pcdisplayvar.h>
+#include <dev/ic/vgareg.h>
+#include <dev/ic/vgavar.h>
+
+#include "wsdisplay.h"
+#if NWSDISPLAY > 0
+#include <dev/wscons/wsdisplayvar.h>
+#endif
+#include <dev/wscons/wskbdvar.h>
+#include <dev/wscons/wsconsio.h>
+#include <dev/usb/ukbdvar.h>
+
+void wscnprobe(struct consdev *);
+void wscninit(struct consdev *);
+void wscnputc(dev_t, char);
+int wscngetc(dev_t);
+void wscnpollc(dev_t, int);
+
+
+void
+wscnprobe(cp)
+	struct consdev *cp;
+{
+	int maj;
+
+	/* locate the major number */
+	for (maj = 0; maj < nchrdev; maj++) {
+		if (cdevsw[maj].d_open == wsdisplayopen)
+			break;
+	}
+
+	if (maj == nchrdev) {
+		/* we are not in cdevsw[], give up */
+		panic("wsdisplay is not in cdevsw[]");
+	}
+
+	cp->cn_dev = makedev(maj, 0);
+	cp->cn_pri = CN_INTERNAL;
+	cp->cn_pri = CN_REMOTE;
+}
+
+void
+wscninit(cp)
+	struct consdev *cp;
+{
+static int initted;
+
+	if (initted)
+		return;
+
+	initted = 1;
+
+	if (!vga_cnattach(&sys_config.pci_io[0], &sys_config.pci_mem[0],
+	    WSDISPLAY_TYPE_PCIVGA, 1)) {
+		ukbd_cnattach();
+	}
+	return;
+}
+
+void
+wscnputc(dev, i)
+	dev_t dev;
+	char i;
+{
+	wsdisplay_cnputc(dev, (int)i);
+}
+
+int
+wscngetc(dev)
+	dev_t dev;
+{
+	int c;
+
+	wskbd_cnpollc(dev, 1);
+	c = wskbd_cngetc(dev);
+	wskbd_cnpollc(dev, 0);
+
+	return c;
+}
+
+void
+wscnpollc(dev, on)
+	dev_t dev;
+	int on;
+{
+	wskbd_cnpollc(dev, on);
+}
diff --git a/sys/arch/sgi/include/ansi.h b/sys/arch/sgi/include/ansi.h
new file mode 100644
index 00000000000..30695652224
--- /dev/null
+++ b/sys/arch/sgi/include/ansi.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: ansi.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/ansi.h>
diff --git a/sys/arch/sgi/include/arcbios.h b/sys/arch/sgi/include/arcbios.h
new file mode 100644
index 00000000000..a0b3ff03fac
--- /dev/null
+++ b/sys/arch/sgi/include/arcbios.h
@@ -0,0 +1,475 @@
+/*	$OpenBSD: arcbios.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+/*	$NetBSD: arcbios.h,v 1.5 2004/04/10 19:32:53 pooka Exp $	*/
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the NetBSD
+ *	Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * The ARC BIOS (which is similar, but not 100% compatible with SGI ARCS)
+ * specification can be found at:
+ *
+ *	http://www.microsoft.com/hwdev/download/respec/riscspec.zip
+ */
+
+#ifndef _ARCBIOS_H_
+#define _ARCBIOS_H_
+
+#define	ARCBIOS_STDIN		0
+#define	ARCBIOS_STDOUT		1
+
+#define	ARCBIOS_PAGESIZE	4096
+
+/* ARC BIOS status codes. */
+#define	ARCBIOS_ESUCCESS	0	/* Success */
+#define	ARCBIOS_E2BIG		1	/* argument list too long */
+#define	ARCBIOS_EACCES		2	/* permission denied */
+#define	ARCBIOS_EAGAIN		3	/* resource temporarily unavailable */
+#define	ARCBIOS_EBADF		4	/* bad file number */
+#define	ARCBIOS_EBUSY		5	/* device or resource busy */
+#define	ARCBIOS_EFAULT		6	/* bad address */
+#define	ARCBIOS_EINVAL		7	/* invalid argument */
+#define	ARCBIOS_EIO		8	/* I/O error */
+#define	ARCBIOS_EISDIR		9	/* is a directory */
+#define	ARCBIOS_EMFILE		10	/* too many open files */
+#define	ARCBIOS_EMLINK		11	/* too many links */
+#define	ARCBIOS_ENAMETOOLONG	12	/* file name too long */
+#define	ARCBIOS_ENODEV		13	/* no such device */
+#define	ARCBIOS_ENOENT		14	/* no such file or directory */
+#define	ARCBIOS_ENOEXEC		15	/* exec format error */
+#define	ARCBIOS_ENOMEM		16	/* out of memory */
+#define	ARCBIOS_ENOSPC		17	/* no space left on device */
+#define	ARCBIOS_ENOTDIR		18	/* not a directory */
+#define	ARCBIOS_ENOTTY		19	/* not a typewriter */
+#define	ARCBIOS_ENXIO		20	/* media not loaded */
+#define	ARCBIOS_EROFS		21	/* read-only file system */
+#if defined(__sgi__)
+#define	ARCBIOS_EADDRNOTAVAIL	31	/* address not available */
+#define	ARCBIOS_ETIMEDOUT	32	/* operation timed out */
+#define	ARCBIOS_ECONNABORTED	33	/* connection aborted */
+#define	ARCBIOS_ENOCONNECT	34	/* not connected */
+#endif /* __sgi__ */
+
+/*
+ * 4.2.2: System Parameter Block
+ */
+struct arcbios_spb {
+	uint32_t	SPBSignature;
+	uint32_t	SPBLength;
+	uint16_t	Version;
+	uint16_t	Revision;
+	void		*RestartBlock;
+	void		*DebugBlock;
+	void		*GEVector;
+	void		*UTLBMissVector;
+	uint32_t	FirmwareVectorLength;
+	void		*FirmwareVector;
+	uint32_t	PrivateVectorLength;
+	void		*PrivateVector;
+	uint32_t	AdapterCount;
+	uint32_t	AdapterType;
+	uint32_t	AdapterVectorLength;
+	void		*AdapterVector;
+};
+
+#define	ARCBIOS_SPB_SIGNATURE	0x53435241	/* A R C S */
+#define	ARCBIOS_SPB_SIGNATURE_1	0x41524353	/* S C R A */
+
+/*
+ * 4.2.5: System Configuration Data
+ */
+struct arcbios_component {
+	uint32_t	Class;
+	uint32_t	Type;
+	uint32_t	Flags;
+	uint16_t	Version;
+	uint16_t	Revision;
+	uint32_t	Key;
+	uint32_t	AffinityMask;
+	uint32_t	ConfigurationDataSize;
+	uint32_t	IdentifierLength;
+	char		*Identifier;
+};
+
+/* 
+ * SGI ARCS likes to be `special', so it moved some of the class/type 
+ * numbers around from the ARC standard definitions.
+ */
+#if defined(__sgi__)
+/* Component Class */
+#define	COMPONENT_CLASS_SystemClass		0
+#define	COMPONENT_CLASS_ProcessorClass		1
+#define	COMPONENT_CLASS_CacheClass		2
+#define	COMPONENT_CLASS_MemoryClass		3
+#define	COMPONENT_CLASS_AdapterClass		4
+#define	COMPONENT_CLASS_ControllerClass		5
+#define	COMPONENT_CLASS_PeripheralClass		6
+#else
+/* Component Class */
+#define	COMPONENT_CLASS_SystemClass		0
+#define	COMPONENT_CLASS_ProcessorClass		1
+#define	COMPONENT_CLASS_CacheClass		2
+#define	COMPONENT_CLASS_AdapterClass		3
+#define	COMPONENT_CLASS_ControllerClass		4
+#define	COMPONENT_CLASS_PeripheralClass		5
+#define	COMPONENT_CLASS_MemoryClass		6
+#endif
+
+/* Component Types */
+#if defined(__sgi__)
+/* System Class */
+#define	COMPONENT_TYPE_ARC			0
+
+/* Processor Class */
+#define	COMPONENT_TYPE_CPU			1
+#define	COMPONENT_TYPE_FPU			2
+
+/* Cache Class */
+#define	COMPONENT_TYPE_PrimaryICache		3
+#define	COMPONENT_TYPE_PrimaryDCache		4
+#define	COMPONENT_TYPE_SecondaryICache		5
+#define	COMPONENT_TYPE_SecondaryDCache		6
+#define	COMPONENT_TYPE_SecondaryCache		7
+
+/* Memory Class */
+#define	COMPONENT_TYPE_MemoryUnit		8
+
+/* Adapter Class */
+#define	COMPONENT_TYPE_EISAAdapter		9
+#define	COMPONENT_TYPE_TCAdapter		10
+#define	COMPONENT_TYPE_SCSIAdapter		11
+#define	COMPONENT_TYPE_DTIAdapter		12
+#define	COMPONENT_TYPE_MultiFunctionAdapter	13
+
+/* Controller Class */
+#define	COMPONENT_TYPE_DiskController		14
+#define	COMPONENT_TYPE_TapeController		15
+#define	COMPONENT_TYPE_CDROMController		16
+#define	COMPONENT_TYPE_WORMController		17
+#define	COMPONENT_TYPE_SerialController		18
+#define	COMPONENT_TYPE_NetworkController	19
+#define	COMPONENT_TYPE_DisplayController	20
+#define	COMPONENT_TYPE_ParallelController	21
+#define	COMPONENT_TYPE_PointerController	22
+#define	COMPONENT_TYPE_KeyboardController	23
+#define	COMPONENT_TYPE_AudioController		24
+#define	COMPONENT_TYPE_OtherController		25
+
+/* Peripheral Class */
+#define	COMPONENT_TYPE_DiskPeripheral		26
+#define	COMPONENT_TYPE_FloppyDiskPeripheral	27
+#define	COMPONENT_TYPE_TapePeripheral		28
+#define	COMPONENT_TYPE_ModemPeripheral		29
+#define	COMPONENT_TYPE_MonitorPeripheral	30
+#define	COMPONENT_TYPE_PrinterPeripheral	31
+#define	COMPONENT_TYPE_PointerPeripheral	32
+#define	COMPONENT_TYPE_KeyboardPeripheral	33
+#define	COMPONENT_TYPE_TerminalPeripheral	34
+#define	COMPONENT_TYPE_LinePeripheral		35
+#define	COMPONENT_TYPE_NetworkPeripheral	36
+#define	COMPONENT_TYPE_OtherPeripheral		37
+#else /* not __sgi__ */
+/* System Class */
+#define	COMPONENT_TYPE_ARC			0
+
+/* Processor Class */
+#define	COMPONENT_TYPE_CPU			1
+#define	COMPONENT_TYPE_FPU			2
+
+/* Cache Class */
+#define	COMPONENT_TYPE_PrimaryICache		3
+#define	COMPONENT_TYPE_PrimaryDCache		4
+#define	COMPONENT_TYPE_SecondaryICache		5
+#define	COMPONENT_TYPE_SecondaryDCache		6
+#define	COMPONENT_TYPE_SecondaryCache		7
+
+/* Adapter Class */
+#define	COMPONENT_TYPE_EISAAdapter		8
+#define	COMPONENT_TYPE_TCAdapter		9
+#define	COMPONENT_TYPE_SCSIAdapter		10
+#define	COMPONENT_TYPE_DTIAdapter		11
+#define	COMPONENT_TYPE_MultiFunctionAdapter	12
+
+/* Controller Class */
+#define	COMPONENT_TYPE_DiskController		13
+#define	COMPONENT_TYPE_TapeController		14
+#define	COMPONENT_TYPE_CDROMController		15
+#define	COMPONENT_TYPE_WORMController		16
+#define	COMPONENT_TYPE_SerialController		17
+#define	COMPONENT_TYPE_NetworkController	18
+#define	COMPONENT_TYPE_DisplayController	19
+#define	COMPONENT_TYPE_ParallelController	20
+#define	COMPONENT_TYPE_PointerController	21
+#define	COMPONENT_TYPE_KeyboardController	22
+#define	COMPONENT_TYPE_AudioController		23
+#define	COMPONENT_TYPE_OtherController		24
+
+/* Peripheral Class */
+#define	COMPONENT_TYPE_DiskPeripheral		25
+#define	COMPONENT_TYPE_FloppyDiskPeripheral	26
+#define	COMPONENT_TYPE_TapePeripheral		27
+#define	COMPONENT_TYPE_ModemPeripheral		28
+#define	COMPONENT_TYPE_MonitorPeripheral	29
+#define	COMPONENT_TYPE_PrinterPeripheral	30
+#define	COMPONENT_TYPE_PointerPeripheral	31
+#define	COMPONENT_TYPE_KeyboardPeripheral	32
+#define	COMPONENT_TYPE_TerminalPeripheral	33
+#define	COMPONENT_TYPE_OtherPeripheral		34
+#define	COMPONENT_TYPE_LinePeripheral		35
+#define	COMPONENT_TYPE_NetworkPeripheral	36
+
+/* Memory Class */
+#define	COMPONENT_TYPE_MemoryUnit		37
+#endif
+
+/* Component flags */
+#define	COMPONENT_FLAG_Failed			1
+#define	COMPONENT_FLAG_ReadOnly			2
+#define	COMPONENT_FLAG_Removable		4
+#define	COMPONENT_FLAG_ConsoleIn		8
+#define	COMPONENT_FLAG_ConsoleOut		16
+#define	COMPONENT_FLAG_Input			32
+#define	COMPONENT_FLAG_Output			64
+
+/* Key for Cache: */
+#define	COMPONENT_KEY_Cache_CacheSize(x)				\
+	(ARCBIOS_PAGESIZE << ((x) & 0xffff))
+#define	COMPONENT_KEY_Cache_LineSize(x)					\
+	(1U << (((x) >> 16) & 0xff))
+#define	COMPONENT_KEY_Cache_RefillSize(x)				\
+	(((x) >> 24) & 0xff)
+
+/*
+ * ARC system ID
+ */
+#define	ARCBIOS_SYSID_FIELDLEN		8
+struct arcbios_sysid {
+	char		VendorId[ARCBIOS_SYSID_FIELDLEN];
+	char		ProductId[ARCBIOS_SYSID_FIELDLEN];
+};
+
+/*
+ * ARC memory descriptor
+ */
+struct arcbios_mem {
+	uint32_t	Type;
+	uint32_t	BasePage;
+	uint32_t	PageCount;
+};
+
+#if defined(__sgi__)
+#define	ARCBIOS_MEM_ExceptionBlock		0
+#define	ARCBIOS_MEM_SystemParameterBlock	1
+#define	ARCBIOS_MEM_FreeContiguous		2
+#define	ARCBIOS_MEM_FreeMemory			3
+#define	ARCBIOS_MEM_BadMemory			4
+#define	ARCBIOS_MEM_LoadedProgram		5
+#define	ARCBIOS_MEM_FirmwareTemporary		6
+#define	ARCBIOS_MEM_FirmwarePermanent		7
+#elif defined(arc)
+#define	ARCBIOS_MEM_ExceptionBlock		0
+#define	ARCBIOS_MEM_SystemParameterBlock	1
+#define	ARCBIOS_MEM_FreeMemory			2
+#define	ARCBIOS_MEM_BadMemory			3
+#define	ARCBIOS_MEM_LoadedProgram		4
+#define	ARCBIOS_MEM_FirmwareTemporary		5
+#define	ARCBIOS_MEM_FirmwarePermanent		6
+#define	ARCBIOS_MEM_FreeContiguous		7
+#endif
+
+/*
+ * ARC display status
+ */
+struct arcbios_dsp_stat {
+	uint16_t	CursorXPosition;
+	uint16_t	CursorYPosition;
+	uint16_t	CursorMaxXPosition;
+	uint16_t	CursorMaxYPosition;
+	uint8_t		ForegroundColor;
+	uint8_t		BackgroundColor;
+	uint8_t		HighIntensity;
+	uint8_t		Underscored;
+	uint8_t		ReverseVideo;
+};
+
+/*
+ * ARC firmware vector
+ */
+struct arcbios_fv {
+	uint32_t	(*Load)(
+			    char *,		/* image to load */
+			    uint32_t,		/* top address */
+			    uint32_t,		/* entry address */
+			    uint32_t *);	/* low address */
+
+	uint32_t	(*Invoke)(
+			    uint32_t,		/* entry address */
+			    uint32_t,		/* stack address */
+			    uint32_t,		/* argc */
+			    char **,		/* argv */
+			    char **);		/* envp */
+
+	uint32_t	(*Execute)(
+			    char *,		/* image path */
+			    uint32_t,		/* argc */
+			    char **,		/* argv */
+			    char **);		/* envp */
+
+	void		(*Halt)(void)
+			    __attribute__((__noreturn__));
+
+	void		(*PowerDown)(void)
+			    __attribute__((__noreturn__));
+
+	void		(*Restart)(void)
+			    __attribute__((__noreturn__));
+
+	void		(*Reboot)(void)
+			    __attribute__((__noreturn__));
+
+	void		(*EnterInteractiveMode)(void)
+			    __attribute__((__noreturn__));
+#if defined(__sgi__)
+	void		*reserved0;
+#else
+	void		(*ReturnFromMain)(void)
+			    __attribute__((__noreturn__));
+#endif
+	void		*(*GetPeer)(
+			    void *);		/* component */
+
+	void		*(*GetChild)(
+			    void *);		/* component */
+
+	void		*(*GetParent)(
+			    void *);		/* component */
+
+	uint32_t	(*GetConfigurationData)(
+			    void *,		/* configuration data */
+			    void *);		/* component */
+
+	void		*(*AddChild)(
+			    void *,		/* component */
+			    void *);		/* new component */
+
+	uint32_t	(*DeleteComponent)(
+			    void *);		/* component */
+
+	uint32_t	(*GetComponent)(
+			    char *);		/* path */
+
+	uint32_t	(*SaveConfiguration)(void);
+
+	void		*(*GetSystemId)(void);
+
+	void		*(*GetMemoryDescriptor)(
+			    void *);		/* memory descriptor */
+#if defined(__sgi__)
+	void		*reserved1;
+#else
+	void		(*Signal)(
+			    uint32_t,		/* signal number */
+			    void *);		/* handler */
+#endif
+	void		*(*GetTime)(void);
+
+	uint32_t	(*GetRelativeTime)(void);
+
+	uint32_t	(*GetDirectoryEntry)(
+			    uint32_t,		/* file ID */
+			    void *,		/* directory entry */
+			    uint32_t,		/* length */
+			    uint32_t *);	/* count */
+
+	uint32_t	(*Open)(
+			    char *,		/* path */
+			    uint32_t,		/* open mode */
+			    uint32_t *);	/* file ID */
+
+	uint32_t	(*Close)(
+			    uint32_t);		/* file ID */
+
+	uint32_t	(*Read)(
+			    uint32_t,		/* file ID */
+			    void *,		/* buffer */
+			    uint32_t,		/* length */
+			    uint32_t *);	/* count */
+
+	uint32_t	(*GetReadStatus)(
+			    uint32_t);		/* file ID */
+
+	uint32_t	(*Write)(
+			    uint32_t,		/* file ID */
+			    void *,		/* buffer */
+			    uint32_t,		/* length */
+			    uint32_t *);	/* count */
+
+	uint32_t	(*Seek)(
+			    uint32_t,		/* file ID */
+			    int64_t *,		/* offset */
+			    uint32_t);		/* whence */
+
+	uint32_t	(*Mount)(
+			    char *,		/* path */
+			    uint32_t);		/* operation */
+
+	char		*(*GetEnvironmentVariable)(
+			    char *);		/* variable */
+
+	uint32_t	(*SetEnvironmentVariable)(
+			    char *,		/* variable */
+			    char *);		/* contents */
+
+	uint32_t	(*GetFileInformation)(
+			    uint32_t,		/* file ID */
+			    void *);		/* XXX */
+
+	uint32_t	(*SetFileInformation)(
+			    uint32_t,		/* file ID */
+			    uint32_t,		/* XXX */
+			    uint32_t);		/* XXX */
+
+	void		(*FlushAllCaches)(void);
+#if !defined(__sgi__)
+	uint32_t	(*TestUnicode)(
+			    uint32_t,		/* file ID */
+			    uint16_t);		/* unicode character */
+
+	void		*(*GetDisplayStatus)(
+			    uint32_t);		/* file ID */
+#endif
+};
+
+#endif /* _ARCBIOS_H_ */
diff --git a/sys/arch/sgi/include/asm.h b/sys/arch/sgi/include/asm.h
new file mode 100644
index 00000000000..997fa0dc94d
--- /dev/null
+++ b/sys/arch/sgi/include/asm.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: asm.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/asm.h>
diff --git a/sys/arch/sgi/include/autoconf.h b/sys/arch/sgi/include/autoconf.h
new file mode 100644
index 00000000000..8761e9ac4da
--- /dev/null
+++ b/sys/arch/sgi/include/autoconf.h
@@ -0,0 +1,131 @@
+/*	$OpenBSD: autoconf.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Opsycon AB, Sweden.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ * Definitions used buy autoconfiguration.
+ */
+
+#ifndef _MACHINE_AUTOCONF_H_
+#define _MACHINE_AUTOCONF_H_
+
+#include <machine/bus.h>
+
+/*
+ *  Structure holding all misc config information.
+ */
+
+struct sys_rec {
+        int     system_type;
+	struct {
+		u_int32_t type;
+		u_int32_t vers_maj;
+		u_int32_t vers_min;
+		u_int32_t clock;
+		u_int32_t clock_bus;
+		u_int32_t tlbsize;
+		u_int32_t tlbwired;
+		u_int32_t cfg_reg;
+		u_int32_t stat_reg;
+	} cpu;
+        struct mips_bus_space local;
+        struct mips_bus_space isa_io;
+        struct mips_bus_space isa_mem;
+        struct mips_bus_space pci_io[2];
+        struct mips_bus_space pci_mem[2];
+
+        int     cons_baudclk;
+        struct mips_bus_space console_io;	/* for stupid map designs */
+	struct mips_bus_space *cons_iot;
+        bus_addr_t cons_ioaddr[8];		/* up to eight loclbus tty's */
+};
+
+extern struct sys_rec sys_config; 
+
+/*
+ *  Give com.c method to find console address and speeds
+ */
+#define	COM_FREQ	(sys_config.cons_baudclk) 
+#define	CONCOM_FREQ	(sys_config.cons_baudclk) 
+#define	CONADDR		(sys_config.cons_ioaddr[0])
+
+
+/**/
+struct confargs;
+
+typedef int (*intr_handler_t)(void *);
+
+struct abus {
+	struct	device *ab_dv;		/* back-pointer to device */
+	int	ab_type;		/* bus type (see below) */
+	void	*(*ab_intr_establish)	/* bus's set-handler function */
+		    (void *, u_long, int, int, int (*)(void *), void *, char *);
+	void	(*ab_intr_disestablish)	/* bus's unset-handler function */
+		    (void *, void *);
+	caddr_t	(*ab_cvtaddr)		/* convert slot/offset to address */
+		    (struct confargs *);
+	int	(*ab_matchname)		/* see if name matches driver */
+		    (struct confargs *, char *);
+};
+
+#define	BUS_MAIN	1		/* mainbus */
+#define	BUS_LOCAL	2		/* localbus */
+#define	BUS_ISABR	3		/* ISA Bridge Bus */
+#define	BUS_PLCHLDR	4		/* placeholder */
+#define	BUS_PCIBR	5		/* PCI bridge Bus */
+
+#define BUS_INTR_ESTABLISH(ca, a, b, c, d, e, f, h)                     \
+	    (*(ca)->ca_bus->ab_intr_establish)((a),(b),(c),(d),(e),(f),(h))
+#define BUS_INTR_DISESTABLISH(ca)                                       \
+	    (*(ca)->ca_bus->ab_intr_establish)(ca)
+#define BUS_MATCHNAME(ca, name)                                         \
+	    (((ca)->ca_bus->ab_matchname) ?                             \
+	    (*(ca)->ca_bus->ab_matchname)((ca), (name)) :               \
+	    -1)
+
+struct confargs {
+	char		*ca_name;	/* Device name. */
+	struct abus	*ca_bus;	/* Bus device resides on. */
+	bus_space_tag_t ca_iot;
+	bus_space_tag_t ca_memt;
+	u_int32_t	ca_num;		/* which system */
+	u_int32_t	ca_sys;		/* which system */
+	int		ca_nreg;
+	u_int32_t	*ca_reg;
+	int		ca_nintr;
+	int32_t		ca_intr;
+	bus_addr_t	ca_baseaddr;
+};
+
+int	badaddr(void *, u_int64_t);
+
+#endif /* _MACHINE_AUTOCONF_H_ */
diff --git a/sys/arch/sgi/include/bus.h b/sys/arch/sgi/include/bus.h
new file mode 100644
index 00000000000..d1ec5c94d4a
--- /dev/null
+++ b/sys/arch/sgi/include/bus.h
@@ -0,0 +1,428 @@
+/*	$OpenBSD: bus.h,v 1.1 2004/08/06 21:12:18 pefo Exp $	*/
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB Sweden.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_BUS_H_
+#define _MACHINE_BUS_H_
+
+#include <machine/pio.h>
+
+#ifdef __STDC__
+#define CAT(a,b)	a##b
+#define CAT3(a,b,c)	a##b##c
+#else
+#define CAT(a,b)	a/**/b
+#define CAT3(a,b,c)	a/**/b/**/c
+#endif
+
+/*
+ * Bus access types.
+ */
+struct mips_bus_space;
+typedef u_long bus_addr_t;
+typedef u_long bus_size_t;
+typedef u_long bus_space_handle_t;
+typedef struct mips_bus_space *bus_space_tag_t;
+typedef struct mips_bus_space bus_space_t;
+
+struct mips_bus_space {
+	struct extent	*bus_extent;
+	bus_addr_t	bus_base;
+	bus_addr_t	bus_base_dma;
+	int32_t		bus_reverse;
+	u_int8_t	(*_space_read_1)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t);
+	void		(*_space_write_1)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t, u_int8_t);
+	u_int16_t	(*_space_read_2)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t);
+	void		(*_space_write_2)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t, u_int16_t);
+	u_int32_t	(*_space_read_4)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t);
+	void		(*_space_write_4)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t, u_int32_t);
+	u_int64_t	(*_space_read_8)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t);
+	void		(*_space_write_8)(bus_space_tag_t , bus_space_handle_t,
+			  bus_size_t, u_int64_t);
+	int		(*_space_map)(bus_space_tag_t , bus_addr_t,
+			  bus_size_t, int, bus_space_handle_t *);
+	void		(*_space_unmap)(bus_space_tag_t, bus_space_handle_t,
+			  bus_size_t);
+	int		(*_space_subregion)(bus_space_tag_t, bus_space_handle_t,
+			  bus_size_t, bus_size_t, bus_space_handle_t *);
+};
+
+#define	bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o))
+#define	bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o))
+#define	bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o))
+#define	bus_space_read_8(t, h, o) (*(t)->_space_read_8)((t), (h), (o))
+
+#define	bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v))
+#define	bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v))
+#define	bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v))
+#define	bus_space_write_8(t, h, o, v) (*(t)->_space_write_8)((t), (h), (o), (v))
+
+#define	bus_space_map(t, o, s, c, p) (*(t)->_space_map)((t), (o), (s), (c), (p))
+#define	bus_space_unmap(t, h, s) (*(t)->_space_unmap)((t), (h), (s))
+#define	bus_space_subregion(t, h, o, s, p) (*(t)->_space_map)((t), (h), (o), (s), (p))
+
+/* Helper function in pmap.c */
+int bus_mem_add_mapping(bus_addr_t, bus_size_t, int, bus_space_handle_t *);
+
+
+/*----------------------------------------------------------------------------*/
+#define bus_space_read_multi(n,m)					      \
+static __inline void							      \
+CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,     \
+     bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt)			      \
+{									      \
+	while (cnt--)							      \
+		*x++ = CAT(bus_space_read_,n)(bst, bsh, o);		      \
+}
+
+bus_space_read_multi(1,8)
+bus_space_read_multi(2,16)
+bus_space_read_multi(4,32)
+
+#define	bus_space_read_multi_8	!!! bus_space_read_multi_8 not implemented !!!
+
+/*----------------------------------------------------------------------------*/
+#define bus_space_read_region(n,m)					      \
+static __inline void							      \
+CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,    \
+     bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt)			      \
+{									      \
+	while (cnt--)							      \
+		*x++ = CAT(bus_space_read_,n)(bst, bsh, ba++);		      \
+}
+
+bus_space_read_region(1,8)
+bus_space_read_region(2,16)
+bus_space_read_region(4,32)
+
+#define	bus_space_read_region_8	!!! bus_space_read_region_8 not implemented !!!
+
+/*----------------------------------------------------------------------------*/
+#define bus_space_write_multi(n,m)					      \
+static __inline void							      \
+CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,    \
+     bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt)		      \
+{									      \
+	while (cnt--) {							      \
+		CAT(bus_space_write_,n)(bst, bsh, o, *x++);		      \
+	}								      \
+}
+
+bus_space_write_multi(1,8)
+bus_space_write_multi(2,16)
+bus_space_write_multi(4,32)
+
+#define	bus_space_write_multi_8	!!! bus_space_write_multi_8 not implemented !!!
+
+/*----------------------------------------------------------------------------*/
+#define bus_space_write_region(n,m)					      \
+static __inline void							      \
+CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,   \
+     bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt)		      \
+{									      \
+	while (cnt--) {							      \
+		CAT(bus_space_write_,n)(bst, bsh, ba, *x++);		      \
+		ba += sizeof(x);					      \
+	}								      \
+}
+
+bus_space_write_region(1,8)
+bus_space_write_region(2,16)
+bus_space_write_region(4,32)
+
+#define	bus_space_write_region_8					      \
+    !!! bus_space_write_region_8 not implemented !!!
+
+/*----------------------------------------------------------------------------*/
+#define bus_space_set_region(n,m)					      \
+static __inline void							      \
+CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,     \
+     bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt)			      \
+{									      \
+	while (cnt--) {							      \
+		CAT(bus_space_write_,n)(bst, bsh, ba, x);		      \
+		ba += sizeof(x);					      \
+	}								      \
+}
+
+bus_space_set_region(1,8)
+bus_space_set_region(2,16)
+bus_space_set_region(4,32)
+
+/*----------------------------------------------------------------------------*/
+#define	bus_space_read_raw_multi(n,m,l)					      \
+static __inline void							      \
+CAT(bus_space_read_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \
+    bus_addr_t ba, u_int8_t *buf, bus_size_t cnt)			      \
+{									      \
+	CAT(bus_space_read_multi_,n)(bst, bsh, ba, (CAT3(u_int,m,_t) *)buf,   \
+	    cnt >> l);							      \
+}
+
+bus_space_read_raw_multi(2,16,1)
+bus_space_read_raw_multi(4,32,2)
+
+#define	bus_space_read_raw_multi_8 \
+    !!! bus_space_read_raw_multi_8 not implemented !!!
+
+/*----------------------------------------------------------------------------*/
+#define	bus_space_write_raw_multi(n,m,l)				      \
+static __inline void							      \
+CAT(bus_space_write_raw_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,\
+    bus_addr_t ba, const u_int8_t *buf, bus_size_t cnt)			      \
+{									      \
+	CAT(bus_space_write_multi_,n)(bst, bsh, ba,			      \
+	    (const CAT3(u_int,m,_t) *)buf, cnt >> l);			      \
+}
+
+bus_space_write_raw_multi(2,16,1)
+bus_space_write_raw_multi(4,32,2)
+
+#define	bus_space_write_raw_multi_8 \
+    !!! bus_space_write_raw_multi_8 not implemented !!!
+
+/*----------------------------------------------------------------------------*/
+static __inline void
+bus_space_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1,
+	bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+	char *s = (char *)(h1 + o1);
+	char *d = (char *)(h2 + o2);
+
+	while (c--)
+		*d++ = *s++;
+}
+
+
+static __inline void
+bus_space_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1,
+	bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+	short *s = (short *)(h1 + o1);
+	short *d = (short *)(h2 + o2);
+
+	while (c--)
+		*d++ = *s++;
+}
+
+static __inline void
+bus_space_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1,
+	bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
+	int *s = (int *)(h1 + o1);
+	int *d = (int *)(h2 + o2);
+
+	while (c--)
+		*d++ = *s++;
+}
+
+#define bus_space_copy_8 \
+    !!! bus_space_write_raw_multi_8 not implemented !!!
+
+/*----------------------------------------------------------------------------*/
+/*
+ * Bus read/write barrier methods.
+ *
+ *	void bus_space_barrier(bus_space_tag_t tag,
+ *	    bus_space_handle_t bsh, bus_size_t offset,
+ *	    bus_size_t len, int flags);
+ * 
+ */
+#define bus_space_barrier(t, h, o, l, f)	\
+	((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))  
+#define BUS_SPACE_BARRIER_READ  0x01		/* force read barrier */ 
+#define BUS_SPACE_BARRIER_WRITE 0x02		/* force write barrier */
+/* Compatibility defines */
+#define BUS_BARRIER_READ        BUS_SPACE_BARRIER_READ
+#define BUS_BARRIER_WRITE       BUS_SPACE_BARRIER_WRITE
+
+
+#define	BUS_DMA_WAITOK		0x00
+#define	BUS_DMA_NOWAIT		0x01
+#define	BUS_DMA_ALLOCNOW	0x02
+#define	BUS_DMAMEM_NOSYNC	0x04
+#define	BUS_DMA_COHERENT	0x08
+#define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
+#define	BUS_DMA_BUS2		0x20
+#define	BUS_DMA_BUS3		0x40
+#define	BUS_DMA_BUS4		0x80
+#define BUS_DMA_READ            0x100   /* mapping is device -> memory only */
+#define BUS_DMA_WRITE           0x200   /* mapping is memory -> device only */
+#define BUS_DMA_STREAMING       0x400   /* hint: sequential, unidirectional */
+
+/* Forwards needed by prototypes below. */
+struct mbuf;
+struct proc;
+struct uio;
+
+#define	BUS_DMASYNC_POSTREAD	0x0001
+#define BUS_DMASYNC_POSTWRITE	0x0002
+#define BUS_DMASYNC_PREREAD	0x0004
+#define BUS_DMASYNC_PREWRITE	0x0008
+typedef int bus_dmasync_op_t;
+
+typedef struct machine_bus_dma_tag	*bus_dma_tag_t;
+typedef struct machine_bus_dmamap	*bus_dmamap_t;
+
+/*
+ *	bus_dma_segment_t
+ *
+ *	Describes a single contiguous DMA transaction.  Values
+ *	are suitable for programming into DMA registers.
+ */
+struct machine_bus_dma_segment {
+	bus_addr_t	ds_addr;	/* DMA address */
+	bus_addr_t	ds_vaddr;	/* CPU address */
+	bus_size_t	ds_len;		/* length of transfer */
+};
+typedef struct machine_bus_dma_segment	bus_dma_segment_t;
+
+/*
+ *	bus_dma_tag_t
+ *
+ *	A machine-dependent opaque type describing the implementation of
+ *	DMA for a given bus.
+ */
+
+struct machine_bus_dma_tag {
+	void	*_cookie;		/* cookie used in the guts */
+
+	/*
+	 * DMA mapping methods.
+	 */
+	int	(*_dmamap_create)(bus_dma_tag_t , bus_size_t, int,
+		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
+	void	(*_dmamap_destroy)(bus_dma_tag_t , bus_dmamap_t);
+	int	(*_dmamap_load)(bus_dma_tag_t , bus_dmamap_t, void *,
+		    bus_size_t, struct proc *, int);
+	int	(*_dmamap_load_mbuf)(bus_dma_tag_t , bus_dmamap_t,
+		    struct mbuf *, int);
+	int	(*_dmamap_load_uio)(bus_dma_tag_t , bus_dmamap_t,
+		    struct uio *, int);
+	int	(*_dmamap_load_raw)(bus_dma_tag_t , bus_dmamap_t,
+		    bus_dma_segment_t *, int, bus_size_t, int);
+	void	(*_dmamap_unload)(bus_dma_tag_t , bus_dmamap_t);
+	void	(*_dmamap_sync)(bus_dma_tag_t , bus_dmamap_t,
+		    bus_addr_t, bus_size_t, int);
+
+	/*
+	 * DMA memory utility functions.
+	 */
+	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
+		    bus_size_t, bus_dma_segment_t *, int, int *, int);
+	void	(*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
+	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
+		    int, size_t, caddr_t *, int);
+	void	(*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
+	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
+		    int, off_t, int, int);
+	paddr_t	dma_offs;
+};
+
+#define	bus_dmamap_create(t, s, n, m, b, f, p)			\
+	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
+#define	bus_dmamap_destroy(t, p)				\
+	(*(t)->_dmamap_destroy)((t), (p))
+#define	bus_dmamap_load(t, m, b, s, p, f)			\
+	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
+#define	bus_dmamap_load_mbuf(t, m, b, f)			\
+	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
+#define	bus_dmamap_load_uio(t, m, u, f)				\
+	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
+#define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
+	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
+#define	bus_dmamap_unload(t, p)					\
+	(*(t)->_dmamap_unload)((t), (p))
+#define	bus_dmamap_sync(t, p, a, l, o)				\
+	(void)((t)->_dmamap_sync ?				\
+	    (*(t)->_dmamap_sync)((t), (p), (a), (l), (o)) : (void)0)
+
+#define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
+	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
+#define	bus_dmamem_free(t, sg, n)				\
+	(*(t)->_dmamem_free)((t), (sg), (n))
+#define	bus_dmamem_map(t, sg, n, s, k, f)			\
+	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
+#define	bus_dmamem_unmap(t, k, s)				\
+	(*(t)->_dmamem_unmap)((t), (k), (s))
+#define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
+	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
+
+int	_dmamap_create(bus_dma_tag_t, bus_size_t, int,
+	    bus_size_t, bus_size_t, int, bus_dmamap_t *);
+void	_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
+int	_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
+	    bus_size_t, struct proc *, int);
+int	_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
+int	_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
+int	_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
+	    bus_dma_segment_t *, int, bus_size_t, int);
+void	_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
+void	_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
+	    bus_size_t, int);
+
+int	_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
+	    bus_size_t, bus_dma_segment_t *, int, int *, int);
+void	_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int);
+int	_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *,
+	    int, size_t, caddr_t *, int);
+void	_dmamem_unmap(bus_dma_tag_t, caddr_t, size_t);
+paddr_t	_dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, int);
+int	_dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t,
+	    bus_dma_segment_t *, int, int *, int, vaddr_t, vaddr_t);
+
+/*
+ *	bus_dmamap_t
+ *
+ *	Describes a DMA mapping.
+ */
+struct machine_bus_dmamap {
+	/*
+	 * PRIVATE MEMBERS: not for use by machine-independent code.
+	 */
+	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
+	int		_dm_segcnt;	/* number of segs this map can map */
+	bus_size_t	_dm_maxsegsz;	/* largest possible segment */
+	bus_size_t	_dm_boundary;	/* don't cross this */
+	int		_dm_flags;	/* misc. flags */
+
+	void		*_dm_cookie;	/* cookie for bus-specific functions */
+
+	/*
+	 * PUBLIC MEMBERS: these are used by machine-independent code.
+	 */
+	bus_size_t	dm_mapsize;	/* size of the mapping */
+	int		dm_nsegs;	/* # valid segments in mapping */
+	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
+};
+
+#endif /* _MACHINE_BUS_H_ */
diff --git a/sys/arch/sgi/include/cdefs.h b/sys/arch/sgi/include/cdefs.h
new file mode 100644
index 00000000000..476278fafec
--- /dev/null
+++ b/sys/arch/sgi/include/cdefs.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: cdefs.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/cdefs.h>
diff --git a/sys/arch/sgi/include/cpu.h b/sys/arch/sgi/include/cpu.h
new file mode 100644
index 00000000000..2c56835ee63
--- /dev/null
+++ b/sys/arch/sgi/include/cpu.h
@@ -0,0 +1,6 @@
+/*	$OpenBSD: cpu.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/cpu.h>
+
diff --git a/sys/arch/sgi/include/cpustate.h b/sys/arch/sgi/include/cpustate.h
new file mode 100644
index 00000000000..d915f5c2428
--- /dev/null
+++ b/sys/arch/sgi/include/cpustate.h
@@ -0,0 +1,3 @@
+/*	$OpenBSD: cpustate.h,v 1.1 2004/08/06 21:12:18 pefo Exp $ */
+
+#include <mips64/cpustate.h>
diff --git a/sys/arch/sgi/include/db_machdep.h b/sys/arch/sgi/include/db_machdep.h
new file mode 100644
index 00000000000..43621cb7c22
--- /dev/null
+++ b/sys/arch/sgi/include/db_machdep.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: db_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/db_machdep.h>
diff --git a/sys/arch/sgi/include/disklabel.h b/sys/arch/sgi/include/disklabel.h
new file mode 100644
index 00000000000..8e56377a893
--- /dev/null
+++ b/sys/arch/sgi/include/disklabel.h
@@ -0,0 +1,110 @@
+/*	$OpenBSD: disklabel.h,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+/*	$NetBSD: disklabel.h,v 1.3 1996/03/09 20:52:54 ghudson Exp $	*/
+
+/*
+ * Copyright (c) 1994 Christopher G. Demetriou
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Christopher G. Demetriou.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MACHINE_DISKLABEL_H_
+#define _MACHINE_DISKLABEL_H_
+
+#define	LABELSECTOR	1		/* sector containing label */
+#define	LABELOFFSET	0		/* offset of label in sector */
+#define	MAXPARTITIONS	16		/* number of partitions */
+#define	RAW_PART	2		/* raw partition: ie. rsd0c */
+
+/* DOS partition table -- located in boot block */
+#define	DOSBBSECTOR	0		/* DOS boot block relative sector # */
+#define	DOSPARTOFF	446
+#define DOSACTIVE	0x80
+#define	NDOSPART	4
+#define DOSMBR_SIGNATURE	0xAA55
+#define DOSMBR_SIGNATURE_OFF	0x1FE
+
+struct dos_partition {
+	u_int8_t	dp_flag;	/* bootstrap flags */
+	u_int8_t	dp_shd;		/* starting head */
+	u_int8_t	dp_ssect;	/* starting sector */
+	u_int8_t	dp_scyl;	/* starting cylinder */
+	u_int8_t	dp_typ;		/* partition type (see below) */
+	u_int8_t	dp_ehd;		/* end head */
+	u_int8_t	dp_esect;	/* end sector */
+	u_int8_t	dp_ecyl;	/* end cylinder */
+	u_int32_t	dp_start;	/* absolute starting sector number */
+	u_int32_t	dp_size;	/* partition size in sectors */
+};
+
+/* Known DOS partition types. */
+#define	DOSPTYP_UNUSED	0x00		/* Unused partition */
+#define DOSPTYP_FAT12	0x01		/* 12-bit FAT */
+#define DOSPTYP_FAT16S	0x04		/* 16-bit FAT, less than 32M */
+#define DOSPTYP_EXTEND	0x05		/* Extended; contains sub-partitions */
+#define DOSPTYP_FAT16B	0x06		/* 16-bit FAT, more than 32M */
+#define DOSPTYP_FAT32	0x0b		/* 32-bit FAT */
+#define DOSPTYP_FAT32L	0x0c		/* 32-bit FAT, LBA-mapped */
+#define DOSPTYP_FAT16L	0x0e		/* 16-bit FAT, LBA-mapped */
+#define DOSPTYP_ONTRACK	0x54
+#define DOSPTYP_EXTENDL 0x0f		/* Extended, LBA-mapped; contains sub-partitions */
+#define	DOSPTYP_LINUX	0x83		/* That other thing */
+#define DOSPTYP_FREEBSD	0xa5		/* FreeBSD partition type */
+#define DOSPTYP_OPENBSD	0xa6		/* OpenBSD partition type */
+#define DOSPTYP_NETBSD	0xa9		/* NetBSD partition type */
+
+#include <sys/dkbad.h>
+struct cpu_disklabel {
+	struct dos_partition dosparts[NDOSPART];
+	struct dkbad bad;
+};
+
+#define DKBAD(x) ((x)->bad)
+
+/* Isolate the relevant bits to get sector and cylinder. */
+#define	DPSECT(s)	((s) & 0x3f)
+#define	DPCYL(c, s)	((c) + (((s) & 0xc0) << 2))
+
+static __inline u_int32_t get_le __P((void *));
+
+static __inline u_int32_t
+#ifdef __cplusplus
+get_le(void *p)
+#else
+get_le(p)
+	void *p;
+#endif
+{
+	u_int8_t *_p = (u_int8_t *)p;
+	u_int32_t x;
+	x = _p[0];
+	x |= _p[1] << 8;
+	x |= _p[2] << 16;
+	x |= _p[3] << 24;
+	return x;
+}
+
+#endif /* _MACHINE_DISKLABEL_H_ */
diff --git a/sys/arch/sgi/include/dlfcn.h b/sys/arch/sgi/include/dlfcn.h
new file mode 100644
index 00000000000..815cef633e1
--- /dev/null
+++ b/sys/arch/sgi/include/dlfcn.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: dlfcn.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/dlfcn.h>
diff --git a/sys/arch/sgi/include/ecoff_machdep.h b/sys/arch/sgi/include/ecoff_machdep.h
new file mode 100644
index 00000000000..23bd9003d24
--- /dev/null
+++ b/sys/arch/sgi/include/ecoff_machdep.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: ecoff_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/ecoff_machdep.h>
diff --git a/sys/arch/sgi/include/endian.h b/sys/arch/sgi/include/endian.h
new file mode 100644
index 00000000000..82fa9b6a860
--- /dev/null
+++ b/sys/arch/sgi/include/endian.h
@@ -0,0 +1,3 @@
+/*	$OpenBSD: endian.h,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+
+#include <mips64/endian.h>
diff --git a/sys/arch/sgi/include/exec.h b/sys/arch/sgi/include/exec.h
new file mode 100644
index 00000000000..256af3ea9dd
--- /dev/null
+++ b/sys/arch/sgi/include/exec.h
@@ -0,0 +1,177 @@
+/*	$OpenBSD: exec.h,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+
+/*
+ * Copyright (c) 1996-2003 Per Fogelstrom
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed under OpenBSD by
+ *	Per Fogelstrom.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MIPS_EXEC_H_
+#define _MIPS_EXEC_H_
+
+#define	__LDPGSZ	4096
+
+/*
+ *  Define what exec "formats" we should handle.
+ */
+#define NATIVE_EXEC_ELF
+#define	EXEC_SCRIPT
+
+#define ARCH_ELFSIZE		32
+
+#define	ELF_TARG_CLASS		ELFCLASS32
+#if defined(__MIPSEB__)
+#define ELF_TARG_DATA		ELFDATA2MSB
+#else
+#define ELF_TARG_DATA		ELFDATA2LSB
+#endif
+#define ELF_TARG_MACH		EM_MIPS
+
+#define _NLIST_DO_ELF
+#define _NLIST_DO_ECOFF
+
+#define _KERN_DO_ECOFF		/* XXX obsolete */
+#define _KERN_DO_ELF
+#if defined(_LP64)
+#define _KERN_DO_ELF64
+#endif
+
+/* Information taken from MIPS ABI supplemental */
+
+/* Architecture dependent Segment types - p_type */ 
+#define PT_MIPS_REGINFO 0x70000000      /* Register usage information */
+
+/* Architecture dependent d_tag field for Elf32_Dyn.  */
+#define DT_MIPS_RLD_VERSION  0x70000001 /* Runtime Linker Interface ID */
+#define DT_MIPS_TIME_STAMP   0x70000002 /* Timestamp */
+#define DT_MIPS_ICHECKSUM    0x70000003 /* Cksum of ext. str. and com. sizes */
+#define DT_MIPS_IVERSION     0x70000004 /* Version string (string tbl index) */
+#define DT_MIPS_FLAGS        0x70000005 /* Flags */
+#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */
+#define DT_MIPS_CONFLICT     0x70000008 /* Adr of .conflict section */
+#define DT_MIPS_LIBLIST      0x70000009 /* Address of .liblist section */
+#define DT_MIPS_LOCAL_GOTNO  0x7000000a /* Number of local .GOT entries */
+#define DT_MIPS_CONFLICTNO   0x7000000b /* Number of .conflict entries */
+#define DT_MIPS_LIBLISTNO    0x70000010 /* Number of .liblist entries */
+#define DT_MIPS_SYMTABNO     0x70000011 /* Number of .dynsym entries */
+#define DT_MIPS_UNREFEXTNO   0x70000012 /* First external DYNSYM */
+#define DT_MIPS_GOTSYM       0x70000013 /* First GOT entry in .dynsym */
+#define DT_MIPS_HIPAGENO     0x70000014 /* Number of GOT page table entries */
+#define DT_MIPS_RLD_MAP      0x70000016 /* Address of debug map pointer */
+
+#define DT_PROCNUM (DT_MIPS_RLD_MAP - DT_LOPROC + 1)
+
+/*
+ * Legal values for e_flags field of Elf32_Ehdr.
+ */
+#define EF_MIPS_NOREORDER	0x00000001	/* .noreorder was used */
+#define EF_MIPS_PIC		0x00000002	/* Contains PIC code */
+#define EF_MIPS_CPIC		0x00000004	/* Uses PIC calling sequence */
+#define	EF_MIPS_ABI2		0x00000020	/* -n32 on Irix 6 */
+#define	EF_MIPS_32BITMODE	0x00000100	/* 64 bit in 32 bit mode... */
+#define EF_MIPS_ARCH		0xf0000000	/* MIPS architecture level */
+#define	E_MIPS_ARCH_1		0x00000000
+#define	E_MIPS_ARCH_2		0x10000000
+#define	E_MIPS_ARCH_3		0x20000000
+#define	E_MIPS_ARCH_4		0x30000000
+#define	EF_MIPS_ABI		0x0000f000	/* ABI level */
+#define	E_MIPS_ABI_NONE		0x00000000	/* ABI level not set */
+#define	E_MIPS_ABI_O32		0x00001000
+#define	E_MIPS_ABI_O64		0x00002000
+#define	E_MIPS_ABI_EABI32	0x00004000
+#define	E_MIPS_ABI_EABI64	0x00004000
+
+/*
+ * Mips special sections.
+ */
+#define	SHN_MIPS_ACOMMON	0xff00		/* Allocated common symbols */
+#define	SHN_MIPS_SCOMMON	0xff03		/* Small common symbols */
+#define	SHN_MIPS_SUNDEFINED	0xff04		/* Small undefined symbols */
+
+/*
+ * Legal values for sh_type field of Elf32_Shdr.
+ */
+#define	SHT_MIPS_LIBLIST  0x70000000	/* Shared objects used in link */
+#define	SHT_MIPS_CONFLICT 0x70000002	/* Conflicting symbols */
+#define	SHT_MIPS_GPTAB    0x70000003	/* Global data area sizes */
+#define	SHT_MIPS_UCODE    0x70000004	/* Reserved for SGI/MIPS compilers */
+#define	SHT_MIPS_DEBUG    0x70000005	/* MIPS ECOFF debugging information */
+#define	SHT_MIPS_REGINFO  0x70000006	/* Register usage information */
+
+/*
+ * Legal values for sh_flags field of Elf32_Shdr.
+ */
+#define	SHF_MIPS_GPREL	0x10000000	/* Must be part of global data area */
+
+#if 0
+/*
+ * Entries found in sections of type SHT_MIPS_GPTAB.
+ */
+typedef union {
+	struct {
+		Elf32_Word gt_current_g_value;	/* -G val used in compilation */
+		Elf32_Word gt_unused;	/* Not used */
+	} gt_header;			/* First entry in section */
+	struct {
+		Elf32_Word gt_g_value;	/* If this val were used for -G */
+		Elf32_Word gt_bytes;	/* This many bytes would be used */
+	} gt_entry;			/* Subsequent entries in section */
+} Elf32_gptab;
+
+/*
+ * Entry found in sections of type SHT_MIPS_REGINFO.
+ */
+typedef struct {
+	Elf32_Word	ri_gprmask;	/* General registers used */
+	Elf32_Word	ri_cprmask[4];	/* Coprocessor registers used */
+	Elf32_Sword	ri_gp_value;	/* $gp register value */
+} Elf32_RegInfo;
+#endif
+
+
+/*
+ * Mips relocations.
+ */
+
+#define	R_MIPS_NONE	0	/* No reloc */
+#define	R_MIPS_16	1	/* Direct 16 bit */
+#define	R_MIPS_32	2	/* Direct 32 bit */
+#define	R_MIPS_REL32	3	/* PC relative 32 bit */
+#define	R_MIPS_26	4	/* Direct 26 bit shifted */
+#define	R_MIPS_HI16	5	/* High 16 bit */
+#define	R_MIPS_LO16	6	/* Low 16 bit */
+#define	R_MIPS_GPREL16	7	/* GP relative 16 bit */
+#define	R_MIPS_LITERAL	8	/* 16 bit literal entry */
+#define	R_MIPS_GOT16	9	/* 16 bit GOT entry */
+#define	R_MIPS_PC16	10	/* PC relative 16 bit */
+#define	R_MIPS_CALL16	11	/* 16 bit GOT entry for function */
+#define	R_MIPS_GPREL32	12	/* GP relative 32 bit */
+
+
+#endif /* !_MIPS_EXEC_H_ */
diff --git a/sys/arch/sgi/include/float.h b/sys/arch/sgi/include/float.h
new file mode 100644
index 00000000000..6d6aefba17c
--- /dev/null
+++ b/sys/arch/sgi/include/float.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: float.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/float.h>
diff --git a/sys/arch/sgi/include/frame.h b/sys/arch/sgi/include/frame.h
new file mode 100644
index 00000000000..86edb4c0a9b
--- /dev/null
+++ b/sys/arch/sgi/include/frame.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: frame.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/frame.h>
diff --git a/sys/arch/sgi/include/ieee.h b/sys/arch/sgi/include/ieee.h
new file mode 100644
index 00000000000..53af586b1a9
--- /dev/null
+++ b/sys/arch/sgi/include/ieee.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: ieee.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/ieee.h>
diff --git a/sys/arch/sgi/include/ieeefp.h b/sys/arch/sgi/include/ieeefp.h
new file mode 100644
index 00000000000..3bf6eca07a6
--- /dev/null
+++ b/sys/arch/sgi/include/ieeefp.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: ieeefp.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/ieeefp.h>
diff --git a/sys/arch/sgi/include/internal_types.h b/sys/arch/sgi/include/internal_types.h
new file mode 100644
index 00000000000..ecfa665964e
--- /dev/null
+++ b/sys/arch/sgi/include/internal_types.h
@@ -0,0 +1,3 @@
+/* $OpenBSD: internal_types.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+#include <mips64/internal_types.h>
diff --git a/sys/arch/sgi/include/intr.h b/sys/arch/sgi/include/intr.h
new file mode 100644
index 00000000000..23754885270
--- /dev/null
+++ b/sys/arch/sgi/include/intr.h
@@ -0,0 +1,258 @@
+/*	$OpenBSD: intr.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MACHINE_INTR_H_
+#define _MACHINE_INTR_H_
+
+/*
+ *  The interrupt mask cpl is a mask which can be used with the
+ *  CPU interrupt mask register or an external HW mask register.
+ *  If interrupts are masked by the CPU interrupt mask all external
+ *  masks should be enabled and any routing set up so that the
+ *  interrupt source is routed to the CPU interrupt corresponding
+ *  to the interrupts "priority level". In this case the generic
+ *  interrupt handler can be used.
+ *
+ *  The IMASK_EXTERNAL define is used to select wether the CPU
+ *  interrupt mask should be controlled by the cpl mask value
+ *  or not. If the mask is external, the CPU mask is never changed
+ *  from the value it gets when interrupt dispatchers are registred.
+ *  When an external masking register is used dedicated interrupt
+ *  handlers must be written as well as ipending handlers.
+ */
+#define	IMASK_EXTERNAL		/* XXX move this to config */
+
+
+
+/* Interrupt priority `levels'; not mutually exclusive. */
+#define	IPL_BIO		0	/* block I/O */
+#define	IPL_NET		1	/* network */
+#define	IPL_TTY		2	/* terminal */
+#define	IPL_VM		3	/* memory allocation */
+#define	IPL_CLOCK	4	/* clock */
+#define	IPL_NONE	5	/* nothing */
+#define	IPL_HIGH	6	/* everything */
+#define	NIPLS		7	/* Number of levels */
+
+/* Interrupt sharing types. */
+#define	IST_NONE	0	/* none */
+#define	IST_PULSE	1	/* pulsed */
+#define	IST_EDGE	2	/* edge-triggered */
+#define	IST_LEVEL	3	/* level-triggered */
+
+/* Soft interrupt masks. */
+#define	SINT_CLOCK	31
+#define	SINT_CLOCKMASK	(1 << SINT_CLOCK)
+#define	SINT_NET	30
+#define	SINT_NETMASK	((1 << SINT_NET) | SINT_CLOCKMASK)
+#define	SINT_TTY	29
+#define	SINT_TTYMASK	((1 << SINT_TTY) | SINT_CLOCKMASK)
+#define	SINT_ALLMASK	(SINT_CLOCKMASK | SINT_NETMASK | SINT_TTYMASK)
+#define	SPL_CLOCK	28
+#define	SPL_CLOCKMASK	(1 << SPL_CLOCK)
+
+#ifndef _LOCORE
+
+#if 1
+#define splbio()		splraise(imask[IPL_BIO])
+#define splnet()		splraise(imask[IPL_NET])
+#define spltty()		splraise(imask[IPL_TTY])
+#define splclock()		splraise(SPL_CLOCKMASK|SINT_ALLMASK)
+#define splimp()		splraise(imask[IPL_VM])
+#define splvm()			splraise(imask[IPL_VM])
+#define splsoftclock()		splraise(SINT_CLOCKMASK)
+#define splsoftnet()		splraise(SINT_NETMASK|SINT_CLOCKMASK)
+#define splsofttty()		splraise(SINT_TTYMASK)
+#else
+#define splbio()		splhigh()
+#define splnet()		splhigh()
+#define spltty()		splhigh()
+#define splclock()		splhigh()
+#define splimp()		splhigh()
+#define splvm()			splhigh()
+#define splsoftclock()		splhigh()
+#define splsoftnet()		splhigh()
+#define splsofttty()		splhigh()
+#endif
+#define splstatclock()		splhigh()
+#define splhigh()		splraise(-1)
+#define spl0()			spllower(0)
+#define spllowersoftclock()	spllower(SINT_CLOCKMASK)
+
+
+#define setsoftclock()  set_sint(SINT_CLOCKMASK);
+#define setsoftnet()    set_sint(SINT_NETMASK);
+#define setsofttty()    set_sint(SINT_TTYMASK);
+
+void	splinit(void);
+
+#define	splassert(X)
+
+/*
+ *  Schedule prioritys for base interrupts (cpu)
+ */
+#define	INTPRI_CLOCK	1
+#define	INTPRI_MACEIO	2
+#define	INTPRI_MACEAUX	3
+
+/*
+ *   Define a type for interrupt masks. We may need 64 bits here.
+ */
+typedef u_int32_t intrmask_t;		/* Type of var holding interrupt mask */
+
+#define	INTMASKSIZE	(sizeof(intrmask_t) * 8)
+
+void clearsoftclock(void);
+void clearsoftnet(void);
+#if 0
+void clearsofttty(void);
+#endif
+
+
+volatile intrmask_t cpl;
+volatile intrmask_t ipending, astpending;
+
+intrmask_t imask[NIPLS];
+
+/*
+ *  A note on clock interrupts. Clock interrupts are always
+ *  allowed to happen but will not be serviced if masked.
+ *  The reason for this is that clocks usually sits on INT5
+ *  and can not be easily masked if external HW masking is used.
+ */
+
+/* Inlines */
+static __inline void register_pending_int_handler(void (*)(void));
+static __inline int splraise(int newcpl);
+static __inline void splx(int newcpl);
+static __inline int spllower(int newcpl);
+
+typedef void  (void_f) (void);
+void_f *pending_hand;
+
+static __inline void
+register_pending_int_handler(void(*pending)(void))
+{
+	pending_hand = pending;
+}
+
+/*
+ */
+static __inline int
+splraise(int newcpl)
+{
+	int oldcpl;
+
+	__asm__ (" .set noreorder\n");
+	oldcpl = cpl;
+	cpl = oldcpl | newcpl;
+	__asm__ (" sync\n .set reorder\n");
+	return(oldcpl);
+}
+
+static __inline void
+splx(int newcpl)
+{
+	cpl = newcpl;
+	if((ipending & ~newcpl) && (pending_hand != NULL)) {
+                (*pending_hand)();
+        }
+}
+
+static __inline int
+spllower(int newcpl)
+{
+	int oldcpl;
+
+	oldcpl = cpl;
+	cpl = newcpl;
+	if((ipending & ~newcpl) && (pending_hand != NULL)) {
+                (*pending_hand)();
+	}
+	return(oldcpl);
+}
+
+/*
+ *  Atomically update ipending.
+ */
+void set_sint(int pending);
+
+/*
+ * Interrupt control struct used by interrupt dispatchers
+ * to hold interrupt handler info.
+ */
+
+struct intrhand {
+        struct  intrhand *ih_next;
+        int     (*ih_fun)(void *);
+        void    *ih_arg;
+        u_long  ih_count;
+        int     ih_level;
+        int     ih_irq;
+        char    *ih_what;
+	void	*frame;
+};
+
+/*
+ * Low level interrupt dispatcher registration data.
+ */
+#define NLOWINT	16		/* Number of low level registrations possible */
+
+struct trap_frame;
+
+struct {
+        intrmask_t int_mask;
+        intrmask_t (*int_hand)(intrmask_t, struct trap_frame *);
+} cpu_int_tab[NLOWINT];
+
+intrmask_t idle_mask;
+int	last_low_int;
+
+void set_intr(int, intrmask_t, intrmask_t(*)(intrmask_t, struct trap_frame *));
+
+#ifdef IMASK_EXTERNAL
+void hw_setintrmask(intrmask_t);
+extern void *hwmask_addr;
+#endif
+
+/*
+ *  Generic interrupt handling code that can be used for simple
+ *  interrupt hardware models. Functions can also be used by
+ *  more complex code especially the mask calculation code.
+ */
+
+void *generic_intr_establish(void *, u_long, int, int,
+				int (*) __P((void *)), void *, char *); 
+void generic_intr_disestablish(void *, void *);
+void generic_intr_makemasks(void);
+void generic_do_pending_int(void);
+intrmask_t generic_iointr(intrmask_t, struct trap_frame *);
+
+#endif /* _LOCORE */
+
+#endif /* _MACHINE_INTR_H_ */
diff --git a/sys/arch/sgi/include/kbdreg.h b/sys/arch/sgi/include/kbdreg.h
new file mode 100644
index 00000000000..5bcfc60ff8d
--- /dev/null
+++ b/sys/arch/sgi/include/kbdreg.h
@@ -0,0 +1,82 @@
+/*	$OpenBSD: kbdreg.h,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+
+/*
+ * Copyright (c) 1996 Per Fogelstrom
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Per Fogelstrom.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Keyboard definitions
+ *
+ */
+
+#define	KBSTATP		(0x61)	/* controller status port (I) */
+#define	 KBS_DIB	0x01	/* data in buffer */
+#define	 KBS_IBF	0x02	/* input buffer low */
+#define	 KBS_WARM	0x04	/* input buffer low */
+#define	 KBS_OCMD	0x08	/* output buffer has command */
+#define	 KBS_NOSEC	0x10	/* security lock not engaged */
+#define	 KBS_PMS	0x20	/* mouse data */
+#define	 KBS_RERR	0x40	/* receive error */
+#define	 KBS_PERR	0x80	/* parity error */
+
+#define	KBCMDP		(0x61)	/* controller port (O) */
+#define	KBDATAP		(0x60)	/* data port (I) */
+#define	KBOUTP		(0x60)	/* data port (O) */
+
+#define	K_RDCMDBYTE	0x20
+#define	K_LDCMDBYTE	0x60
+
+#define	KC8_TRANS	0x40	/* convert to old scan codes */
+#define	KC8_MDISABLE	0x20	/* disable mouse */
+#define	KC8_KDISABLE	0x10	/* disable keyboard */
+#define	KC8_IGNSEC	0x08	/* ignore security lock */
+#define	KC8_CPU		0x04	/* exit from protected mode reset */
+#define	KC8_MENABLE	0x02	/* enable mouse interrupt */
+#define	KC8_KENABLE	0x01	/* enable keyboard interrupt */
+#define	CMDBYTE		(KC8_TRANS|KC8_CPU|KC8_MENABLE|KC8_KENABLE)
+
+/* keyboard commands */
+#define	KBC_RESET	0xFF	/* reset the keyboard */
+#define	KBC_RESEND	0xFE	/* request the keyboard resend the last byte */
+#define	KBC_SETDEFAULT	0xF6	/* resets keyboard to its power-on defaults */
+#define	KBC_DISABLE	0xF5	/* as per KBC_SETDEFAULT, but also disable key scanning */
+#define	KBC_ENABLE	0xF4	/* enable key scanning */
+#define	KBC_TYPEMATIC	0xF3	/* set typematic rate and delay */
+#define	KBC_SETTABLE	0xF0	/* set scancode translation table */
+#define	KBC_MODEIND	0xED	/* set mode indicators (i.e. LEDs) */
+#define	KBC_ECHO	0xEE	/* request an echo from the keyboard */
+
+/* keyboard responses */
+#define	KBR_EXTENDED	0xE0	/* extended key sequence */
+#define	KBR_RESEND	0xFE	/* needs resend of command */
+#define	KBR_ACK		0xFA	/* received a valid command */
+#define	KBR_OVERRUN	0x00	/* flooded */
+#define	KBR_FAILURE	0xFD	/* diagnosic failure */
+#define	KBR_BREAK	0xF0	/* break code prefix - sent on key release */
+#define	KBR_RSTDONE	0xAA	/* reset complete */
+#define	KBR_ECHO	0xEE	/* echo response */
diff --git a/sys/arch/sgi/include/kcore.h b/sys/arch/sgi/include/kcore.h
new file mode 100644
index 00000000000..35f8b8090e6
--- /dev/null
+++ b/sys/arch/sgi/include/kcore.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: kcore.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/kcore.h>
diff --git a/sys/arch/sgi/include/kdbparam.h b/sys/arch/sgi/include/kdbparam.h
new file mode 100644
index 00000000000..96e687c8acc
--- /dev/null
+++ b/sys/arch/sgi/include/kdbparam.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: kdbparam.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/kdbparam.h>
diff --git a/sys/arch/sgi/include/limits.h b/sys/arch/sgi/include/limits.h
new file mode 100644
index 00000000000..d9c3dc1468c
--- /dev/null
+++ b/sys/arch/sgi/include/limits.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: limits.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/limits.h>
diff --git a/sys/arch/sgi/include/link.h b/sys/arch/sgi/include/link.h
new file mode 100644
index 00000000000..d6638b93bda
--- /dev/null
+++ b/sys/arch/sgi/include/link.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: link.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/link.h>
diff --git a/sys/arch/sgi/include/loadfile_machdep.h b/sys/arch/sgi/include/loadfile_machdep.h
new file mode 100644
index 00000000000..d0e5940445b
--- /dev/null
+++ b/sys/arch/sgi/include/loadfile_machdep.h
@@ -0,0 +1,63 @@
+/*	$OpenBSD: loadfile_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+/*	$NetBSD: loadfile_machdep.h,v 1.2 2001/10/31 17:20:49 thorpej Exp $	 */
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Christos Zoulas.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *        This product includes software developed by the NetBSD
+ *        Foundation, Inc. and its contributors.
+ * 4. Neither the name of The NetBSD Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SGIMIPS_LOADFILE_MACHDEP_H_
+#define _SGIMIPS_LOADFILE_MACHDEP_H_
+
+#define BOOT_AOUT
+#define BOOT_ECOFF
+#define BOOT_ELF32
+
+#define LOAD_KERNEL	(LOAD_ALL & ~LOAD_TEXTA)
+#define COUNT_KERNEL	(COUNT_ALL & ~COUNT_TEXTA)
+
+#define LOADADDR(a)		(((u_long)(a)) + offset)
+#define ALIGNENTRY(a)		((u_long)(a))
+#define READ(f, b, c)		read((f), (void *)LOADADDR(b), (c))
+#define BCOPY(s, d, c)		memcpy((void *)LOADADDR(d), (void *)(s), (c))
+#define BZERO(d, c)		memset((void *)LOADADDR(d), 0, (c))
+#define	WARN(a)			(void)(printf a, \
+				    printf((errno ? ": %s\n" : "\n"), \
+				    strerror(errno)))
+#define PROGRESS(a)		(void) printf a
+#define ALLOC(a)		alloc(a)
+#define FREE(a, b)		free(a, b)
+#define OKMAGIC(a)		((a) == OMAGIC)
+
+#endif	/* !_SGIMIPS_LOADFILE_MACHDEP_H_ */
diff --git a/sys/arch/sgi/include/m48t37.h b/sys/arch/sgi/include/m48t37.h
new file mode 100644
index 00000000000..02b70e4cad6
--- /dev/null
+++ b/sys/arch/sgi/include/m48t37.h
@@ -0,0 +1,68 @@
+#include <sys/endian.h>
+/*
+ * M48T37Y TOD Registers 
+ */
+
+#ifndef _LOCORE
+typedef struct {
+    unsigned char flags;	
+    unsigned char century;
+    unsigned char alarm_secs;	
+    unsigned char alarm_mins;
+    unsigned char alarm_hours;	
+    unsigned char interrupts;	
+    unsigned char watchdog;	
+    unsigned char control;
+    unsigned char seconds;	
+    unsigned char minutes;
+    unsigned char hour;
+    unsigned char day;	
+    unsigned char date;
+    unsigned char month;
+    unsigned char year;
+} plddev;
+
+#endif
+
+#define TOD_FLAG	0	
+#define TOD_CENTURY	1
+#define TOD_ALRM_SECS	2	
+#define TOD_ALRM_MINS	3
+#define TOD_ALRM_HRS	4	
+#define TOD_ALRM_DATE	5	
+#define TOD_INTS	6	
+#define TOD_WDOG	7	
+#define TOD_CTRL	8
+#define TOD_SECOND	9	
+#define TOD_MINUTE	10
+#define TOD_HOUR	11
+#define TOD_DAY		12	
+#define TOD_DATE	13
+#define TOD_MONTH	14
+#define TOD_YEAR	15
+
+#define TOD_FLAG_WDF	(1 << 7)	/* Watchdog Flag */
+#define TOD_FLAG_AF	(1 << 6)	/* Alarm Flag */
+#define TOD_FLAG_BL	(1 << 4)	/* Battery Low Flag */
+
+#define TOD_ALRM_SECS_RPT1	(1 << 7)	/* Alarm Repeat Mode Bit 1 */
+#define TOD_ALRM_MINS_RPT2	(1 << 7)	/* Alarm Repeat Mode Bit 2 */
+#define TOD_ALRM_HRS_RPT3	(1 << 7)	/* Alarm Repeat Mode Bit 3 */
+#define TOD_ALRM_DATE_RPT4	(1 << 7)	/* Alarm Repeat Mode Bit 4 */
+
+#define TOD_INTS_AFE	(1 << 7)	/* Alarm Flag Enable */
+#define TOD_INTS_ABE	(1 << 5)	/* Alarm Battery Backup Mode Enable */
+
+#define TOD_WDOG_WDS	(1 << 7)	/* Watchdog Steering */
+#define TOD_WDOG_BMB	(31 << 2)	/* Watchdog Multiplier */
+#define TOD_WDOG_RB	(3 << 2)	/* Watchdog Resolution */
+
+#define TOD_CTRL_W	(1 << 7)	/* Write Bit */
+#define TOD_CTRL_R	(1 << 6)	/* Read Bit */
+#define TOD_CTRL_S	(1 << 5)	/* Sign Bit */
+#define TOD_CTRL_CAL	(31 << 0)	/* Calibration */
+
+#define TOD_SECOND_ST	(1 << 7)	/* Stop Bit */
+
+#define TOD_DAY_FT	(1 << 6)	/* Frequency Test */
+
diff --git a/sys/arch/sgi/include/memconf.h b/sys/arch/sgi/include/memconf.h
new file mode 100644
index 00000000000..0c67ae975bd
--- /dev/null
+++ b/sys/arch/sgi/include/memconf.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: memconf.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/memconf.h>
diff --git a/sys/arch/sgi/include/mips_opcode.h b/sys/arch/sgi/include/mips_opcode.h
new file mode 100644
index 00000000000..c9ed582317e
--- /dev/null
+++ b/sys/arch/sgi/include/mips_opcode.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: mips_opcode.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/mips_opcode.h>
diff --git a/sys/arch/sgi/include/mouse.h b/sys/arch/sgi/include/mouse.h
new file mode 100644
index 00000000000..de439d840aa
--- /dev/null
+++ b/sys/arch/sgi/include/mouse.h
@@ -0,0 +1,52 @@
+/*	$OpenBSD: mouse.h,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+/*	$NetBSD: mouse.h,v 1.4 1994/10/27 04:16:10 cgd Exp $	*/
+
+/*-
+ * Copyright (c) 1992, 1993 Erik Forsberg.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _MOUSE_H_
+#define _MOUSE_H_
+
+struct mouseinfo {
+	unsigned char status;
+	char xmotion, ymotion;
+};
+
+#define BUTSTATMASK	0x07	/* Any mouse button down if any bit set */
+#define BUTCHNGMASK	0x38	/* Any mouse button changed if any bit set */
+
+#define BUT3STAT	0x01	/* Button 3 down if set */
+#define BUT2STAT	0x02	/* Button 2 down if set */
+#define BUT1STAT	0x04	/* Button 1 down if set */
+#define BUT3CHNG	0x08	/* Button 3 changed if set */
+#define BUT2CHNG	0x10	/* Button 2 changed if set */
+#define BUT1CHNG	0x20	/* Button 1 changed if set */
+#define MOVEMENT	0x40	/* Mouse movement detected */
+
+/* Ioctl definitions */
+
+#define MOUSEIOC        ('M'<<8)
+#define MOUSEIOCREAD    (MOUSEIOC|60)
+#define MOUSEIOCSRAW    (MOUSEIOC|61)
+#define MOUSEIOCSCOOKED (MOUSEIOC|62)
+
+#endif /* !_MOUSE_H_ */
diff --git a/sys/arch/sgi/include/param.h b/sys/arch/sgi/include/param.h
new file mode 100644
index 00000000000..785c14acede
--- /dev/null
+++ b/sys/arch/sgi/include/param.h
@@ -0,0 +1,49 @@
+/*	$OpenBSD: param.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Opsycon AB, Sweden.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MACHINE_PARAM_H_
+#define _MACHINE_PARAM_H_
+
+/*
+ * Machine dependent constants.
+ */
+#define	MACHINE		"sgi"
+#define	_MACHINE	sgi
+#define MACHINE_ARCH	"mips64"
+#define _MACHINE_ARCH	mips64
+
+#define MID_MACHINE	0	/* None but has to be defined */
+
+#include <mips64/param.h>
+
+#endif /* _MACHINE_PARAM_H_ */
diff --git a/sys/arch/sgi/include/pcb.h b/sys/arch/sgi/include/pcb.h
new file mode 100644
index 00000000000..5ef67f15474
--- /dev/null
+++ b/sys/arch/sgi/include/pcb.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: pcb.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/pcb.h>
diff --git a/sys/arch/sgi/include/pio.h b/sys/arch/sgi/include/pio.h
new file mode 100644
index 00000000000..d2da74f73fd
--- /dev/null
+++ b/sys/arch/sgi/include/pio.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: pio.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/pio.h>
diff --git a/sys/arch/sgi/include/pmap.h b/sys/arch/sgi/include/pmap.h
new file mode 100644
index 00000000000..a0c9a5da2a4
--- /dev/null
+++ b/sys/arch/sgi/include/pmap.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: pmap.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/pmap.h>
diff --git a/sys/arch/sgi/include/proc.h b/sys/arch/sgi/include/proc.h
new file mode 100644
index 00000000000..7faa033afd6
--- /dev/null
+++ b/sys/arch/sgi/include/proc.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: proc.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/proc.h>
diff --git a/sys/arch/sgi/include/profile.h b/sys/arch/sgi/include/profile.h
new file mode 100644
index 00000000000..751bcd1a4aa
--- /dev/null
+++ b/sys/arch/sgi/include/profile.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: profile.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/profile.h>
diff --git a/sys/arch/sgi/include/psl.h b/sys/arch/sgi/include/psl.h
new file mode 100644
index 00000000000..307ebaa88a5
--- /dev/null
+++ b/sys/arch/sgi/include/psl.h
@@ -0,0 +1,39 @@
+/*	$OpenBSD: psl.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <machine/cpu.h>
+
+/*
+ * Macros to decode processor status word.
+ */
+#define	USERMODE(ps)	(((ps) & SR_KSU_MASK) == SR_KSU_USER)
+#define	BASEPRI(ps)	(((ps) & (INT_MASK | SR_INT_ENA_PREV)) \
+			== (INT_MASK | SR_INT_ENA_PREV))
+
+#ifdef _KERNEL
+#include <machine/intr.h>
+#endif
diff --git a/sys/arch/sgi/include/pte.h b/sys/arch/sgi/include/pte.h
new file mode 100644
index 00000000000..232b8bc709e
--- /dev/null
+++ b/sys/arch/sgi/include/pte.h
@@ -0,0 +1,126 @@
+/*      $OpenBSD: pte.h,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+
+/*
+ * Copyright (c) 1988 University of Utah.
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department and Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: Utah Hdr: pte.h 1.11 89/09/03
+ *	from: @(#)pte.h	8.1 (Berkeley) 6/10/93
+ */
+
+/*
+ * R4000 hardware page table entry
+ */
+
+#ifndef _LOCORE
+
+/*
+ * Structure defining an tlb entry data set.
+ */
+
+struct tlb {
+	int	tlb_mask;
+	int	tlb_hi;
+	int	tlb_lo0;
+	int	tlb_lo1;
+};
+
+typedef union pt_entry {
+	unsigned int	pt_entry;	/* for copying, etc. */
+	unsigned int	pt_pte;		/* XXX void */
+} pt_entry_t;	/* Mips page table entry */
+#endif /* _LOCORE */
+
+#define	PT_ENTRY_NULL	((pt_entry_t *) 0)
+
+#define PG_RO		0x40000000	/* SW */
+
+#define	PG_SVPN		0xfffff000	/* Software page no mask */
+#define	PG_HVPN		0xffffe000	/* Hardware page no mask */
+#define	PG_ODDPG	0x00001000	/* Odd even pte entry */
+#define	PG_ASID		0x000000ff	/* Address space ID */
+#define	PG_G		0x00000001	/* HW */
+#define	PG_V		0x00000002
+#define	PG_NV		0x00000000
+#define	PG_M		0x00000004
+#define	PG_ATTR		0x0000003f
+#define	PG_UNCACHED	0x00000010
+#define	PG_CACHED	0x00000018
+#define	PG_CACHEMODE	0x00000038
+#define	PG_ROPAGE	(PG_V | PG_RO | PG_CACHED) /* Write protected */
+#define	PG_RWPAGE	(PG_V | PG_M | PG_CACHED)  /* Not wr-prot not clean */
+#define	PG_CWPAGE	(PG_V | PG_CACHED)	   /* Not wr-prot but clean */
+#define	PG_IOPAGE	(PG_G | PG_V | PG_M | PG_UNCACHED)
+#define	PG_FRAME	0x3fffffc0
+#define PG_SHIFT	6
+#define pfn_is_ext(x) ((x) & 0x3c000000)
+#define vad_to_pfn(x) (((unsigned)(x) >> PG_SHIFT) & PG_FRAME)
+#define vad_to_pfn64(x) (((quad_t)(x) >> PG_SHIFT) & PG_FRAME)
+#define vad_to_vpn(x) ((int)((unsigned)(x) & PG_SVPN))
+#define vpn_to_vad(x) ((int)((x) & PG_SVPN))
+/* User viritual to pte page entry */
+#define uvtopte(adr) (((adr) >> PGSHIFT) & (NPTEPG -1))
+
+#define	PG_SIZE_4K	0x00000000
+#define	PG_SIZE_16K	0x00006000
+#define	PG_SIZE_64K	0x0001e000
+#define	PG_SIZE_256K	0x0007e000
+#define	PG_SIZE_1M	0x001fe000
+#define	PG_SIZE_4M	0x007fe000
+#define	PG_SIZE_16M	0x01ffe000
+
+#if defined(_KERNEL) && !defined(_LOCORE)
+
+static __inline vaddr_t
+pfn_to_pad(unsigned int pte)
+{
+	vaddr_t pa;
+
+	pa = (long)(int)(((pte & PG_FRAME) << PG_SHIFT));
+	return pa;
+}
+
+/*
+ * Kernel virtual address to page table entry and visa versa.
+ */
+#define	kvtopte(va) \
+	(Sysmap + (((vaddr_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
+#define	ptetokv(pte) \
+	((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
+
+extern	pt_entry_t *Sysmap;		/* kernel pte table */
+extern	u_int Sysmapsize;		/* number of pte's in Sysmap */
+#endif
diff --git a/sys/arch/sgi/include/ptrace.h b/sys/arch/sgi/include/ptrace.h
new file mode 100644
index 00000000000..9f0a1a22e40
--- /dev/null
+++ b/sys/arch/sgi/include/ptrace.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: ptrace.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/ptrace.h>
diff --git a/sys/arch/sgi/include/reg.h b/sys/arch/sgi/include/reg.h
new file mode 100644
index 00000000000..1384ab67a31
--- /dev/null
+++ b/sys/arch/sgi/include/reg.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: reg.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/reg.h>
diff --git a/sys/arch/sgi/include/regdef.h b/sys/arch/sgi/include/regdef.h
new file mode 100644
index 00000000000..5c6c04429b0
--- /dev/null
+++ b/sys/arch/sgi/include/regdef.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: regdef.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/regdef.h>
diff --git a/sys/arch/sgi/include/regnum.h b/sys/arch/sgi/include/regnum.h
new file mode 100644
index 00000000000..02742e484c4
--- /dev/null
+++ b/sys/arch/sgi/include/regnum.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: regnum.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/regnum.h>
diff --git a/sys/arch/sgi/include/reloc.h b/sys/arch/sgi/include/reloc.h
new file mode 100644
index 00000000000..a42bb322df8
--- /dev/null
+++ b/sys/arch/sgi/include/reloc.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: reloc.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/reloc.h>
diff --git a/sys/arch/sgi/include/rm7000.h b/sys/arch/sgi/include/rm7000.h
new file mode 100644
index 00000000000..2fd5584e72e
--- /dev/null
+++ b/sys/arch/sgi/include/rm7000.h
@@ -0,0 +1,99 @@
+/*	$OpenBSD: rm7000.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MACHINE_RM7000_H 
+#define _MACHINE_RM7000_H 
+
+/*
+ *  QED RM7000 specific defines.
+ */
+
+/*
+ *  Performance counters.
+ */
+
+#define	PCNT_SRC_CLOCKS		0x00	/* Clock cycles */
+#define	PCNT_SRC_INSTR		0x01	/* Total instructions issued */
+#define	PCNT_SRC_FPINSTR	0x02	/* Float instructions issued */
+#define	PCNT_SRC_IINSTR		0x03	/* Integer instructions issued */
+#define	PCNT_SRC_LOAD		0x04	/* Load instructions issued */
+#define	PCNT_SRC_STORE		0x05	/* Store instructions issued */
+#define	PCNT_SRC_DUAL		0x06	/* Dual issued pairs */
+#define	PCNT_SRC_BRPREF		0x07	/* Branch prefetches */
+#define	PCNT_SRC_EXTMISS	0x08	/* External cache misses */
+#define	PCNT_SRC_STALL		0x09	/* Stall cycles */
+#define	PCNT_SRC_SECMISS	0x0a	/* Secondary cache misses */
+#define	PCNT_SRC_INSMISS	0x0b	/* Instruction cache misses */
+#define	PCNT_SRC_DTAMISS	0x0c	/* Data cache misses */
+#define	PCNT_SRC_DTLBMISS	0x0d	/* Data TLB misses */
+#define	PCNT_SRC_ITLBMISS	0x0e	/* Instruction TLB misses */
+#define	PCNT_SRC_JTLBIMISS	0x0f	/* Joint TLB instruction misses */
+#define	PCNT_SRC_JTLBDMISS	0x10	/* Joint TLB data misses */
+#define	PCNT_SRC_BRTAKEN	0x11	/* Branches taken */
+#define	PCNT_SRC_BRISSUED	0x12	/* Branches issued */
+#define	PCNT_SRC_SECWBACK	0x13	/* Secondary cache writebacks */
+#define	PCNT_SRC_PRIWBACK	0x14	/* Primary cache writebacks */
+#define	PCNT_SRC_DCSTALL	0x15	/* Dcache miss stall cycles */
+#define	PCNT_SRC_MISS		0x16	/* Cache misses */
+#define	PCNT_SRC_FPEXC		0x17	/* FP possible execption cycles */
+#define	PCNT_SRC_MULSLIP	0x18	/* Slip cycles due to mult. busy */
+#define	PCNT_SRC_CP0SLIP	0x19	/* CP0 Slip cycles */
+#define	PCNT_SRC_LDSLIP		0x1a	/* Slip cycles  due to pend. non-b ld */
+#define	PCNT_SRC_WBFULL		0x1b	/* Write buffer full stall cycles  */
+#define	PCNT_SRC_CISTALL	0x1c	/* Cache instruction stall cycles  */
+#define	PCNT_SRC_MULSTALL	0x1d	/* Multiplier stall cycles  */
+#define	PCNT_SRC_ELDSTALL	0x1d	/* Excepion stall due to non-b ld */
+#define	PCNT_SRC_MAX		0x1d	/* Maximum PCNT select code */
+
+/* 
+ *  Counter control bits.
+ */
+
+#define	PCNT_CE			0x0400	/* Count enable */
+#define	PCNT_UM			0x0200	/* Count in User mode */
+#define	PCNT_KM			0x0100	/* Count in kernel mode */
+
+/*
+ *  Performance counter system call function codes.
+ */
+#define	PCNT_FNC_SELECT		0x0001	/* Select counter source */
+#define	PCNT_FNC_READ		0x0002	/* Read current value of counter */
+
+
+#ifdef _KERNEL
+__BEGIN_DECLS
+int	rm7k_perfcntr __P((int, long, long, long));
+void	rm7k_perfintr __P((struct trap_frame *));
+int	rm7k_watchintr __P((struct trap_frame *));
+void	cp0_setperfcount __P((int));
+void	cp0_setperfctrl __P((int));
+int	cp0_getperfcount __P((void));
+__END_DECLS
+#endif /* _KERNEL */
+
+#endif /* _MACHINE_RM7000_H */
diff --git a/sys/arch/sgi/include/setjmp.h b/sys/arch/sgi/include/setjmp.h
new file mode 100644
index 00000000000..42c95a623a8
--- /dev/null
+++ b/sys/arch/sgi/include/setjmp.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: setjmp.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/setjmp.h>
diff --git a/sys/arch/sgi/include/signal.h b/sys/arch/sgi/include/signal.h
new file mode 100644
index 00000000000..76c9c9af96a
--- /dev/null
+++ b/sys/arch/sgi/include/signal.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: signal.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/signal.h>
diff --git a/sys/arch/sgi/include/spinlock.h b/sys/arch/sgi/include/spinlock.h
new file mode 100644
index 00000000000..6a5d9013967
--- /dev/null
+++ b/sys/arch/sgi/include/spinlock.h
@@ -0,0 +1,3 @@
+/*	$OpenBSD: spinlock.h,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+
+#include <mips64/spinlock.h>
diff --git a/sys/arch/sgi/include/stdarg.h b/sys/arch/sgi/include/stdarg.h
new file mode 100644
index 00000000000..06447d60e61
--- /dev/null
+++ b/sys/arch/sgi/include/stdarg.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: stdarg.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/stdarg.h>
diff --git a/sys/arch/sgi/include/trap.h b/sys/arch/sgi/include/trap.h
new file mode 100644
index 00000000000..e85b26dc6f1
--- /dev/null
+++ b/sys/arch/sgi/include/trap.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: trap.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/trap.h>
diff --git a/sys/arch/sgi/include/types.h b/sys/arch/sgi/include/types.h
new file mode 100644
index 00000000000..70e7353a24d
--- /dev/null
+++ b/sys/arch/sgi/include/types.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: types.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/types.h>
diff --git a/sys/arch/sgi/include/varargs.h b/sys/arch/sgi/include/varargs.h
new file mode 100644
index 00000000000..0249146b6eb
--- /dev/null
+++ b/sys/arch/sgi/include/varargs.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: varargs.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/varargs.h>
diff --git a/sys/arch/sgi/include/vmparam.h b/sys/arch/sgi/include/vmparam.h
new file mode 100644
index 00000000000..24909bbf04f
--- /dev/null
+++ b/sys/arch/sgi/include/vmparam.h
@@ -0,0 +1,5 @@
+/*	$OpenBSD: vmparam.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/* Use Mips generic include file */
+
+#include <mips64/vmparam.h>
diff --git a/sys/arch/sgi/localbus/com_lbus.c b/sys/arch/sgi/localbus/com_lbus.c
new file mode 100644
index 00000000000..3e45d1f8ec2
--- /dev/null
+++ b/sys/arch/sgi/localbus/com_lbus.c
@@ -0,0 +1,135 @@
+/*	$OpenBSD: com_lbus.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/tty.h>
+
+#include <machine/autoconf.h>
+#include <mips64/archtype.h>
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/ic/comreg.h>
+#include <dev/ic/comvar.h>
+#include <dev/ic/ns16550reg.h>
+
+int	com_localbus_probe(struct device *, void *, void *);
+void	com_localbus_attach(struct device *, struct device *, void *);
+
+
+struct cfattach com_localbus_ca = {
+	sizeof(struct com_softc), com_localbus_probe, com_localbus_attach
+};
+
+extern void com_raisedtr(void *);
+extern struct timeout compoll_to;
+
+int
+com_localbus_probe(parent, match, aux)
+	struct device *parent;
+	void *match, *aux;
+{
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
+	int iobase;
+	int rv;
+	struct cfdata *cf = match;
+        struct confargs *ca = aux;
+
+	/*
+	 *  Check if this is our com. If low nibble is 0 match
+	 *  against system CLASS. Else a perfect match is checked.
+	 */
+        if ((ca->ca_sys & 0x000f) == 0) {
+		if (ca->ca_sys != (sys_config.system_type & 0xfff0))
+			return 0;
+	} else if (ca->ca_sys != sys_config.system_type) {
+		return 0;
+	}
+
+	iobase = (bus_addr_t)sys_config.cons_ioaddr[cf->cf_unit];
+	if(iobase == 0) {
+		rv = 0;	/* Not present */
+	}
+	else {
+		iot = sys_config.cons_iot;
+		/* if it's in use as console, it's there. */
+		if (!(iobase == comconsaddr && !comconsattached)) {
+			bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh);
+			rv = comprobe1(iot, ioh);
+		}
+		else {
+			rv = 1;
+		}
+	}
+	return (rv);
+}
+
+void
+com_localbus_attach(parent, self, aux)
+	struct device *parent, *self;
+	void *aux;
+{
+	struct com_softc *sc = (void *)self;
+	int iobase, intr;
+	bus_space_handle_t ioh;
+	struct confargs *ca = aux;
+
+	sc->sc_hwflags = 0;
+	sc->sc_swflags = 0;
+	iobase = (bus_addr_t)sys_config.cons_ioaddr[sc->sc_dev.dv_unit];
+	intr = ca->ca_intr;
+	sc->sc_iobase = iobase;
+	sc->sc_frequency = sys_config.cons_baudclk;
+
+	sc->sc_iot = sys_config.cons_iot;
+
+	/* if it's in use as console, it's there. */
+	if (!(iobase == comconsaddr && !comconsattached)) {
+		if (bus_space_map(sc->sc_iot, iobase, COM_NPORTS, 0, &ioh)) {
+			panic("unexpected bus_space_map failure");
+		}
+	}
+	else {
+		ioh = comconsioh;
+	}
+
+	sc->sc_ioh = ioh;
+
+	com_attach_subr(sc);
+
+	/* Enable IE pin. Some boards are not edge sensitive */
+	SET(sc->sc_mcr, MCR_IENABLE);
+	bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
+
+	BUS_INTR_ESTABLISH(ca, NULL, intr, IST_EDGE, IPL_TTY,
+				comintr, (void *)sc, sc->sc_dev.dv_xname);
+
+}
diff --git a/sys/arch/sgi/localbus/crimebus.h b/sys/arch/sgi/localbus/crimebus.h
new file mode 100644
index 00000000000..ca4fabd0167
--- /dev/null
+++ b/sys/arch/sgi/localbus/crimebus.h
@@ -0,0 +1,77 @@
+/*	$OpenBSD*/
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se).
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef	_CRIMEBUS_H_
+#define	_CRIMEBUS_H_
+
+#include <machine/bus.h>
+
+#define	CRIMEBUS_BASE		0x14000000
+
+#define	CRIME_REVISION		 0x0000
+
+#define	CRIME_CONTROL		 0x0008
+#define	CRIME_CTRL_TRITON_SYSADC   0x2000
+#define	CRIME_CTRL_CRIME_SYSADC    0x1000
+#define	CRIME_CTRL_HARD_RESET      0x0800
+#define	CRIME_CTRL_SOFT_RESET      0x0400
+#define	CRIME_CTRL_DOG_ENABLE      0x0200
+#define	CRIME_CTRL_ENDIAN_BIG      0x0100
+
+#define	CRIME_INT_STAT		 0x0010
+#define	CRIME_INT_MASK		 0x0018
+#define	CRIME_INT_SOFT		 0x0020
+#define	CRIME_INT_HARD		 0x0028
+
+#define	CRIME_KICK_DOG		 0x0030
+#define	CRIME_TIMER		 0x0038
+
+#define	CRIME_CPU_ERROR_ADDR	 0x0040
+#define	CRIME_CPU_ERROR_STAT	 0x0048
+#define	CRIME_CPU_ERROR_ENAB	 0x0050
+
+#define	CRIME_MEM_ERROR_STAT	 0x0250
+#define	CRIME_MEM_ERROR_ADDR	 0x0258
+
+extern bus_space_t crimebus_tag;
+
+u_int8_t crime_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int16_t crime_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int32_t crime_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int64_t crime_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+
+void crime_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int8_t);
+void crime_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int16_t);
+void crime_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int32_t);
+void crime_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int64_t);
+
+int crime_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
+void crime_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+int crime_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
+
+#endif	/* _CRIMEBUS_H_ */
diff --git a/sys/arch/sgi/localbus/macebus.c b/sys/arch/sgi/localbus/macebus.c
new file mode 100644
index 00000000000..e2e6897c195
--- /dev/null
+++ b/sys/arch/sgi/localbus/macebus.c
@@ -0,0 +1,782 @@
+/*	$OpenBSD: macebus.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ *  This is a combined macebus/crimebus driver. It handles
+ *  configuration of all devices on the processor bus.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/conf.h>
+#include <sys/malloc.h>
+#include <sys/device.h>
+#include <sys/tty.h>
+#include <sys/extent.h>
+#include <net/netisr.h>
+#include <uvm/uvm_extern.h>
+
+#include <dev/pci/pcidevs.h>
+#include <dev/pci/pcivar.h>
+
+#include <dev/ic/comvar.h>
+ 
+#include <mips64/archtype.h>
+
+#include <machine/autoconf.h>
+#include <machine/intr.h>
+
+#include <sgi/localbus/macebus.h>
+#include <sgi/localbus/crimebus.h>
+
+int macebusmatch(struct device *, void *, void *);
+void macebusattach(struct device *, struct device *, void *);
+int macebusprint(void *, const char *);
+int macebusscan(struct device *, void *, void *);
+
+void *macebus_intr_establish(void *, u_long, int, int,
+			int (*)(void *), void *, char *);
+void macebus_intr_disestablish(void *, void *);
+void macebus_intr_makemasks(void);
+void macebus_do_pending_int(void);
+intrmask_t macebus_iointr(intrmask_t, struct trap_frame *);
+intrmask_t macebus_aux(intrmask_t, struct trap_frame *);
+
+long mace_ext_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof (long)];
+long crime_ext_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof (long)];
+
+int maceticks;		/* Time tracker for special events */
+
+struct cfattach macebus_ca = {
+	sizeof(struct device), macebusmatch, macebusattach
+};
+
+struct cfdriver macebus_cd = {
+	NULL, "macebus", DV_DULL, 1
+};
+
+bus_space_t macebus_tag = {
+	NULL,
+	(bus_addr_t)MACEBUS_BASE,
+	NULL,
+	0,
+	mace_read_1, mace_write_1,
+	mace_read_2, mace_write_2,
+	mace_read_4, mace_write_4,
+	mace_read_8, mace_write_8,
+	mace_space_map, mace_space_unmap, mace_space_region,
+};
+
+bus_space_t crimebus_tag = {
+	NULL,
+	(bus_addr_t)CRIMEBUS_BASE,
+	NULL,
+	0,
+	mace_read_1, mace_write_1,
+	mace_read_2, mace_write_2,
+	mace_read_4, mace_write_4,
+	mace_read_8, mace_write_8,
+	mace_space_map, mace_space_unmap, mace_space_region,
+};
+
+bus_space_handle_t crime_h;
+bus_space_handle_t mace_h;
+
+
+/*
+ *  Match bus only to targets which have this bus.
+ */
+int
+macebusmatch(parent, match, aux)
+	struct device *parent;
+	void *match;
+	void *aux;
+{
+	if (sys_config.system_type == SGI_O2) {
+		return (1);
+	}
+	return(0);
+}
+
+int
+macebusprint(aux, macebus)
+	void *aux;
+	const char *macebus;
+{
+/* XXXX print flags */
+	return (QUIET);
+}
+
+
+int
+macebusscan(struct device *parent, void *child, void *args)
+{
+	struct device *dev = child;
+	struct cfdata *cf = dev->dv_cfdata;
+	struct confargs lba;
+	struct abus lbus;
+
+	if (cf->cf_fstate == FSTATE_STAR) {
+		printf("macebus '*' devs not allowed!\n");
+		return 0;
+	}
+
+	lba.ca_sys = cf->cf_loc[0];
+	if (cf->cf_loc[1] == -1) {
+		lba.ca_baseaddr = 0;
+	} else {    
+		lba.ca_baseaddr = cf->cf_loc[1];
+	}
+	if (cf->cf_loc[2] == -1) {
+		lba.ca_intr = 0;
+		lba.ca_nintr = 0;
+	} else {    
+		lba.ca_intr= cf->cf_loc[2];
+		lba.ca_nintr = 1;
+	}
+
+	lba.ca_bus = &lbus;
+
+	/* Fill in what is needed for probing */
+	lba.ca_bus->ab_type = BUS_LOCAL;
+	lba.ca_bus->ab_matchname = NULL;
+	lba.ca_name = cf->cf_driver->cd_name;
+	lba.ca_num = dev->dv_unit;
+	lba.ca_iot = &macebus_tag;
+	lba.ca_memt = &macebus_tag;
+
+	return (*cf->cf_attach->ca_match)(parent, cf, &lba);
+}
+
+void
+macebusattach(parent, self, aux)
+	struct device *parent;
+	struct device *self;
+	void *aux;
+{
+	struct device *dev;
+	struct confargs lba;
+	struct abus lbus;
+	u_int32_t creg;
+	u_int64_t mask;
+
+	/*
+	 *  Create an extent for the localbus control registers.
+	 */
+	macebus_tag.bus_extent = extent_create("mace_space",
+		macebus_tag.bus_base, macebus_tag.bus_base + 0x00400000,
+		M_DEVBUF, (caddr_t)mace_ext_storage,
+		sizeof(mace_ext_storage), EX_NOCOALESCE|EX_NOWAIT);
+
+	crimebus_tag.bus_extent = extent_create("crime_space",
+		crimebus_tag.bus_base, crimebus_tag.bus_base + 0x00400000,
+		M_DEVBUF, (caddr_t)crime_ext_storage,
+		sizeof(crime_ext_storage), EX_NOCOALESCE|EX_NOWAIT);
+
+	/*
+	 *  Map and set up CRIME control registers.
+	 */
+	if (bus_space_map(&crimebus_tag, 0x00000000, 0x400, 0, &crime_h)) {
+		printf("UH-OH! Can't map CRIME control registers!\n");
+		return;
+	}
+	hwmask_addr = (void *)(PHYS_TO_KSEG1(CRIMEBUS_BASE)+CRIME_INT_MASK);
+
+	creg = bus_space_read_8(&crimebus_tag, crime_h, CRIME_REVISION);
+	printf(" Crime revision %d.%d\n", (creg & 0xf0) >> 4, creg & 0xf);
+
+	bus_space_write_8(&crimebus_tag, crime_h, CRIME_CPU_ERROR_STAT, 0);
+	bus_space_write_8(&crimebus_tag, crime_h, CRIME_MEM_ERROR_STAT, 0);
+	
+	mask = 0;
+	bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_MASK, mask);
+	bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_SOFT, 0);
+	bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_HARD, 0);
+	bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_STAT, 0);
+
+
+	/*
+	 *  Map and set up MACE ISA control registers.
+	 */
+	if (bus_space_map(&macebus_tag, MACE_ISA_OFFS, 0x400, 0, &mace_h)) {
+		printf("UH-OH! Can't map MACE ISA control registers!\n");
+		return;
+	}
+
+	bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_MASK, 0xffffffff);
+	bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_INT_STAT, 0);
+
+	/*
+	 *  Now attach all devices to macebus in proper order.
+	 */
+	memset(&lba, 0, sizeof(lba));
+	memset(&lbus, 0, sizeof(lbus));
+	lba.ca_bus = &lbus;
+	lba.ca_bus->ab_type = BUS_LOCAL;
+	lba.ca_bus->ab_matchname = NULL;
+	lba.ca_iot = &macebus_tag;
+	lba.ca_memt = &macebus_tag;
+
+	/*
+	 *  On O2 systems all interrupts are handled by the
+	 *  macebus interrupt handler. Register all except clock.
+	 */
+	switch(sys_config.system_type) {
+
+	case SGI_O2:
+		set_intr(INTPRI_MACEIO, CR_INT_0, macebus_iointr);
+		lba.ca_bus->ab_intr_establish = macebus_intr_establish;
+		lba.ca_bus->ab_intr_disestablish = macebus_intr_disestablish;
+		register_pending_int_handler(macebus_do_pending_int);
+		break;
+
+	default:
+		panic("macebusscan: unknown macebus type!");
+	}
+
+	/* DEBUG: Set up a handler called when clock interrupts go off. */
+	set_intr(INTPRI_MACEAUX, CR_INT_5, macebus_aux);
+
+
+	while ((dev = config_search(macebusscan, self, aux)) != NULL) {
+		struct cfdata *cf;
+
+		cf = dev->dv_cfdata;
+		lba.ca_sys = cf->cf_loc[0];
+		if (cf->cf_loc[1] == -1) {
+			lba.ca_baseaddr = 0;
+		} else {    
+			lba.ca_baseaddr = cf->cf_loc[1];
+		}
+		if (cf->cf_loc[2] == -1) {
+			lba.ca_intr = 0;
+			lba.ca_nintr = 0;
+		} else {    
+			lba.ca_intr= cf->cf_loc[2];
+			lba.ca_nintr = 1;
+		}
+		lba.ca_name = cf->cf_driver->cd_name;
+		lba.ca_num = dev->dv_unit;
+
+		config_attach(self, dev, &lba, macebusprint);
+	}
+}
+
+
+/*
+ *  Bus access primitives. These are really ugly...
+ */
+
+u_int8_t
+mace_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	return *(volatile u_int8_t *)(h + (o << 8) + 7);
+}
+
+u_int16_t
+mace_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	panic("mace_read_2");
+}
+
+u_int32_t
+mace_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	return *(volatile u_int32_t *)(h + o);
+}
+
+u_int64_t
+mace_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	return lp32_read8((u_int64_t *)(h + o));
+}
+
+void
+mace_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
+{
+	*(volatile u_int8_t *)(h + (o << 8) + 7) = v;
+}
+
+void
+mace_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int16_t v)
+{
+	panic("mace_write_2");
+}
+
+void
+mace_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int32_t v)
+{
+	*(volatile u_int32_t *)(h + o) = v;
+}
+
+void
+mace_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int64_t v)
+{
+	lp32_write8((u_int64_t *)(h + o), v);
+}
+
+int
+mace_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
+        int cacheable, bus_space_handle_t *bshp)
+{
+	bus_addr_t bpa;
+	int error;
+
+	bpa = t->bus_base + offs;
+
+	/* Handle special mapping separately */
+	if ((bpa >= 0x1f380000 && (bpa+size) <= 0x1f3a0000) ) {
+		*bshp = PHYS_TO_KSEG1(bpa);
+		return 0;
+	}
+
+	if ((error = extent_alloc_region(t->bus_extent, bpa, size,
+	    EX_NOWAIT | EX_MALLOCOK))) {
+		return error;
+	}
+
+	if ((error  = bus_mem_add_mapping(bpa, size, cacheable, bshp))) {
+		if (extent_free(t->bus_extent, bpa, size, EX_NOWAIT |
+		    ((phys_map != NULL) ? EX_MALLOCOK : 0))) {
+			printf("bus_space_map: pa %p, size %p\n", bpa, size);
+			printf("bus_space_map: can't free region\n");
+		}
+	}
+	return 0;
+}
+
+void
+mace_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
+{
+        bus_addr_t sva;
+        bus_size_t off, len;
+        bus_addr_t paddr;
+
+	/* should this verify that the proper size is freed? */
+	sva = trunc_page(bsh);
+	off = bsh - sva;
+	len = size+off;
+
+	paddr = KSEG1_TO_PHYS(bsh);
+	if (paddr >= 0x1f380000 && (paddr+size) <= 0x1f3a0000)
+		return;
+
+	if (pmap_extract(pmap_kernel(), bsh, (void *)&paddr) == 0) {
+		printf("bus_space_unmap: no pa for va %p\n", bsh);
+		return;
+	}
+
+	if (phys_map != NULL &&
+	    ((sva >= VM_MIN_KERNEL_ADDRESS) && (sva < VM_MAX_KERNEL_ADDRESS))) {
+		/* do not free memory which was stolen from the vm system */
+		uvm_km_free(kernel_map, sva, len);
+	}
+
+	if (extent_free(t->bus_extent, paddr, size, EX_NOWAIT |
+	    ((phys_map != NULL) ? EX_MALLOCOK : 0))) {
+		printf("bus_space_map: pa %p, size %p\n", paddr, size);
+		printf("bus_space_map: can't free region\n");
+	}
+}
+
+int
+mace_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
+	bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
+{
+        *nbshp = bsh + offset;
+        return (0);
+}
+
+/*
+ *  Macebus interrupt handler driver.
+ */
+
+
+intrmask_t mace_intem = 0x0;
+static intrmask_t intrtype[INTMASKSIZE];
+static intrmask_t intrmask[INTMASKSIZE];
+static intrmask_t intrlevel[INTMASKSIZE];
+struct intrhand *intrhand[INTMASKSIZE];
+
+static int fakeintr __P((void *));
+static int fakeintr(void *a) {return 0;}
+
+/*
+ *  Establish an interrupt handler called from the dispatcher.
+ *  The interrupt function established should return zero if
+ *  there was nothing to serve (no int) and non zero when an
+ *  interrupt was serviced.
+ *  Interrupts are numbered from 1 and up where 1 maps to HW int 0.
+ */
+void *   
+macebus_intr_establish(icp, irq, type, level, ih_fun, ih_arg, ih_what)
+	void *icp;
+        u_long irq;	/* XXX pci_intr_handle_t compatible XXX */
+        int type;
+        int level;
+        int (*ih_fun) __P((void *));
+        void *ih_arg;
+        char *ih_what;
+{
+	struct intrhand **p, *q, *ih;
+	static struct intrhand fakehand = {NULL, fakeintr};
+	int edge;
+extern int cold;
+
+static int initialized = 0;
+
+	if(!initialized) {
+/*INIT CODE HERE*/
+		initialized = 1;
+	}
+
+	if(irq > 62 || irq < 1) {
+		panic("intr_establish: illegal irq %d\n", irq);
+	}
+	irq -= 1;	/* Adjust for 1 being first (0 is no int) */
+
+	/* no point in sleeping unless someone can free memory. */
+	ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
+	if (ih == NULL)
+		panic("intr_establish: can't malloc handler info");
+
+	if(type == IST_NONE || type == IST_PULSE)
+		panic("intr_establish: bogus type");
+
+	switch (intrtype[irq]) {
+	case IST_EDGE:
+	case IST_LEVEL:
+		if (type == intrtype[irq])
+			break;
+	}
+
+	switch (type) {
+	case IST_EDGE:
+		edge |= 1 << irq;
+		break;
+	case IST_LEVEL:
+		edge &= ~(1 << irq);
+		break;
+	}
+
+	/*
+	 * Figure out where to put the handler.
+	 * This is O(N^2), but we want to preserve the order, and N is
+	 * generally small.
+	 */
+	for (p = &intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
+		;
+
+	/*
+	 * Actually install a fake handler momentarily, since we might be doing
+	 * this with interrupts enabled and don't want the real routine called
+	 * until masking is set up.
+	 */
+	fakehand.ih_level = level;
+	*p = &fakehand;
+
+	macebus_intr_makemasks();
+
+	/*
+	 * Poke the real handler in now.
+	 */
+	ih->ih_fun = ih_fun;
+	ih->ih_arg = ih_arg;
+	ih->ih_count = 0;
+	ih->ih_next = NULL;
+	ih->ih_level = level;
+	ih->ih_irq = irq;
+	ih->ih_what = ih_what;
+	*p = ih;
+
+	return (ih);
+}
+
+void
+macebus_intr_disestablish(void *p1, void *p2)
+{
+}
+
+/*
+ *  Regenerate interrupt masks to reflect reality.
+ */
+void
+macebus_intr_makemasks()
+{
+	int irq, level;
+	struct intrhand *q;
+
+	/* First, figure out which levels each IRQ uses. */
+	for (irq = 0; irq < INTMASKSIZE; irq++) {
+		int levels = 0;
+		for (q = intrhand[irq]; q; q = q->ih_next)
+			levels |= 1 << q->ih_level;
+		intrlevel[irq] = levels;
+	}
+
+	/* Then figure out which IRQs use each level. */
+	for (level = 0; level < 5; level++) {
+		int irqs = 0;
+		for (irq = 0; irq < INTMASKSIZE; irq++)
+			if (intrlevel[irq] & (1 << level))
+				irqs |= 1 << irq;
+		imask[level] = irqs | SINT_ALLMASK;
+	}
+
+	/*
+	 * There are tty, network and disk drivers that use free() at interrupt
+	 * time, so imp > (tty | net | bio).
+	 */
+	imask[IPL_VM] |= imask[IPL_TTY] | imask[IPL_NET] | imask[IPL_BIO];
+
+	/*
+	 * Enforce a hierarchy that gives slow devices a better chance at not
+	 * dropping data.
+	 */
+	imask[IPL_TTY] |= imask[IPL_NET] | imask[IPL_BIO];
+	imask[IPL_NET] |= imask[IPL_BIO];
+
+	/*
+	 * These are pseudo-levels.
+	 */
+	imask[IPL_NONE] = 0;
+	imask[IPL_HIGH] = -1;
+
+	/* And eventually calculate the complete masks. */
+	for (irq = 0; irq < INTMASKSIZE; irq++) {
+		int irqs = 1 << irq;
+		for (q = intrhand[irq]; q; q = q->ih_next)
+			irqs |= imask[q->ih_level];
+		intrmask[irq] = irqs | SINT_ALLMASK;
+	}
+
+	/* Lastly, determine which IRQs are actually in use. */
+	irq = 0;
+	for (level = 0; level < INTMASKSIZE; level++) {
+		if (intrhand[level]) {
+			irq |= 1 << level;
+		}
+	}
+	mace_intem = irq & 0x0000ffff;
+	hw_setintrmask(0);
+}
+
+void
+macebus_do_pending_int()
+{
+	struct intrhand *ih;
+	int vector;
+	intrmask_t pcpl;
+	intrmask_t hwpend;
+	struct trap_frame cf;
+static volatile int processing;
+
+	/* Don't recurse... */
+	if (processing)
+		return;	
+	processing = 1;
+
+/* XXX interrupt vulnerable when changing ipending */
+	pcpl = splhigh();		/* Turn off all */
+
+	/* XXX Fake a trapframe for clock pendings... */
+	cf.pc = (int)&macebus_do_pending_int;
+	cf.sr = 0;
+	cf.cpl = pcpl;
+
+	hwpend = ipending & ~pcpl;	/* Do now unmasked pendings */
+	hwpend &= ~(SINT_ALLMASK);
+	ipending &= ~hwpend;
+	while (hwpend) {
+		vector = ffs(hwpend) - 1;
+		hwpend &= ~(1L << vector);
+		ih = intrhand[vector];
+		while (ih) {
+			ih->frame = &cf;
+			if((*ih->ih_fun)(ih->ih_arg)) {
+				ih->ih_count++;
+			}
+			ih = ih->ih_next;
+		}
+	}
+	if ((ipending & SINT_CLOCKMASK) & ~pcpl) {
+		ipending &= ~SINT_CLOCKMASK;
+		softclock();
+	}
+	if ((ipending & SINT_NETMASK) & ~pcpl) {
+		extern int netisr;
+		int isr = netisr;
+		netisr = 0;
+		ipending &= ~SINT_NETMASK;
+#ifdef  INET
+#include "ether.h"
+		if (NETHER > 0 && isr & (1 << NETISR_ARP)) {
+			arpintr();
+		}
+
+		if (isr & (1 << NETISR_IP)) {
+			ipintr();
+		}
+#endif
+#ifdef INET6
+		if(isr & (1 << NETISR_IPV6)) {
+			ip6intr();
+		}
+#endif
+#ifdef NETATALK
+		if (isr & (1 << NETISR_ATALK)) {
+			atintr();
+		}
+#endif
+#ifdef  IMP
+		if (isr & (1 << NETISR_IMP)) {
+			impintr();
+		}
+#endif
+#ifdef  NS
+		if (isr & (1 << NETISR_NS)) {
+			nsintr();
+		}
+#endif
+#ifdef  ISO
+		if (isr & (1 << NETISR_ISO)) {
+			clnlintr();
+		}
+#endif
+#ifdef  CCITT
+		if (isr & (1 << NETISR_CCITT)) {
+			ccittintr();
+		}
+#endif
+#include "ppp.h"
+		if (NPPP > 0 && isr & (1 << NETISR_PPP)) {
+			pppintr();
+		}
+
+#include "bridge.h"
+		if (NBRIDGE > 0 && isr & (1 << NETISR_BRIDGE)) {
+			bridgeintr();
+		}
+	}
+
+#ifdef NOTYET
+	if ((ipending & SINT_TTYMASK) & ~pcpl) {
+		ipending &= ~SINT_TTYMASK;
+		compoll(NULL);
+	}
+#endif
+
+	cpl = pcpl;	/* Don't use splx... we are here already! */
+	hw_setintrmask(pcpl);
+
+	processing = 0;
+}
+
+/*
+ *  Process interrupts. The parameter pending has non-masked interrupts.
+ */
+intrmask_t
+macebus_iointr(intrmask_t hwpend, struct trap_frame *cf)
+{
+	struct intrhand *ih;
+	intrmask_t catched, vm;
+	int v;
+	intrmask_t pending;
+	u_int64_t intstat, isastat, mask;
+
+	intstat = bus_space_read_8(&crimebus_tag, crime_h, CRIME_INT_STAT);
+	intstat &= 0x0000ffff;
+	isastat = bus_space_read_8(&macebus_tag, mace_h, MACE_ISA_INT_STAT);
+	catched = 0;
+
+	/* Mask off masked interrupts and save them as pending */
+	if (intstat & cf->cpl) {
+		ipending |= intstat & cf->cpl;
+		mask = bus_space_read_8(&crimebus_tag, crime_h, CRIME_INT_MASK);
+		mask &= ~ipending;
+		bus_space_write_8(&crimebus_tag, crime_h, CRIME_INT_MASK, mask);
+		catched++;
+	}
+
+	/* Scan the first 16 for now */
+	pending = intstat & ~cf->cpl;
+
+	for (v = 0, vm = 1; pending != 0 && v < 16 ; v++, vm <<= 1) {
+		if (pending & vm) {
+			ih = intrhand[v];
+
+			while (ih) {
+				ih->frame = cf;
+				if ((*ih->ih_fun)(ih->ih_arg)) {
+					catched |= vm;
+					ih->ih_count++;
+				}
+				ih = ih->ih_next;
+			}
+		}
+	}
+	if (catched) {
+		return CR_INT_0;
+	}
+
+	return 0;  /* Non found here */
+}
+
+
+/*
+ *  Macebus auxilary functions run each clock interrupt.
+ */
+intrmask_t
+macebus_aux(intrmask_t hwpend, struct trap_frame *cf)
+{
+	u_int64_t mask;
+extern char idle[];
+extern char e_idle[];
+
+	mask = bus_space_read_8(&macebus_tag, mace_h, MACE_ISA_MISC_REG);
+	mask |= MACE_ISA_MISC_RLED_OFF | MACE_ISA_MISC_GLED_OFF;
+
+	/* GREEN - User mode   */
+	/* AMBER - System mode */
+	/* RED   - IDLE        */
+	if (cf->sr & SR_KSU_USER) {
+		mask &= ~MACE_ISA_MISC_GLED_OFF;
+	} else if (cf->pc >= (long)idle && cf->pc < (long)e_idle) {
+		mask &= ~MACE_ISA_MISC_RLED_OFF;
+	} else {
+		mask &= ~(MACE_ISA_MISC_RLED_OFF | MACE_ISA_MISC_GLED_OFF);
+	}
+	bus_space_write_8(&macebus_tag, mace_h, MACE_ISA_MISC_REG, mask);
+
+	if (maceticks++ > 100*15) {
+		maceticks = 0;
+	}
+
+	return 0; /* Real clock int handler registers */
+}
diff --git a/sys/arch/sgi/localbus/macebus.h b/sys/arch/sgi/localbus/macebus.h
new file mode 100644
index 00000000000..d5a3438ebc3
--- /dev/null
+++ b/sys/arch/sgi/localbus/macebus.h
@@ -0,0 +1,120 @@
+/*	$OpenBSD*/
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.com).
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef	_MACEBUS_H_
+#define	_MACEBUS_H_ 1
+
+#include <machine/bus.h>
+
+/*
+ *  Physical address of MACEBUS.
+ */
+#define	MACEBUS_BASE		0x1f000000
+
+/*
+ *  Offsets for various I/O sections on MACEBUS
+ */
+#define	MACE_PCI_OFFS		0x00080000
+#define	MACE_VIN1_OFFS		0x00100000
+#define	MACE_VIN2_OFFS		0x00180000
+#define	MACE_VOUT_OFFS		0x00200000
+#define	MACE_IO_OFFS		0x00300000
+#define	MACE_ISAX_OFFS		0x00380000
+
+/*
+ *  PCI control registers (relative MACE_PCI_OFFS)
+ */
+#define	MACE_PCI_ERROR_ADDRESS	0x0000
+#define	MACE_PCI_ERROR_FLAGS	0x0004
+#define	MACE_PCI_CONTROL	0x0008
+#define	MACE_PCI_REVISION	0x000c
+#define	MACE_PCI_FLUSH		0x000c
+#define	MACE_PCI_CFGADDR	0x0cf8
+#define	MACE_PCI_CFGDATA	0x0cfc
+
+#define	MACE_PCI_INTCTRL	0x000000ff	/* Interrupt control mask */
+
+/* PCI_ERROR_FLAGS Bits */
+#define	PERR_MASTER_ABORT		0x80000000
+#define	PERR_TARGET_ABORT		0x40000000
+#define	PERR_DATA_PARITY_ERR		0x20000000
+#define	PERR_RETRY_ERR			0x10000000
+#define	PERR_ILLEGAL_CMD		0x08000000
+#define	PERR_SYSTEM_ERR			0x04000000
+#define	PERR_INTERRUPT_TEST		0x02000000
+#define	PERR_PARITY_ERR			0x01000000
+#define	PERR_OVERRUN			0x00800000
+#define	PERR_RSVD			0x00400000
+#define	PERR_MEMORY_ADDR		0x00200000
+#define	PERR_CONFIG_ADDR		0x00100000
+#define	PERR_MASTER_ABORT_ADDR_VALID	0x00080000
+#define	PERR_TARGET_ABORT_ADDR_VALID	0x00040000
+#define	PERR_DATA_PARITY_ADDR_VALID	0x00020000
+#define	PERR_RETRY_ADDR_VALID		0x00010000
+
+
+/*
+ *  MACE ISA definitions.
+ */
+#define	MACE_ISA_OFFS		(MACE_IO_OFFS+0x00010000)
+
+#define	MACE_ISA_MISC_REG	0x0008	/* Various status and controls */
+#define	MACE_ISA_INT_STAT	0x0010
+#define	MACE_ISA_INT_MASK	0x0018
+
+/* MACE_ISA_MISC_REG definitions */
+#define	MACE_ISA_MISC_RLED_OFF	0x0010	/* Turns off RED LED */
+#define	MACE_ISA_MISC_GLED_OFF	0x0020	/* Turns off GREEN LED */
+
+
+/* ISA Periferials */
+#define	MACE_ISA_EPP_OFFS	(MACE_ISAX_OFFS+0x00000000)
+#define	MACE_ISA_ECP_OFFS	(MACE_ISAX_OFFS+0x00008000)
+#define	MACE_ISA_SER1_OFFS	(MACE_ISAX_OFFS+0x00010000)
+#define	MACE_ISA_SER2_OFFS	(MACE_ISAX_OFFS+0x00018000)
+#define	MACE_ISA_RTC_OFFS	(MACE_ISAX_OFFS+0x00020000)
+#define	MACE_ISA_GAME_OFFS	(MACE_ISAX_OFFS+0x00030000)
+
+
+extern bus_space_t macebus_tag;
+
+u_int8_t mace_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int16_t mace_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int32_t mace_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int64_t mace_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+
+void mace_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int8_t);
+void mace_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int16_t);
+void mace_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int32_t);
+void mace_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int64_t);
+
+int mace_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
+void mace_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+int mace_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
+
+#endif	/* _MACEBUS_H_ */
diff --git a/sys/arch/sgi/localbus/macectrl.S b/sys/arch/sgi/localbus/macectrl.S
new file mode 100644
index 00000000000..879032928aa
--- /dev/null
+++ b/sys/arch/sgi/localbus/macectrl.S
@@ -0,0 +1,55 @@
+/*	$OpenBSD: macectrl.S,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <machine/param.h>
+#include <machine/psl.h>
+#include <machine/asm.h>
+#include <machine/cpu.h>
+#include <machine/regnum.h>
+
+#include "assym.h"
+
+	.set	mips3
+	.set	noreorder		# Noreorder is default style!
+
+	.globl	hw_setintrmask
+LEAF(hw_setintrmask)
+	lw	v0, mace_intem
+	PTR_L	v1, hwmask_addr
+	nor	a0, zero, a0
+	beqz	v1, 1f			# addr not set, skip.
+	and	v0, a0
+	jr	ra
+	sd	v0, 0(v1)
+1:
+	jr	ra
+	nop
+END(hw_setintrmask)
+
+	.data
+	.globl	hwmask_addr
+hwmask_addr: .long 0
diff --git a/sys/arch/sgi/pci/macepcibridge.c b/sys/arch/sgi/pci/macepcibridge.c
new file mode 100644
index 00000000000..aebef17e5f2
--- /dev/null
+++ b/sys/arch/sgi/pci/macepcibridge.c
@@ -0,0 +1,566 @@
+/*	$OpenBSD: macepcibridge.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ * Machine dependent PCI BUS Bridge driver.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/device.h>
+#include <sys/proc.h>
+#include <sys/ioctl.h>
+#include <sys/extent.h>
+#include <uvm/uvm.h>
+
+#include <machine/autoconf.h>
+#include <machine/pte.h>
+#include <machine/cpu.h>
+#include <machine/vmparam.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+
+#include <mips64/archtype.h>
+#include <sgi/localbus/macebus.h>
+#include <sgi/pci/macepcibrvar.h>
+
+extern void *macebus_intr_establish(void *, u_long, int, int,
+		int (*)(void *), void *, char *);
+extern void macebus_intr_disestablish(void *, void *);
+extern void pciaddr_remap(pci_chipset_tag_t);
+
+/**/
+int	 pcibrmatch(struct device *, void *, void *);
+void	 pcibrattach(struct device *, struct device *, void *);
+void	 pcibr_attach_hook(struct device *, struct device *,
+				struct pcibus_attach_args *);
+int	 pcibr_errintr(void *);
+
+pcitag_t pcibr_make_tag(void *, int, int, int);
+void	 pcibr_decompose_tag(void *, pcitag_t, int *, int *, int *);
+
+int      pcibr_bus_maxdevs(void *, int);
+pcireg_t pcibr_conf_read(void *, pcitag_t, int);
+void     pcibr_conf_write(void *, pcitag_t, int, pcireg_t);
+
+int      pcibr_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
+const char *pcibr_intr_string(void *, pci_intr_handle_t);
+void     *pcibr_intr_establish(void *, pci_intr_handle_t,
+            int, int (*func)(void *), void *, char *);
+void     pcibr_intr_disestablish(void *, void *);
+
+
+struct cfattach macepcibr_ca = {
+        sizeof(struct pcibr_softc), pcibrmatch, pcibrattach,
+};
+
+struct cfdriver macepcibr_cd = {
+	NULL, "macepcibr", DV_DULL,
+};
+
+long pci_io_ext_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof (long)];
+long pci_mem_ext_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof (long)];
+
+bus_space_t pcibbus_mem_tag = {
+	NULL,
+	(bus_addr_t)MACE_PCI_MEM_BASE,
+	NULL,
+	0,
+	pcib_read_1, pcib_write_1,
+	pcib_read_2, pcib_write_2,
+	pcib_read_4, pcib_write_4,
+	pcib_read_8, pcib_write_8,
+	pcib_space_map, pcib_space_unmap, pcib_space_region,
+};
+
+bus_space_t pcibbus_io_tag = {
+	NULL,
+	(bus_addr_t)MACE_PCI_IO_BASE,
+	NULL,
+	0,
+	pcib_read_1, pcib_write_1,
+	pcib_read_2, pcib_write_2,
+	pcib_read_4, pcib_write_4,
+	pcib_read_8, pcib_write_8,
+	pcib_space_map, pcib_space_unmap, pcib_space_region,
+};
+
+/*
+ * PCI doesn't have any special needs; just use the generic versions
+ * of these functions.
+ */
+struct machine_bus_dma_tag pci_bus_dma_tag = {
+	NULL,                   /* _cookie */
+	_dmamap_create,
+	_dmamap_destroy,
+	_dmamap_load,
+	_dmamap_load_mbuf,
+	_dmamap_load_uio,
+	_dmamap_load_raw,
+	_dmamap_unload,
+	_dmamap_sync,
+	_dmamem_alloc,
+	_dmamem_free,
+	_dmamem_map,
+	_dmamem_unmap,
+	_dmamem_mmap,
+	NULL
+};
+
+struct _perr_map {
+	pcireg_t mask;
+	pcireg_t flag;
+	char *text;
+} perr_map[] = {
+  { PERR_MASTER_ABORT,	PERR_MASTER_ABORT_ADDR_VALID,	"master abort" },
+  { PERR_TARGET_ABORT,	PERR_TARGET_ABORT_ADDR_VALID,	"target abort" },
+  { PERR_DATA_PARITY_ERR,PERR_DATA_PARITY_ADDR_VALID,	"data parity error" },
+  { PERR_RETRY_ERR,	PERR_RETRY_ADDR_VALID,	"retry error" },
+  { PERR_ILLEGAL_CMD,	0,	"illegal command" },
+  { PERR_SYSTEM_ERR,	0,	"system error" },
+  { PERR_INTERRUPT_TEST,0,	"interrupt test" },
+  { PERR_PARITY_ERR,	0,	"parity error" },
+  { PERR_OVERRUN,	0,	"overrun error" },
+  { PERR_RSVD,		0,	"reserved ??" },
+  { PERR_MEMORY_ADDR,	0,	"memory address" },
+  { PERR_CONFIG_ADDR,	0,	"config address" },
+  { 0, 0 }
+};
+
+
+static int      pcibrprint __P((void *, const char *pnp));
+
+
+int
+pcibrmatch(struct device *parent, void *match, void *aux)
+{
+	switch(sys_config.system_type) {
+	case SGI_O2:
+		return 1;
+	}
+	return (0);
+}
+
+void
+pcibrattach(struct device *parent, struct device *self, void *aux)
+{
+	struct pcibr_softc *sc = (struct pcibr_softc *)self;
+	struct pcibus_attach_args pba;
+	struct confargs *ca = aux;
+	pcireg_t pcireg;
+
+	/*
+	 *  Common to all bridge chips.
+	 */
+	sc->sc_pc.pc_conf_v = sc;
+	sc->sc_pc.pc_attach_hook = pcibr_attach_hook;
+	sc->sc_pc.pc_make_tag = pcibr_make_tag;
+	sc->sc_pc.pc_decompose_tag = pcibr_decompose_tag;
+	sc->sc_pc.pc_sync_cache = Mips_IOSyncDCache;
+
+	/* Create extents for PCI mappings */
+	pcibbus_io_tag.bus_extent = extent_create("pci_io",
+		MACE_PCI_IO_BASE, MACE_PCI_IO_BASE + MACE_PCI_IO_SIZE - 1,
+		M_DEVBUF, (caddr_t)pci_io_ext_storage,
+		sizeof(pci_io_ext_storage), EX_NOCOALESCE|EX_NOWAIT);
+
+	pcibbus_mem_tag.bus_extent = extent_create("pci_mem",
+		MACE_PCI_MEM_BASE, MACE_PCI_MEM_BASE + MACE_PCI_MEM_SIZE - 1,
+		M_DEVBUF, (caddr_t)pci_mem_ext_storage,
+		sizeof(pci_mem_ext_storage), EX_NOCOALESCE|EX_NOWAIT);
+
+	/* local -> PCI MEM mapping offset */
+	sc->sc_mem_bus_space = &pcibbus_mem_tag;
+
+	/* local -> PCI IO mapping offset */
+	sc->sc_io_bus_space = &pcibbus_io_tag;
+
+	/* Map in PCI control registers */
+	sc->sc_memt = ca->ca_memt;
+	if (bus_space_map(sc->sc_memt, MACE_PCI_OFFS, 4096, 0, &sc->sc_memh)) {
+		printf("UH-OH! Can't map PCI control registers!\n");
+		return;
+	}
+	pcireg = bus_space_read_4(sc->sc_memt, sc->sc_memh, MACE_PCI_REVISION);
+
+	printf(" Mace revision %d, host system O2.\n", pcireg);
+
+	/* Register the PCI ERROR interrupt handler */
+	BUS_INTR_ESTABLISH(ca, NULL, 8, IST_LEVEL, IPL_HIGH,
+	    pcibr_errintr, (void *)sc, sc->sc_dev.dv_xname);
+
+	sc->sc_pc.pc_bus_maxdevs = pcibr_bus_maxdevs;
+	sc->sc_pc.pc_conf_read = pcibr_conf_read;
+	sc->sc_pc.pc_conf_write = pcibr_conf_write;
+
+	sc->sc_pc.pc_intr_v = NULL;
+	sc->sc_pc.pc_intr_map = pcibr_intr_map;
+	sc->sc_pc.pc_intr_string = pcibr_intr_string;
+	sc->sc_pc.pc_intr_establish = pcibr_intr_establish;
+	sc->sc_pc.pc_intr_disestablish = pcibr_intr_disestablish;
+
+	/*
+	 *  Firmware sucks. Remap PCI BAR registers. (sigh)
+	 */
+	pciaddr_remap(&sc->sc_pc);
+
+	/*
+	 *  Configure our PCI devices.
+	 */
+	pba.pba_busname = "pci";
+	pba.pba_iot = sc->sc_io_bus_space;
+	pba.pba_memt = sc->sc_mem_bus_space;
+	pba.pba_dmat = malloc(sizeof(pci_bus_dma_tag), M_DEVBUF, M_NOWAIT);
+	pci_bus_dma_tag.dma_offs = 0x00000000;
+	*pba.pba_dmat = pci_bus_dma_tag;
+	pba.pba_pc = &sc->sc_pc;
+	pba.pba_bus = sc->sc_dev.dv_unit;
+	config_found(self, &pba, pcibrprint);
+
+	/* Clear PCI errors and set up error interrupt */
+	bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_ERROR_FLAGS, 0);
+	pcireg = bus_space_read_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CONTROL);
+	pcireg |= MACE_PCI_INTCTRL;
+	bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CONTROL, pcireg);
+}
+
+static int
+pcibrprint(aux, pnp)
+	void *aux;
+	const char *pnp;
+{
+	struct pcibus_attach_args *pba = aux;
+
+	if(pnp)
+		printf("%s at %s", pba->pba_busname, pnp);
+	printf(" bus %d", pba->pba_bus);
+	return(UNCONF);
+}
+
+void
+pcibr_attach_hook(parent, self, pba)
+	struct device *parent, *self;
+	struct pcibus_attach_args *pba;
+{
+}
+
+int
+pcibr_errintr(void *v)
+{
+	struct pcibr_softc *sc = v;
+	bus_space_tag_t memt = sc->sc_memt;
+	bus_space_handle_t memh = sc->sc_memh;
+	struct _perr_map *emap = perr_map;
+	pcireg_t stat, erraddr;
+
+	/* Check and clear any PCI error, report found */
+	stat = bus_space_read_4(memt, memh, MACE_PCI_ERROR_FLAGS);
+	erraddr = bus_space_read_4(memt, memh, MACE_PCI_ERROR_ADDRESS);
+	while (emap->mask) {
+		if (stat & emap->mask) {
+			printf("mace: pci err %s", emap->text);
+			if (emap->flag && stat & emap->flag)
+				printf(" at address %p", erraddr);
+			printf("\n");
+		}
+		emap++;
+	}
+	bus_space_write_4(memt, memh, MACE_PCI_ERROR_FLAGS, 0);
+	return 1;
+}
+
+/*
+ *  PCI access drivers
+ */
+
+pcitag_t
+pcibr_make_tag(cpv, bus, dev, fnc)
+	void *cpv;
+	int bus, dev, fnc;
+{
+	return (bus << 16) | (dev << 11) | (fnc << 8);
+}
+
+void
+pcibr_decompose_tag(cpv, tag, busp, devp, fncp)
+	void *cpv;
+	pcitag_t tag;
+	int *busp, *devp, *fncp;
+{
+	if (busp != NULL)
+		*busp = (tag >> 16) & 0x7;
+	if (devp != NULL)
+		*devp = (tag >> 11) & 0x1f;
+	if (fncp != NULL)
+		*fncp = (tag >> 8) & 0x7;
+}
+
+int
+pcibr_bus_maxdevs(cpv, busno)
+	void *cpv;
+	int busno;
+{
+	return(16);
+}
+
+pcireg_t
+pcibr_conf_read(cpv, tag, offset)
+	void *cpv;
+	pcitag_t tag;
+	int offset;
+{
+	struct pcibr_softc *sc = cpv;
+	bus_space_tag_t memt = sc->sc_memt;
+	bus_space_handle_t memh = sc->sc_memh;
+	pcireg_t data, stat;
+	int s;
+
+	s = splhigh();
+
+	bus_space_write_4(memt, memh, MACE_PCI_ERROR_FLAGS, 0);
+	data = tag | offset;
+	bus_space_write_4(memt, memh, MACE_PCI_CFGADDR, data);
+	data = bus_space_read_4(memt, memh, MACE_PCI_CFGDATA);
+	bus_space_write_4(memt, memh, MACE_PCI_CFGADDR, 0);
+
+	/* Check and clear any PCI error, returns -1 if error is found */
+	stat = bus_space_read_4(memt, memh, MACE_PCI_ERROR_FLAGS);
+	bus_space_write_4(memt, memh, MACE_PCI_ERROR_FLAGS, 0);
+	if (stat & (PERR_MASTER_ABORT | PERR_TARGET_ABORT |
+		    PERR_DATA_PARITY_ERR | PERR_RETRY_ERR)) {
+		data = -1;
+	}
+
+	splx(s);
+	return(data);
+}
+
+void
+pcibr_conf_write(cpv, tag, offset, data)
+	void *cpv;
+	pcitag_t tag;
+	int offset;
+	pcireg_t data;
+{
+	struct pcibr_softc *sc = cpv;
+	pcireg_t addr;
+	int s;
+
+	s = splhigh();
+
+	addr = tag | offset;
+	bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CFGADDR, addr);
+	bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CFGDATA, data);
+	bus_space_write_4(sc->sc_memt, sc->sc_memh, MACE_PCI_CFGADDR, 0);
+
+	splx(s);
+}
+
+int
+pcibr_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
+{
+	int bus, device, pirq;
+
+	*ihp = -1;
+
+        if (pa->pa_intrpin == 0) {
+                /* No IRQ used. */
+                return 1;
+        }
+        if (pa->pa_intrpin > 4) {
+                printf("pcibr_intr_map: bad interrupt pin %d\n", pa->pa_intrpin);
+                return 1;
+        }
+
+	pcibr_decompose_tag((void *)NULL, pa->pa_tag, &bus, &device, NULL);
+
+	if (sys_config.system_type == SGI_O2) {
+		pirq = -1;
+		switch (device) {
+		case 1:
+			pirq = 9;
+			break;
+		case 2:
+			pirq = 10;
+			break;
+		case 3:
+			pirq = 11;
+			break;
+		}
+	}
+
+	*ihp = pirq;
+	return 0;
+}
+
+const char *
+pcibr_intr_string(lcv, ih)
+	void *lcv;
+	pci_intr_handle_t ih;
+{
+static char str[16];
+
+	snprintf(str, sizeof(str), "irq %d", ih);
+	return(str);
+}
+
+void *
+pcibr_intr_establish(lcv, ih, level, func, arg, name)
+	void *lcv;
+	pci_intr_handle_t ih;
+	int level;
+	int (*func) __P((void *));
+	void *arg;
+	char *name;
+{
+	return macebus_intr_establish(NULL, ih, IST_LEVEL, level, func, arg, name);
+}
+
+void
+pcibr_intr_disestablish(lcv, cookie)
+	void *lcv, *cookie;
+{
+	macebus_intr_disestablish(lcv, cookie);
+}
+
+/*
+ *  Bus access primitives
+ *  XXX 64 bit access not clean in lp32 mode.
+ */
+
+u_int8_t
+pcib_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	return *(volatile u_int8_t *)(h + (o | 3) - (o & 3));
+}
+
+u_int16_t
+pcib_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	return *(volatile u_int16_t *)(h + (o | 2) - (o & 3));
+}
+
+u_int32_t
+pcib_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	return *(volatile u_int32_t *)(h + o);
+}
+
+u_int64_t
+pcib_read_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
+{
+	return *(volatile u_int64_t *)(h + o);
+}
+
+void
+pcib_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
+{
+	*(volatile u_int8_t *)(h + (o | 3) - (o & 3)) = v;
+}
+
+void
+pcib_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int16_t v)
+{
+	*(volatile u_int16_t *)(h + (o | 2) - (o & 3)) = v;
+}
+
+void
+pcib_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int32_t v)
+{
+	*(volatile u_int32_t *)(h + o) = v;
+}
+
+void
+pcib_write_8(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, u_int64_t v)
+{
+	*(volatile u_int64_t *)(h + o) = v;
+}
+
+int
+pcib_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
+        int cacheable, bus_space_handle_t *bshp)
+{
+	bus_addr_t bpa;
+	int error;
+	bpa = t->bus_base + (offs & 0x01ffffff);
+
+	if ((error = extent_alloc_region(t->bus_extent, bpa, size,
+	    EX_NOWAIT | EX_MALLOCOK))) {
+		return error;
+	}
+
+	if ((error  = bus_mem_add_mapping(bpa, size, cacheable, bshp))) {
+		if (extent_free(t->bus_extent, bpa, size, EX_NOWAIT |
+		    ((phys_map != NULL) ? EX_MALLOCOK : 0))) {
+			printf("bus_space_map: pa %p, size %p\n", bpa, size);
+			printf("bus_space_map: can't free region\n");
+		}
+	}
+	return 0;
+}
+
+void
+pcib_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
+{
+        bus_addr_t sva;
+        bus_size_t off, len;
+        bus_addr_t paddr;
+
+	/* should this verify that the proper size is freed? */
+	sva = trunc_page(bsh);
+	off = bsh - sva;
+	len = size+off;
+
+	if (pmap_extract(pmap_kernel(), bsh, (void *)&paddr) == 0) {
+		printf("bus_space_unmap: no pa for va %p\n", bsh);
+		return;
+	}
+
+	if (phys_map != NULL &&
+	    ((sva >= VM_MIN_KERNEL_ADDRESS) && (sva < VM_MAX_KERNEL_ADDRESS))) {
+		/* do not free memory which was stolen from the vm system */
+		uvm_km_free(kernel_map, sva, len);
+	}
+
+	if (extent_free(t->bus_extent, paddr, size, EX_NOWAIT |
+	    ((phys_map != NULL) ? EX_MALLOCOK : 0))) {
+		printf("bus_space_map: pa %p, size %p\n", paddr, size);
+		printf("bus_space_map: can't free region\n");
+	}
+}
+
+int
+pcib_space_region(bus_space_tag_t t, bus_space_handle_t bsh,
+	bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
+{
+        *nbshp = bsh + offset;
+        return (0);
+}
diff --git a/sys/arch/sgi/pci/macepcibrvar.h b/sys/arch/sgi/pci/macepcibrvar.h
new file mode 100644
index 00000000000..b45b754e8fb
--- /dev/null
+++ b/sys/arch/sgi/pci/macepcibrvar.h
@@ -0,0 +1,60 @@
+/*	$OpenBSD: macepcibrvar.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB (www.opsycon.se)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _PCIBRVAR_H_
+#define _PCIBRVAR_H_
+
+#define	MACE_PCI_IO_BASE	0x18000000
+#define	MACE_PCI_IO_SIZE	0x02000000
+#define	MACE_PCI_MEM_BASE	0x1a000000
+#define	MACE_PCI_MEM_SIZE	0x02000000
+
+struct pcibr_softc {
+	struct device	sc_dev;
+	struct mips_bus_space *sc_mem_bus_space;
+	struct mips_bus_space *sc_io_bus_space;
+	struct mips_pci_chipset sc_pc;
+	bus_space_tag_t sc_memt;
+	bus_space_handle_t sc_memh;
+};
+
+u_int8_t pcib_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int16_t pcib_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int32_t pcib_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+u_int64_t pcib_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+
+void pcib_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int8_t);
+void pcib_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int16_t);
+void pcib_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int32_t);
+void pcib_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, u_int64_t);
+
+int pcib_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
+void pcib_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
+int pcib_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
+
+#endif
diff --git a/sys/arch/sgi/pci/macepcimap.c b/sys/arch/sgi/pci/macepcimap.c
new file mode 100644
index 00000000000..7ae54e31629
--- /dev/null
+++ b/sys/arch/sgi/pci/macepcimap.c
@@ -0,0 +1,310 @@
+/*	$OpenBSD: macepcimap.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+/*	$NetBSD: pci_mace.c,v 1.2 2004/01/19 10:28:28 sekiya Exp $	*/
+
+/*
+ * Copyright (c) 2001,2003 Christopher Sekiya
+ * Copyright (c) 2000 Soren S. Jorvang
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *          This product includes software developed for the
+ *          NetBSD Project.  See http://www.NetBSD.org/ for
+ *          information about NetBSD.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+
+#include <machine/cpu.h>
+#include <machine/autoconf.h>
+#include <machine/vmparam.h>
+#include <machine/bus.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcidevs.h>
+
+
+void pciaddr_remap(pci_chipset_tag_t);
+void pciaddr_resource_manage(pci_chipset_tag_t, pcitag_t, void *);
+bus_addr_t pciaddr_ioaddr(u_int32_t);
+int pciaddr_do_resource_allocate(pci_chipset_tag_t, pcitag_t, int, void *,
+	int, bus_addr_t *, bus_size_t);
+void pciaddr_print_devid(pci_chipset_tag_t, pcitag_t);
+
+
+#define PAGE_ALIGN(x)	(((x) + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1))
+#define MEG_ALIGN(x)	(((x) + 0x100000 - 1) & ~(0x100000 - 1))
+
+
+unsigned int ioaddr_base = 0x1000;
+unsigned int memaddr_base = 0x80100000;
+
+void
+pciaddr_remap(pci_chipset_tag_t pc)
+{
+	pcitag_t devtag;
+	int device;
+
+	/* Must fix up all PCI devices, ahc_pci expects proper i/o mapping */
+	for (device = 1; device < 4; device++) {
+		const struct pci_quirkdata *qd;
+		int function, nfuncs;
+		pcireg_t bhlcr, id;
+
+		devtag = pci_make_tag(pc, 0, device, 0);
+		id = pci_conf_read(pc, devtag, PCI_ID_REG);
+
+		/* Invalid vendor ID value? */
+		if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
+			continue;
+		/* XXX Not invalid, but we've done this ~forever. */
+		if (PCI_VENDOR(id) == 0)
+			continue;
+
+		qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
+		bhlcr = pci_conf_read(pc, devtag, PCI_BHLC_REG);
+
+		if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
+		    (qd != NULL &&
+		     (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
+			nfuncs = 8;
+		else
+			nfuncs = 1;
+
+		for (function = 0; function < nfuncs; function++) {
+			devtag = pci_make_tag(pc, 0, device, function);
+			id = pci_conf_read(pc, devtag, PCI_ID_REG);
+
+			/* Invalid vendor ID value? */
+			if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
+				continue;
+			/* Not invalid, but we've done this ~forever */
+			if (PCI_VENDOR(id) == 0)
+				continue;
+
+			pciaddr_resource_manage(pc, devtag, NULL);
+		}
+	}
+}
+
+
+void
+pciaddr_resource_manage(pc, tag, ctx)
+	pci_chipset_tag_t pc;
+	pcitag_t tag;
+	void *ctx;
+{
+	pcireg_t val, mask;
+	bus_addr_t addr;
+	bus_size_t size;
+	int error, mapreg, type, reg_start, reg_end, width;
+
+	val = pci_conf_read(pc, tag, PCI_BHLC_REG);
+	switch (PCI_HDRTYPE_TYPE(val)) {
+	default:
+		printf("WARNING: unknown PCI device header.");
+		return;
+	case 0:
+		reg_start = PCI_MAPREG_START;
+		reg_end   = PCI_MAPREG_END;
+		break;
+	case 1: /* PCI-PCI bridge */
+		reg_start = PCI_MAPREG_START;
+		reg_end   = PCI_MAPREG_PPB_END;
+		break;
+	case 2: /* PCI-CardBus bridge */
+		reg_start = PCI_MAPREG_START;
+		reg_end   = PCI_MAPREG_PCB_END;
+		break;
+	}
+	error = 0;
+
+	for (mapreg = reg_start; mapreg < reg_end; mapreg += width) {
+		/* inquire PCI device bus space requirement */
+		val = pci_conf_read(pc, tag, mapreg);
+		pci_conf_write(pc, tag, mapreg, ~0);
+
+		mask = pci_conf_read(pc, tag, mapreg);
+		pci_conf_write(pc, tag, mapreg, val);
+
+		type = PCI_MAPREG_TYPE(val);
+		width = 4;
+
+		if (type == PCI_MAPREG_TYPE_MEM) {
+			size = PCI_MAPREG_MEM_SIZE(mask);
+
+			/*
+			 * XXXrkb: for MEM64 BARs, to be totally kosher
+			 * about the requested size, need to read mask
+			 * from top 32bits of BAR and stir that into the
+			 * size calculation, like so:
+			 *
+			 * case PCI_MAPREG_MEM_TYPE_64BIT:
+			 *	bar64 = pci_conf_read(pb->pc, tag, br + 4);
+			 *	pci_conf_write(pb->pc, tag, br + 4, 0xffffffff);
+			 *	mask64 = pci_conf_read(pb->pc, tag, br + 4);
+			 *	pci_conf_write(pb->pc, tag, br + 4, bar64);
+			 *	size = (u_int64_t) PCI_MAPREG_MEM64_SIZE(
+			 *	      (((u_int64_t) mask64) << 32) | mask);
+			 *	width = 8;
+			 *
+			 * Fortunately, anything with all-zeros mask in the
+			 * lower 32-bits will have size no less than 1 << 32,
+			 * which we're not prepared to deal with, so I don't
+			 * feel bad punting on it...
+			 */
+			if (PCI_MAPREG_MEM_TYPE(val) ==
+			    PCI_MAPREG_MEM_TYPE_64BIT) {
+				/*
+				 * XXX We could examine the upper 32 bits
+				 * XXX of the BAR here, but we are totally
+				 * XXX unprepared to handle a non-zero value,
+				 * XXX either here or anywhere else in the
+				 * XXX sgimips code (not sure about MI code).
+				 * XXX
+				 * XXX So just arrange to skip the top 32
+				 * XXX bits of the BAR and zero then out
+				 * XXX if the BAR is in use.
+				 */
+				width = 8;
+
+				if (size != 0)
+					pci_conf_write(pc, tag,
+					    mapreg + 4, 0);
+			}
+		} else {
+			/*
+			 * Upper 16 bits must be one.  Devices may hardwire
+			 * them to zero, though, per PCI 2.2, 6.2.5.1, p 203.
+			 */
+			mask |= 0xffff0000;
+			size = PCI_MAPREG_IO_SIZE(mask);
+		}
+
+		if (size == 0) /* unused register */
+			continue;
+
+		addr = pciaddr_ioaddr(val);
+
+		/* reservation/allocation phase */
+		error += pciaddr_do_resource_allocate(pc, tag, mapreg,
+		    ctx, type, &addr, size);
+
+	}
+
+	/* enable/disable PCI device */
+	val = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
+
+	if (error == 0)
+		val |= (PCI_COMMAND_IO_ENABLE |
+			PCI_COMMAND_MEM_ENABLE |
+			PCI_COMMAND_MASTER_ENABLE |
+			PCI_COMMAND_SPECIAL_ENABLE |
+			PCI_COMMAND_INVALIDATE_ENABLE |
+			PCI_COMMAND_PARITY_ENABLE);
+	else
+		val &= ~(PCI_COMMAND_IO_ENABLE |
+			 PCI_COMMAND_MEM_ENABLE |
+			 PCI_COMMAND_MASTER_ENABLE);
+
+	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, val);
+
+}
+
+bus_addr_t
+pciaddr_ioaddr(val)
+	u_int32_t val;
+{
+
+	return ((PCI_MAPREG_TYPE(val) == PCI_MAPREG_TYPE_MEM) ?
+	    PCI_MAPREG_MEM_ADDR(val) : PCI_MAPREG_IO_ADDR(val));
+}
+
+int
+pciaddr_do_resource_allocate(pc, tag, mapreg, ctx, type, addr, size)
+	pci_chipset_tag_t pc;
+	pcitag_t tag;
+	void *ctx;
+	int mapreg, type;
+	bus_addr_t *addr;
+	bus_size_t size;
+{
+
+	switch (type) {
+	case PCI_MAPREG_TYPE_IO:
+		*addr = ioaddr_base;
+		ioaddr_base += PAGE_ALIGN(size);
+		break;
+
+	case PCI_MAPREG_TYPE_MEM:
+		*addr = memaddr_base;
+		memaddr_base += MEG_ALIGN(size);
+		break;
+
+	default:
+		printf("attempt to remap unknown region (addr 0x%lx, "
+		    "size 0x%lx, type %d)\n", *addr, size, type);
+		return 0;
+	}
+
+
+	/* write new address to PCI device configuration header */
+	pci_conf_write(pc, tag, mapreg, *addr);
+
+	/* check */
+#ifdef DEBUG
+	if (!pcibiosverbose) {
+		printf("pci_addr_fixup: ");
+		pciaddr_print_devid(pc, tag);
+	}
+#endif
+	if (pciaddr_ioaddr(pci_conf_read(pc, tag, mapreg)) != *addr) {
+		pci_conf_write(pc, tag, mapreg, 0); /* clear */
+		printf("fixup failed. (new address=%#x)\n", (unsigned)*addr);
+		return (1);
+	}
+#ifdef DEBUG
+	if (!pcibiosverbose)
+		printf("new address 0x%08x (size 0x%x)\n", (unsigned)*addr,
+		    (unsigned)size);
+#endif
+
+	return (0);
+}
+
+void
+pciaddr_print_devid(pci_chipset_tag_t pc, pcitag_t tag)
+{
+	int bus, device, function;
+	pcireg_t id;
+
+	id = pci_conf_read(pc, tag, PCI_ID_REG);
+	pci_decompose_tag(pc, tag, &bus, &device, &function);
+	printf("%03d:%02d:%d 0x%04x 0x%04x ", bus, device, function,
+	    PCI_VENDOR(id), PCI_PRODUCT(id));
+}
+
diff --git a/sys/arch/sgi/pci/pci_machdep.h b/sys/arch/sgi/pci/pci_machdep.h
new file mode 100644
index 00000000000..319c156139a
--- /dev/null
+++ b/sys/arch/sgi/pci/pci_machdep.h
@@ -0,0 +1,93 @@
+/*	$OpenBSD: pci_machdep.h,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+typedef struct mips_pci_chipset *pci_chipset_tag_t;
+typedef u_long pcitag_t;
+typedef u_long pci_intr_handle_t;
+
+struct pci_attach_args;
+
+/*
+ * mips-specific PCI structure and type definitions.
+ * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
+ */
+struct mips_pci_chipset {
+    void	*pc_conf_v;
+    void	(*pc_attach_hook)(struct device *,
+		    struct device *, struct pcibus_attach_args *);
+    int		(*pc_bus_maxdevs)(void *, int);
+    pcitag_t	(*pc_make_tag)(void *, int, int, int);
+    void	(*pc_decompose_tag)(void *, pcitag_t, int *,
+		    int *, int *);
+    pcireg_t	(*pc_conf_read)(void *, pcitag_t, int);
+    void	(*pc_conf_write)(void *, pcitag_t, int, pcireg_t);
+
+    void	*pc_intr_v;
+    int		(*pc_intr_map)(struct pci_attach_args *, pci_intr_handle_t *);
+    const char	*(*pc_intr_string)(void *, pci_intr_handle_t);
+    void	*(*pc_intr_establish)(void *, pci_intr_handle_t,
+		    int, int (*)(void *), void *, char *);
+    void	(*pc_intr_disestablish)(void *, void *);
+    int		(*pc_ether_hw_addr)(u_int8_t *, u_int8_t, u_int8_t);
+    int		(*pc_scsi_clock)(u_int8_t, u_int8_t);
+    void	(*pc_sync_cache)(vaddr_t, int, int);
+};
+
+#define	NEED_PCI_SYNC_CACHE_FUNC
+
+#define	SYNC_R	0	/* Sync caches for reading data */
+#define	SYNC_W	1	/* Sync caches for writing data */
+
+/*
+ * Functions provided to machine-independent PCI code.
+ */
+#define	pci_attach_hook(p, s, pba)					\
+    (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba))
+#define	pci_bus_maxdevs(c, b)						\
+    (*(c)->pc_bus_maxdevs)((c)->pc_conf_v, (b))
+#define	pci_make_tag(c, b, d, f)					\
+    (*(c)->pc_make_tag)((c)->pc_conf_v, (b), (d), (f))
+#define	pci_decompose_tag(c, t, bp, dp, fp)				\
+    (*(c)->pc_decompose_tag)((c)->pc_conf_v, (t), (bp), (dp), (fp))
+#define	pci_conf_read(c, t, r)						\
+    (*(c)->pc_conf_read)((c)->pc_conf_v, (t), (r))
+#define	pci_conf_write(c, t, r, v)					\
+    (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v))
+#define	pci_intr_map(c, ihp)				\
+    (*(c)->pa_pc->pc_intr_map)((c), (ihp))
+#define	pci_intr_string(c, ih)						\
+    (*(c)->pc_intr_string)((c)->pc_intr_v, (ih))
+#define	pci_intr_establish(c, ih, l, h, a, nm)				\
+    (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), (h), (a), (nm))
+#define	pci_intr_disestablish(c, iv)					\
+    (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv))
+#define	pci_ether_hw_addr(c, p, t, s)					\
+    (*(c)->pc_ether_hw_addr)((p), (t), (s))
+#define	pci_scsi_clock(c, t, s)						\
+    (*(c)->pc_scsi_clock)((t), (s))
+#define	pci_sync_cache(c, p, s, d)					\
+    (*(c)->pc_sync_cache)((p), (s), (d))
diff --git a/sys/arch/sgi/pci/pciide_machdep.c b/sys/arch/sgi/pci/pciide_machdep.c
new file mode 100644
index 00000000000..93a7bff9615
--- /dev/null
+++ b/sys/arch/sgi/pci/pciide_machdep.c
@@ -0,0 +1,56 @@
+/*	$OpenBSD: pciide_machdep.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pciidereg.h>
+#include <dev/pci/pciidevar.h>
+
+#include <dev/isa/isavar.h>
+
+void *
+pciide_machdep_compat_intr_establish(dev, pa, chan, func, arg)
+	struct device *dev;
+	struct pci_attach_args *pa;
+	int chan;
+	int (*func) __P((void *));
+	void *arg;
+{
+	void *cookie = (void *)4;
+	return (cookie);
+}
+
+void
+pciide_machdep_compat_intr_disestablish(pc, p)
+	pci_chipset_tag_t pc;
+	void *p;
+{
+}
diff --git a/sys/arch/sgi/sgi/autoconf.c b/sys/arch/sgi/sgi/autoconf.c
new file mode 100644
index 00000000000..cadf9f1318b
--- /dev/null
+++ b/sys/arch/sgi/sgi/autoconf.c
@@ -0,0 +1,518 @@
+/*	$OpenBSD: autoconf.c,v 1.1 2004/08/06 21:12:19 pefo Exp $	*/
+/*
+ * Copyright (c) 1996 Per Fogelstrom
+ * Copyright (c) 1995 Theo de Raadt
+ * Copyright (c) 1988 University of Utah.
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department and Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * from: Utah Hdr: autoconf.c 1.31 91/01/21
+ *
+ *	from: @(#)autoconf.c	8.1 (Berkeley) 6/10/93
+ *      $Id: autoconf.c,v 1.1 2004/08/06 21:12:19 pefo Exp $
+ */
+
+/*
+ * Setup the system to run on the current machine.
+ *
+ * Configure() is called at boot time.  Available
+ * devices are determined (from possibilities mentioned in ioconf.c),
+ * and the drivers are initialized.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/buf.h>
+#include <sys/disklabel.h>
+#include <sys/conf.h>
+#include <sys/reboot.h>
+#include <sys/device.h>
+
+#include <machine/autoconf.h>
+#include <mips64/archtype.h>
+
+struct  device *parsedisk(char *, int, int, dev_t *);
+void	disk_configure(void);
+void    rootconf(void);
+void	configure(void);
+void	swapconf(void);
+extern void dumpconf(void);
+static int findblkmajor(struct device *);
+static struct device * getdisk(char *, int, int, dev_t *);
+struct device * getdevunit(char *, int);
+static struct devmap * findtype(char **);
+void makebootdev(char *cp);
+int getpno(char **);
+
+/*
+ * The following several variables are related to
+ * the configuration process, and are used in initializing
+ * the machine.
+ */
+int	cold = 1;			/* if 1, still working on cold-start */
+char	bootdev[16] = "unknown";	/* to hold boot dev name */
+struct device *bootdv = NULL;
+
+/*
+ *  Configure all devices found that we know about.
+ *  This is done at boot time.
+ */
+void
+cpu_configure()
+{
+	(void)splhigh();	/* Set mask to what we intend. */
+	if (config_rootfound("mainbus", "mainbus") == 0) {
+		panic("no mainbus found");
+	}
+
+	splinit();		/* Initialized, fire up interrupt system */
+
+	md_diskconf = disk_configure;
+	cold = 0;
+}
+
+void
+disk_configure()
+{
+	rootconf();
+	swapconf();
+	dumpconf();
+}
+
+/*
+ * Configure swap space and related parameters.
+ */
+void
+swapconf()
+{
+	struct swdevt *swp;
+	int nblks;
+
+	for (swp = swdevt; swp->sw_dev != NODEV; swp++) {
+		if (bdevsw[major(swp->sw_dev)].d_psize) {
+			nblks = (*bdevsw[major(swp->sw_dev)].d_psize)(swp->sw_dev);
+			if (nblks != -1 && (swp->sw_nblks == 0 || swp->sw_nblks > nblks)) {
+				swp->sw_nblks = nblks;
+			}
+			swp->sw_nblks = ctod(dtoc(swp->sw_nblks));
+		}
+	}
+}
+
+/*                                                                        
+ * the rest of this file was influenced/copied from Theo de Raadt's
+ * code in the sparc port to nuke the "options GENERIC" stuff.
+ */
+
+static	struct nam2blk {
+	char *name;
+	int  maj;
+} nam2blk[] = {
+	{ "sd",	0 },	/* 0 = sd */
+	{ "wd",	4 },	/* 4 = wd */
+};
+
+static int
+findblkmajor(dv)
+	struct device *dv;
+{
+	char *name = dv->dv_xname;
+	int i;
+
+	for (i = 0; i < sizeof(nam2blk)/sizeof(nam2blk[0]); ++i)
+		if (strncmp(name, nam2blk[i].name, strlen(nam2blk[0].name)) == 0)
+			return (nam2blk[i].maj);
+	 return (-1);
+}
+
+static struct device *
+getdisk(str, len, defpart, devp)
+	char *str;
+	int len, defpart;
+	dev_t *devp;
+{
+	struct device *dv;
+
+	if ((dv = parsedisk(str, len, defpart, devp)) == NULL) {
+		printf("use one of:");
+		for (dv = alldevs.tqh_first; dv != NULL;
+		    dv = dv->dv_list.tqe_next) {
+			if (dv->dv_class == DV_DISK)
+				printf(" %s[a-h]", dv->dv_xname);
+#ifdef NFSCLIENT
+			if (dv->dv_class == DV_IFNET)
+				printf(" %s", dv->dv_xname); 
+#endif
+		}
+		printf("\n");
+	}
+	return (dv);
+}
+
+struct device *
+parsedisk(str, len, defpart, devp)
+	char *str;
+	int len, defpart;
+	dev_t *devp;
+{
+	struct device *dv;
+	char *cp, c;
+	int majdev, part;
+
+	if (len == 0)
+		return (NULL);
+	cp = str + len - 1;
+	c = *cp;
+	if (c >= 'a' && (c - 'a') < MAXPARTITIONS) {
+		part = c - 'a';
+		*cp = '\0';
+	} else
+		part = defpart;
+
+	for (dv = alldevs.tqh_first; dv != NULL; dv = dv->dv_list.tqe_next) {
+		if (dv->dv_class == DV_DISK &&
+		    strcmp(str, dv->dv_xname) == 0) {
+			majdev = findblkmajor(dv);
+			if (majdev < 0)
+				panic("parsedisk");
+			*devp = MAKEDISKDEV(majdev, dv->dv_unit, part);
+			break;
+		}
+#ifdef NFSCLIENT
+		if (dv->dv_class == DV_IFNET &&
+		    strcmp(str, dv->dv_xname) == 0) {
+			*devp = NODEV;
+			break;
+		}
+#endif
+	}
+
+	*cp = c;
+	return (dv);
+}
+
+/*
+ * Attempt to find the device from which we were booted.
+ * If we can do so, and not instructed not to do so,
+ * change rootdev to correspond to the load device.
+ */
+void
+rootconf()
+{
+	int  majdev, mindev, unit, part, len;
+	dev_t temp;
+	struct swdevt *swp;
+	struct device *dv;
+	dev_t nrootdev, nswapdev = NODEV;
+	char buf[128];
+
+#if defined(NFSCLIENT)
+	extern char *nfsbootdevname;
+#endif
+
+	if(boothowto & RB_DFLTROOT)
+		return;		/* Boot compiled in */
+
+	/* Lookup boot device from boot if not set by configuration */
+	if(bootdv == NULL) {
+		bootdv = parsedisk(bootdev, strlen(bootdev), 0, &temp);
+	}
+	if(bootdv == NULL) {
+		printf("boot device: lookup '%s' failed.\n", bootdev);
+		boothowto |= RB_ASKNAME; /* Don't Panic :-) */
+	}
+	else {
+		printf("boot device: %s.\n", bootdv->dv_xname);
+	}
+
+	if (boothowto & RB_ASKNAME) {
+		for (;;) {
+			printf("root device ");
+			if (bootdv != NULL)
+				 printf("(default %s%c)",
+					bootdv->dv_xname,
+					bootdv->dv_class == DV_DISK
+						? 'a' : ' ');
+			printf(": ");
+			len = getsn(buf, sizeof(buf));
+#ifdef DDB
+			if(len && strcmp(buf, "ddb") == 0) {
+				Debugger();
+				continue;
+			}
+#endif
+			if (len == 0 && bootdv != NULL) {
+				strlcpy(buf, bootdv->dv_xname, sizeof(buf));
+				len = strlen(buf);
+			}
+			if (len > 0 && buf[len - 1] == '*') {
+				buf[--len] = '\0';
+				dv = getdisk(buf, len, 1, &nrootdev);
+				if (dv != NULL) {
+					bootdv = dv;
+					nswapdev = nrootdev;
+					goto gotswap;
+				}
+			}
+			dv = getdisk(buf, len, 0, &nrootdev);
+			if (dv != NULL) {
+				bootdv = dv;
+				break;
+			}
+		}
+		/*
+		 * because swap must be on same device as root, for
+		 * network devices this is easy.
+		 */
+		if (bootdv->dv_class == DV_IFNET) {
+			goto gotswap;
+		}
+		for (;;) {
+			printf("swap device ");
+			if (bootdv != NULL)
+				printf("(default %s%c)",
+					bootdv->dv_xname,
+					bootdv->dv_class == DV_DISK?'b':' ');
+			printf(": ");
+			len = getsn(buf, sizeof(buf));
+			if (len == 0 && bootdv != NULL) {
+				switch (bootdv->dv_class) {
+				case DV_IFNET:
+					nswapdev = NODEV;
+					break;
+				case DV_DISK:
+					nswapdev = MAKEDISKDEV(major(nrootdev),
+					    DISKUNIT(nrootdev), 1);
+					break;
+				case DV_TAPE:
+				case DV_TTY:
+				case DV_DULL:
+				case DV_CPU:
+					break;
+				}
+				break;
+			}
+			dv = getdisk(buf, len, 1, &nswapdev);
+			if (dv) {
+				if (dv->dv_class == DV_IFNET)
+					nswapdev = NODEV;
+				break;
+			}
+		}
+
+gotswap:
+		rootdev = nrootdev;
+		dumpdev = nswapdev;
+		swdevt[0].sw_dev = nswapdev;
+		swdevt[1].sw_dev = NODEV;
+	}
+	else if(mountroot == NULL) {
+		/*
+		 * `swap generic': Use the device the ROM told us to use.
+		 */
+		if (bootdv == NULL)
+			panic("boot device not known");
+
+		majdev = findblkmajor(bootdv);
+
+		if (majdev >= 0) {
+			/*
+			 * Root and Swap are on disk.
+			 * Boot is always from partition 0.
+			 */
+			rootdev = MAKEDISKDEV(majdev, bootdv->dv_unit, 0);
+			nswapdev = MAKEDISKDEV(majdev, bootdv->dv_unit, 1);
+			dumpdev = nswapdev;
+		}
+		else {
+			/*
+			 *  Root and Swap are on net.
+			 */	
+			nswapdev = dumpdev = NODEV;
+		}
+		swdevt[0].sw_dev = nswapdev;
+		swdevt[1].sw_dev = NODEV;
+
+	} else {
+
+		/*
+		 * `root DEV swap DEV': honour rootdev/swdevt.
+		 * rootdev/swdevt/mountroot already properly set.
+		 */
+		return;
+	}
+
+	switch (bootdv->dv_class) {
+#if defined(NFSCLIENT)
+	case DV_IFNET:
+		mountroot = nfs_mountroot;
+		nfsbootdevname = bootdv->dv_xname;
+		return;
+#endif
+	case DV_DISK:
+		mountroot = dk_mountroot;
+		majdev = major(rootdev);
+		mindev = minor(rootdev);
+		unit = DISKUNIT(rootdev);
+		part = DISKPART(rootdev);
+		printf("root on %s%c\n", bootdv->dv_xname, part + 'a');
+		break;
+	default:
+		printf("can't figure root, hope your kernel is right\n");
+		return;
+	}
+
+	/*
+	 * XXX: What is this doing?
+	 */
+	temp = NODEV;
+	for (swp = swdevt; swp->sw_dev != NODEV; swp++) {
+		if (majdev == major(swp->sw_dev) &&
+		    unit == DISKUNIT(swp->sw_dev)) {
+			temp = swdevt[0].sw_dev;
+			swdevt[0].sw_dev = swp->sw_dev;
+			swp->sw_dev = temp;
+			break;
+		}
+	}
+	if (swp->sw_dev == NODEV)
+		return;
+
+	/*
+	 * If dumpdev was the same as the old primary swap device, move
+	 * it to the new primary swap device.
+	 */
+	if (temp == dumpdev)
+		dumpdev = swdevt[0].sw_dev;
+}
+
+/*
+ * find a device matching "name" and unit number
+ */
+struct device *
+getdevunit(name, unit)
+	char *name;
+	int unit;
+{
+	struct device *dev = alldevs.tqh_first;
+	char num[10], fullname[16];
+	int lunit;
+
+	/* compute length of name and decimal expansion of unit number */
+	snprintf(num, sizeof(num), "%d", unit);
+	lunit = strlen(num);
+	if (strlen(name) + lunit >= sizeof(fullname) - 1)
+		panic("config_attach: device name too long");
+
+	strlcpy(fullname, name, sizeof(fullname));
+	strlcat(fullname, num, sizeof(fullname));
+
+	while (strcmp(dev->dv_xname, fullname) != 0) {
+		if ((dev = dev->dv_list.tqe_next) == NULL)
+			return NULL;
+	}
+	return dev;
+}
+
+struct devmap {
+	char *att;
+	char *dev;
+};
+
+static struct devmap *
+findtype(s)
+	char **s;
+{
+	static struct devmap devmap[] = {
+		{ "/dev/sd",	"sd" },
+		{ "/dev/wd",	"wd" },
+		{ "sd",		"sd" },
+		{ "wd",		"wd" },
+		{ NULL, NULL }
+	};
+	struct devmap *dp = &devmap[0];
+
+	while (dp->att) {
+		if (strncmp (*s, dp->att, strlen(dp->att)) == 0) {
+			*s += strlen(dp->att);
+			break;
+		}
+		dp++;
+	}
+	return(dp);
+}
+
+/*
+ * Look at the string 'bp' and decode the boot device.
+ * Boot names look like: '/dev/sd0/bsd'
+ *                       '/dev/wd0/bsd
+ */
+void
+makebootdev(bp)
+	char *bp;
+{
+	int	unit;
+	char   *dev, *cp;
+	struct devmap *dp;
+
+	cp = bp;
+	while(*cp && *cp != '/') {
+		cp++;
+	}
+	dp = findtype(&cp);
+	if (!dp->att) {
+		printf("Warning: boot device unrecognized: %s\n", bp);
+		return;
+	}
+
+	dev = dp->dev;
+	unit = getpno(&cp);
+	snprintf(bootdev, sizeof(bootdev), "%s%d%c", dev, unit, 'a');
+}
+
+int
+getpno(cp)
+	char **cp;
+{
+	int val = 0;
+	char *cx = *cp;
+
+	while(*cx && *cx >= '0' && *cx <= '9') {
+		val = val * 10 + *cx - '0';
+		cx++;
+	}
+	*cp = cx;
+	return val;
+}
diff --git a/sys/arch/sgi/sgi/clock_md.c b/sys/arch/sgi/sgi/clock_md.c
new file mode 100644
index 00000000000..03a4c50e8be
--- /dev/null
+++ b/sys/arch/sgi/sgi/clock_md.c
@@ -0,0 +1,210 @@
+/*	$OpenBSD: clock_md.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <machine/autoconf.h>
+#include <machine/bus.h>
+
+#include <dev/ic/mc146818reg.h>
+#include <machine/m48t37.h>
+
+#include <pmonmips/localbus/localbus.h>
+
+#include <mips64/archtype.h>
+
+#include <mips64/dev/clockvar.h>
+
+extern void clock_int5_init(struct clock_softc *);
+extern int clock_started;
+
+#define FROMBCD(x)      (((x) >> 4) * 10 + ((x) & 0xf))
+#define TOBCD(x)        (((x) / 10 * 16) + ((x) % 10))
+
+void	md_clk_attach(struct device *parent, struct device *self, void *aux);
+
+void	m48clock_get(struct clock_softc *, time_t, struct tod_time *);
+void	m48clock_set(struct clock_softc *, struct tod_time *);
+
+void	dsclock_get(struct clock_softc *, time_t, struct tod_time *);
+void	dsclock_set(struct clock_softc *, struct tod_time *);
+
+void
+md_clk_attach(parent, self, aux)
+	struct device *parent;
+	struct device *self;
+	void *aux;
+{
+	struct clock_softc *sc = (struct clock_softc *)self;
+	struct confargs *ca;
+
+	ca = aux;
+
+        switch (sys_config.system_type) {
+	case SGI_O2:
+		sc->sc_clock.clk_get = m48clock_get;
+		sc->sc_clock.clk_set = m48clock_set;
+		sc->sc_clock.clk_init = clock_int5_init;
+		sc->sc_clock.clk_hz = 100;
+		sc->sc_clock.clk_profhz = 100;
+		sc->sc_clock.clk_stathz = 100;
+#if 0
+		if (bus_space_map(sc->sc_clk_t, 0xfc807ff0, 16, 0,
+		    &sc->sc_clk_h))
+			printf("UH!? Can't map clock device!\n");
+		printf(" M48x compatible using counter as ticker");
+#endif
+		break;
+
+	default:
+		printf("don't know how to set up clock.");
+	}
+}
+
+/*
+ *  M48TXX clock driver.
+ */
+void
+m48clock_get(sc, base, ct)
+	struct clock_softc *sc;
+	time_t base;
+	struct tod_time *ct;
+{
+	bus_space_tag_t clk_t = sc->sc_clk_t;
+	bus_space_handle_t clk_h = sc->sc_clk_h;
+        int century, tmp;
+
+return;
+	tmp = bus_space_read_1(clk_t, clk_h, TOD_CTRL) | TOD_CTRL_R;
+	bus_space_write_1(clk_t, clk_h, TOD_CTRL, tmp);
+
+	ct->sec = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_SECOND));
+	ct->min = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_MINUTE));
+	ct->hour = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_HOUR));
+	ct->dow = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_DAY));
+	ct->day = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_DATE));
+	ct->mon = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_MONTH)) - 1;
+	ct->year = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_YEAR));
+	century = FROMBCD(bus_space_read_1(clk_t, clk_h, TOD_CENTURY));
+	tmp = bus_space_read_1(clk_t, clk_h, TOD_CTRL) & ~TOD_CTRL_R;
+	bus_space_write_1(clk_t, clk_h, TOD_CTRL, tmp);
+
+        /* Since tm_year is defined to be years since 1900 we compute */
+        /* the correct value here                                     */
+        ct->year = century*100 + ct->year - 1900;
+}
+
+void
+m48clock_set(sc, ct)
+	struct clock_softc *sc;
+	struct tod_time *ct;
+{
+	bus_space_tag_t clk_t = sc->sc_clk_t;
+	bus_space_handle_t clk_h = sc->sc_clk_h;
+        int tmp;
+	int year, century;
+
+return;
+	century = (ct->year + 1900) / 100;
+	year = ct->year % 100;
+
+	tmp = bus_space_read_1(clk_t, clk_h, TOD_CTRL) | TOD_CTRL_W;
+	bus_space_write_1(clk_t, clk_h, TOD_CTRL, tmp);
+
+	bus_space_write_1(clk_t, clk_h, TOD_SECOND, TOBCD(ct->sec));
+	bus_space_write_1(clk_t, clk_h, TOD_MINUTE, TOBCD(ct->min));
+	bus_space_write_1(clk_t, clk_h, TOD_HOUR, TOBCD(ct->hour));
+	bus_space_write_1(clk_t, clk_h, TOD_DAY, TOBCD(ct->dow));
+	bus_space_write_1(clk_t, clk_h, TOD_DATE, TOBCD(ct->day));
+	bus_space_write_1(clk_t, clk_h, TOD_MONTH, TOBCD(ct->mon + 1));
+	bus_space_write_1(clk_t, clk_h, TOD_YEAR, TOBCD(year));
+	bus_space_write_1(clk_t, clk_h, TOD_CENTURY, TOBCD(century));
+
+	tmp = bus_space_read_1(clk_t, clk_h, TOD_CTRL) & ~TOD_CTRL_W;
+	bus_space_write_1(clk_t, clk_h, TOD_CTRL, tmp);
+}
+
+
+/*
+ *  Dallas clock driver.
+ */
+void
+dsclock_get(sc, base, ct)
+	struct clock_softc *sc;
+	time_t base;
+	struct tod_time *ct;
+{
+	bus_space_tag_t clk_t = sc->sc_clk_t;
+	bus_space_handle_t clk_h = sc->sc_clk_h;
+        int century, tmp;
+
+	tmp = bus_space_read_1(clk_t, clk_h, 15);
+	bus_space_write_1(clk_t, clk_h, 15, tmp | 0x80);
+
+	ct->sec = FROMBCD(bus_space_read_1(clk_t, clk_h, 0));
+	ct->min = FROMBCD(bus_space_read_1(clk_t, clk_h, 1));
+	ct->hour = FROMBCD(bus_space_read_1(clk_t, clk_h, 2));
+	ct->day = FROMBCD(bus_space_read_1(clk_t, clk_h, 4));
+	ct->mon = FROMBCD(bus_space_read_1(clk_t, clk_h, 5)) - 1;
+	ct->year = FROMBCD(bus_space_read_1(clk_t, clk_h, 6));
+	bus_space_write_1(clk_t, clk_h, 15, tmp);
+
+        /* Since tm_year is defined to be years since 1900 we compute */
+        /* the correct value here                                     */
+        ct->year = century*100 + ct->year - 1900;
+}
+
+void
+dsclock_set(sc, ct)
+	struct clock_softc *sc;
+	struct tod_time *ct;
+{
+	bus_space_tag_t clk_t = sc->sc_clk_t;
+	bus_space_handle_t clk_h = sc->sc_clk_h;
+        int tmp;
+	int year, century;
+
+	century = (ct->year + 1900) / 100;
+	year = ct->year % 100;
+
+	tmp = bus_space_read_1(clk_t, clk_h, 15);
+	bus_space_write_1(clk_t, clk_h, 15, tmp | 0x80);
+
+	bus_space_write_1(clk_t, clk_h, 0, TOBCD(ct->sec));
+	bus_space_write_1(clk_t, clk_h, 1, TOBCD(ct->min));
+	bus_space_write_1(clk_t, clk_h, 2, TOBCD(ct->hour));
+	bus_space_write_1(clk_t, clk_h, 3, TOBCD(ct->dow));
+	bus_space_write_1(clk_t, clk_h, 4, TOBCD(ct->day));
+	bus_space_write_1(clk_t, clk_h, 5, TOBCD(ct->mon + 1));
+	bus_space_write_1(clk_t, clk_h, 6, TOBCD(year));
+
+	bus_space_write_1(clk_t, clk_h, 15, tmp);
+}
diff --git a/sys/arch/sgi/sgi/conf.c b/sys/arch/sgi/sgi/conf.c
new file mode 100644
index 00000000000..3e80a9b71a3
--- /dev/null
+++ b/sys/arch/sgi/sgi/conf.c
@@ -0,0 +1,316 @@
+/*	$OpenBSD: conf.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	from: @(#)conf.c	8.2 (Berkeley) 11/14/93
+ *      $Id: conf.c,v 1.1 2004/08/06 21:12:19 pefo Exp $
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/buf.h>
+#include <sys/ioctl.h>
+#include <sys/proc.h>
+#include <sys/vnode.h>
+#include <sys/tty.h>
+#include <sys/conf.h>
+
+int	ttselect	__P((dev_t, int, struct proc *));
+
+/*
+ *	Block devices.
+ */
+
+#include "vnd.h"
+bdev_decl(vnd);
+bdev_decl(sw);
+#include "sd.h"
+bdev_decl(sd);
+#include "cd.h"
+bdev_decl(cd);
+#include "wd.h"
+bdev_decl(wd);
+#include "ccd.h"
+#include "rd.h"
+bdev_decl(rd);
+
+struct bdevsw	bdevsw[] =
+{
+	bdev_disk_init(NSD,sd),		/* 0: SCSI disk */
+	bdev_swap_init(1,sw),		/* 1: should be here swap pseudo-dev */
+	bdev_disk_init(NVND,vnd),	/* 2: vnode disk driver */
+	bdev_disk_init(NCD,cd),		/* 3: SCSI CD-ROM */
+	bdev_disk_init(NWD,wd),		/* 4: ST506/ESDI/IDE disk */
+	bdev_notdef(),			/* 5:  */
+	bdev_disk_init(NCCD,ccd),	/* 6: concatenated disk driver */
+	bdev_notdef(),			/* 7:  */
+	bdev_disk_init(NRD,rd),		/* 8: RAM disk (for install) */
+	bdev_notdef(),			/* 9:  */
+	bdev_notdef(),			/* 10:  */
+	bdev_notdef(),			/* 11:  */
+	bdev_notdef(),			/* 12:  */
+	bdev_notdef(),			/* 13:  */
+	bdev_notdef(),			/* 14:  */
+	bdev_notdef(),			/* 15:  */
+};
+
+int	nblkdev = sizeof (bdevsw) / sizeof (bdevsw[0]);
+
+/*
+ *	Character devices.
+ */
+
+/* open, close, write, ioctl */
+#define	cdev_lpt_init(c,n) { \
+	dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) enodev, \
+	dev_init(c,n,write), dev_init(c,n,ioctl), (dev_type_stop((*))) enodev, \
+	0, seltrue, (dev_type_mmap((*))) enodev }
+
+/* open, close, write, ioctl */
+#define	cdev_spkr_init(c,n) { \
+	dev_init(c,n,open), dev_init(c,n,close), (dev_type_read((*))) enodev, \
+	dev_init(c,n,write), dev_init(c,n,ioctl), (dev_type_stop((*))) enodev, \
+	0, seltrue, (dev_type_mmap((*))) enodev }
+
+cdev_decl(cn);
+cdev_decl(sw);
+cdev_decl(ctty);
+cdev_decl(random);
+#define mmread mmrw
+#define mmwrite mmrw
+dev_type_read(mmrw);
+cdev_decl(mm);
+#include "pty.h"
+#define	ptstty		ptytty
+#define	ptsioctl	ptyioctl
+cdev_decl(pts);
+#define	ptctty		ptytty
+#define	ptcioctl	ptyioctl
+cdev_decl(ptc);
+cdev_decl(log);
+cdev_decl(fd);
+#include "st.h"
+cdev_decl(st);
+cdev_decl(vnd);
+cdev_decl(rd);
+#include "bpfilter.h"
+cdev_decl(bpf);
+#include "com.h"
+cdev_decl(com);
+#include "lpt.h"
+cdev_decl(lpt);
+cdev_decl(sd);
+cdev_decl(cd);
+#include "ch.h"
+#include "ss.h"
+#include "uk.h"
+cdev_decl(uk);
+cdev_decl(wd);
+cdev_decl(acd);
+#ifdef XFS
+#include <xfs/nxfs.h>
+cdev_decl(xfs_dev);
+#endif
+#include "ksyms.h"
+cdev_decl(ksyms);
+
+#include "wsdisplay.h"
+#include "wskbd.h"
+#include "wsmouse.h"
+#include "wsmux.h"
+#include "pci.h"
+cdev_decl(pci);
+
+#include <pf.h>
+
+struct cdevsw	cdevsw[] =
+{
+	cdev_cn_init(1,cn),		/* 0: virtual console */
+	cdev_swap_init(1,sw),		/* 1: /dev/drum (swap pseudo-device) */
+	cdev_ctty_init(1,ctty),		/* 2: controlling terminal */
+	cdev_mm_init(1,mm),		/* 3: /dev/{null,mem,kmem,...} */
+	cdev_tty_init(NPTY,pts),	/* 4: pseudo-tty slave */
+	cdev_ptc_init(NPTY,ptc),	/* 5: pseudo-tty master */
+	cdev_log_init(1,log),		/* 6: /dev/klog */
+	cdev_fd_init(1,filedesc),	/* 7: file descriptor pseudo-dev */
+	cdev_disk_init(NCD,cd),		/* 8: SCSI CD */
+	cdev_disk_init(NSD,sd),		/* 9: SCSI disk */
+	cdev_tape_init(NST,st),		/* 10: SCSI tape */
+	cdev_disk_init(NVND,vnd),	/* 11: vnode disk */
+	cdev_bpftun_init(NBPFILTER,bpf),/* 12: berkeley packet filter */
+	cdev_notdef(),			/* 13: */
+	cdev_notdef(),			/* 14: */
+	cdev_notdef(),			/* 15: */
+	cdev_lpt_init(NLPT,lpt),	/* 16: Parallel printer interface */
+	cdev_tty_init(NCOM,com),	/* 17: 16C450 serial interface */
+	cdev_disk_init(NWD,wd),		/* 18: ST506/ESDI/IDE disk */
+	cdev_notdef(),			/* 19: */
+	cdev_tty_init(NPTY,pts),	/* 20: pseudo-tty slave */
+	cdev_ptc_init(NPTY,ptc),	/* 21: pseudo-tty master */
+	cdev_disk_init(NRD,rd),		/* 22: ramdisk device */
+	cdev_disk_init(NCCD,ccd),       /* 23: concatenated disk driver */
+	cdev_notdef(),			/* 24: */
+cdev_wsdisplay_init(NWSDISPLAY, wsdisplay),	/* 25: */
+	cdev_mouse_init(NWSKBD, wskbd),	/* 26: */
+	cdev_mouse_init(NWSMOUSE, wsmouse),	/* 27: */
+	cdev_mouse_init(NWSMUX, wsmux),	/* 28: */
+#ifdef USER_PCICONF
+        cdev_pci_init(NPCI,pci),        /* 29: PCI user */
+#else
+        cdev_notdef(),			/* 29 */
+#endif
+	cdev_notdef(),			/* 30: */
+	cdev_pf_init(NPF,pf),		/* 31: packet filter */
+	cdev_uk_init(NUK,uk),		/* 32: unknown SCSI */
+	cdev_random_init(1,random),	/* 33: random data source */
+	cdev_ss_init(NSS,ss),		/* 34: SCSI scanner */
+	cdev_ksyms_init(NKSYMS,ksyms),	/* 35: Kernel symbols device */
+	cdev_ch_init(NCH,ch),		/* 36: SCSI autochanger */
+	cdev_notdef(),			/* 37: */
+	cdev_notdef(),			/* 38: */
+	cdev_notdef(),			/* 39: */
+	cdev_notdef(),			/* 40: */
+	cdev_notdef(),			/* 41: */
+	cdev_notdef(),			/* 42: */
+	cdev_notdef(),			/* 33: */
+	cdev_notdef(),			/* 44: */
+	cdev_notdef(),			/* 45: */
+	cdev_notdef(),			/* 46: */
+	cdev_notdef(),			/* 47: */
+	cdev_notdef(),			/* 48: */
+	cdev_notdef(),			/* 49: */
+	cdev_notdef(),			/* 50: */
+#ifdef XFS
+	cdev_xfs_init(NXFS,xfs_dev),	/* 51: xfs communication device */
+#else
+	cdev_notdef(),			/* 51: */
+#endif
+};
+
+int	nchrdev = sizeof (cdevsw) / sizeof (cdevsw[0]);
+
+/*
+ * Swapdev is a fake device implemented
+ * in sw.c used only internally to get to swstrategy.
+ * It cannot be provided to the users, because the
+ * swstrategy routine munches the b_dev and b_blkno entries
+ * before calling the appropriate driver.  This would horribly
+ * confuse, e.g. the hashing routines. Instead, /dev/drum is
+ * provided as a character (raw) device.
+ */
+dev_t	swapdev = makedev(1, 0);
+
+/*
+ * Routine that identifies /dev/mem and /dev/kmem.
+ *
+ * A minimal stub routine can always return 0.
+ */
+int
+iskmemdev(dev)
+	dev_t dev;
+{
+
+	if (major(dev) == 3 && (minor(dev) == 0 || minor(dev) == 1))
+		return (1);
+	return (0);
+}
+
+/*
+ * Returns true if def is /dev/zero
+ */
+int
+iszerodev(dev)
+	dev_t dev;
+{
+	return (major(dev) == 3 && minor(dev) == 12);
+}
+
+dev_t
+getnulldev()
+{
+	return(makedev(3, 2));
+}
+
+
+int chrtoblktbl[] =  {
+      /* VCHR */      /* VBLK */
+	/* 0 */		NODEV,
+	/* 1 */		NODEV,
+	/* 2 */		NODEV,
+	/* 3 */		NODEV,
+	/* 4 */		NODEV,
+	/* 5 */		NODEV,
+	/* 6 */		NODEV,
+	/* 7 */		NODEV,
+	/* 8 */		NODEV,
+	/* 9 */		0,
+	/* 10 */	NODEV,
+	/* 11 */	2,
+	/* 12 */	NODEV,
+	/* 13 */	NODEV,
+	/* 14 */	NODEV,
+	/* 15 */	NODEV,
+	/* 16 */	NODEV,
+	/* 17 */	NODEV,
+	/* 18 */	4,
+	/* 19 */	NODEV,
+	/* 20 */	NODEV,
+	/* 21 */	NODEV,
+	/* 22 */	8,
+};
+
+int nchrtoblktbl = sizeof(chrtoblktbl) / sizeof(int);
+
+/*
+ * This entire table could be autoconfig()ed but that would mean that
+ * the kernel's idea of the console would be out of sync with that of
+ * the standalone boot.  I think it best that they both use the same
+ * known algorithm unless we see a pressing need otherwise.
+ */
+#include <dev/cons.h>
+
+cons_decl(ws);
+cons_decl(com);
+
+struct	consdev constab[] = {
+#if NWSDISPLAY > 0
+	cons_init(ws),
+#endif
+#if NCOM > 0
+	cons_init(com),
+#endif
+	{ 0 },
+};
diff --git a/sys/arch/sgi/sgi/genassym.cf b/sys/arch/sgi/sgi/genassym.cf
new file mode 100644
index 00000000000..cc590c68b3e
--- /dev/null
+++ b/sys/arch/sgi/sgi/genassym.cf
@@ -0,0 +1,54 @@
+#	$OpenBSD: genassym.cf,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+#
+# Copyright (c) 1997 Per Fogelstrom / Opsycon AB
+# 
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in the
+#    documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+
+
+include <sys/param.h>
+include <sys/buf.h>
+include <sys/proc.h>
+include <sys/mbuf.h>
+include <sys/user.h>
+
+export	SONPROC
+
+define	P_FORW		offsetof(struct proc, p_forw)
+define	P_BACK		offsetof(struct proc, p_back)
+define	P_PRIORITY	offsetof(struct proc, p_priority)
+define	P_STAT		offsetof(struct proc, p_stat)
+define	P_ADDR		offsetof(struct proc, p_addr)
+#define	P_UPTE		offsetof(struct proc, p_md.md_upte)
+define	P_PC_CTRL	offsetof(struct proc, p_md.md_pc_ctrl)
+define	P_PC_COUNT	offsetof(struct proc, p_md.md_pc_count)
+define	P_WATCH_1	offsetof(struct proc, p_md.md_watch_1)
+define	P_WATCH_2	offsetof(struct proc, p_md.md_watch_2)
+define	P_WATCH_M	offsetof(struct proc, p_md.md_watch_m)
+define	U_PCB_REGS	offsetof(struct user, u_pcb.pcb_regs.zero)
+define	U_PCB_FPREGS	offsetof(struct user, u_pcb.pcb_regs.f0)
+define	U_PCB_CONTEXT	offsetof(struct user, u_pcb.pcb_context)
+define	U_PCB_ONFAULT	offsetof(struct user, u_pcb.pcb_onfault)
+define	U_PCB_SEGTAB	offsetof(struct user, u_pcb.pcb_segtab)
+
+define	VM_MIN_KERNEL_ADDRESS VM_MIN_KERNEL_ADDRESS
+define	SIGFPE SIGFPE
diff --git a/sys/arch/sgi/sgi/locore.S b/sys/arch/sgi/sgi/locore.S
new file mode 100644
index 00000000000..913cae7148e
--- /dev/null
+++ b/sys/arch/sgi/sgi/locore.S
@@ -0,0 +1,101 @@
+/*	$OpenBSD: locore.S,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <sys/errno.h>
+#include <sys/syscall.h>
+
+#include <machine/param.h>
+#include <machine/psl.h>
+#include <machine/asm.h>
+#include <machine/cpu.h>
+#include <machine/regnum.h>
+#include <machine/cpustate.h>
+#include <machine/pte.h>
+
+#include "assym.h"
+
+	.set	noreorder		# Noreorder is default style!
+
+#define	ITLBNOPFIX	nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
+
+	.globl	idle_stack	# idle stack just below kernel.
+idle_stack:
+
+	.globl	start
+	.globl	kernel_text
+kernel_text = start
+start:
+	mtc0	zero, COP_0_STATUS_REG	# Disable interrupts
+	mtc0	zero, COP_0_CAUSE_REG	# Clear soft interrupts
+
+/*
+ * Initialize stack and call machine startup.
+ */
+	la	sp, start - FRAMESZ(CF_SZ)
+	la	gp, _gp
+	jal	mips_init			# mips_init(argc, argv, envp)
+	sw	zero, CF_RA_OFFS(sp)		# Zero out old ra for debugger
+
+	move	sp, v0				# switch to new stack
+	li	t0, SR_COP_1_BIT		# Disable interrupts and
+	mtc0	t0, COP_0_STATUS_REG		#   enable the fp coprocessor
+	nop
+	nop					# wait for new status to
+	nop
+	nop
+	nop					# wait for new status to
+	nop					# to be effective
+	nop
+	cfc1	t1, FPC_ID			# read FPU ID register
+	sw	t1, fpu_id			# save FPU ID register
+	jal	main				# main(regs)
+	move	a0, zero
+	PANIC("Startup failed!")
+
+
+/*
+ * Interrupt counters for vmstat.
+ */
+	.data
+	.globl intrcnt
+	.globl eintrcnt
+	.globl intrnames
+	.globl eintrnames
+intrnames:
+	.asciiz	"softclock"
+	.asciiz	"softnet"
+	.asciiz	"local_dma"
+	.asciiz	"local_dev"
+	.asciiz	"isa_dev"
+	.asciiz	"isa_nmi"
+	.asciiz	"clock"
+	.asciiz	"statclock"
+eintrnames:
+	.align	3
+intrcnt:
+	.word	0,0,0,0,0,0,0,0
+eintrcnt:
diff --git a/sys/arch/sgi/sgi/machdep.c b/sys/arch/sgi/sgi/machdep.c
new file mode 100644
index 00000000000..febbfe36895
--- /dev/null
+++ b/sys/arch/sgi/sgi/machdep.c
@@ -0,0 +1,1108 @@
+/*	$OpenBSD: machdep.c,v 1.1 2004/08/06 21:12:19 pefo Exp $ */
+
+/*
+ * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/signalvar.h>
+#include <sys/kernel.h>
+#include <sys/proc.h>
+#include <sys/buf.h>
+#include <sys/reboot.h>
+#include <sys/conf.h>
+#include <sys/file.h>
+#include <sys/malloc.h>
+#include <sys/mbuf.h>
+#include <sys/msgbuf.h>
+#include <sys/ioctl.h>
+#include <sys/tty.h>
+#include <sys/user.h>
+#include <sys/exec.h>
+#include <sys/sysctl.h>
+#include <sys/mount.h>
+#include <sys/syscallargs.h>
+#include <sys/exec_olf.h>
+#ifdef SYSVSHM
+#include <sys/shm.h>
+#endif
+#ifdef SYSVSEM
+#include <sys/sem.h>
+#endif
+#ifdef SYSVMSG
+#include <sys/msg.h>
+#endif
+#ifdef MFS
+#include <ufs/mfs/mfs_extern.h>
+#endif
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/db_machdep.h>
+#include <ddb/db_interface.h>
+
+#include <machine/pte.h>
+#include <machine/cpu.h>
+#include <machine/frame.h>
+#include <machine/pio.h>
+#include <machine/psl.h>
+#include <machine/autoconf.h>
+#include <machine/memconf.h>
+#include <machine/regnum.h>
+
+#include <machine/rm7000.h> 
+
+#include <sys/exec_ecoff.h>
+
+#include <dev/cons.h>
+
+#include <mips64/archtype.h>
+#include <machine/bus.h>
+
+#include <sgi/localbus/macebus.h>
+
+extern struct consdev *cn_tab;
+extern char kernel_text[];
+extern void makebootdev __P((char *));
+extern void stacktrace __P((void));
+
+/* the following is used externally (sysctl_hw) */
+char	machine[] = MACHINE;		/* machine "architecture" */
+char	machine_arch[] = MACHINE_ARCH;	/* cpu "architecture" */
+char	cpu_model[30];
+#ifdef APERTURE
+#if defined(INSECURE) || defined(DEBUG)
+int allowaperture = 1;
+#else
+int allowaperture = 0;
+#endif
+#endif
+
+/*
+ * Declare these as initialized data so we can patch them.
+ */
+#ifndef	NBUF
+#define NBUF 0			/* Can be changed in config */
+#endif
+#ifndef	BUFPAGES
+#define BUFPAGES 0		/* Can be changed in config */
+#endif
+
+int	nswbuf = 0;
+int	nbuf = NBUF;
+int	bufpages = BUFPAGES;
+
+vm_map_t exec_map;
+vm_map_t mb_map;
+vm_map_t phys_map;
+
+#if 0
+register_t tlbtrcptr;
+#endif
+
+int	msgbufmapped;		/* set when safe to use msgbuf */
+int	physmem;		/* max supported memory, changes to actual */
+int	ncpu = 1;		/* At least one cpu in the system */
+struct	user *proc0paddr;
+struct	user *curprocpaddr;
+int	console_ok;		/* set when console initialized */
+
+int32_t *environment;
+char	eth_hw_addr[6];		/* HW ether addr not stored elsewhere */
+struct sys_rec sys_config;
+
+
+/* ddb symbol init stuff */
+caddr_t	ssym;
+caddr_t	esym;
+caddr_t	ekern;
+
+struct mem_descriptor mem_layout[MAXMEMSEGS];
+vaddr_t     avail_end;      /* PA of last available physical page */
+
+caddr_t mips_init __P((int, int32_t *, int32_t *));	
+void initcpu(void);
+void dumpsys(void);
+void dumpconf(void);
+caddr_t allocsys(caddr_t);
+
+static char *getenv(char *env);
+static void dobootopts(char *cp);
+static void get_eth_hw_addr(char *, char *);
+static int atoi(char *, int);
+char gt_ethaddr[6];
+
+#if BYTE_ORDER == BIG_ENDIAN
+int	my_endian = 1;
+#else
+int	my_endian = 0;
+#endif
+
+
+/*
+ * Do all the stuff that locore normally does before calling main().
+ * Reset mapping and set up mapping to hardware and init "wired" reg.
+ */
+
+caddr_t
+mips_init(int argc, int32_t *argv, int32_t *envv)
+{
+	char *cp;
+	char *arg0;
+	int i;
+	unsigned firstaddr;
+	caddr_t sd;
+	struct tlb tlb;
+	extern char edata[], end[];
+	extern char tlb_miss[], e_tlb_miss[];
+	extern char tlb_miss_tramp[], e_tlb_miss_tramp[];
+	extern char xtlb_miss_tramp[], e_xtlb_miss_tramp[];
+	extern char exception[], e_exception[];
+
+	/*
+	 * Clear the compiled BSS segment in OpenBSD code
+	 */
+	bzero(edata, (int)end - (int)edata);
+
+	/*
+	 *  Reserve symol table space. If invalid pointers no table.
+	 */
+	ssym = (char *)(long)*(int *)end;
+	esym = (char *)(long)*((int *)end + 1);
+	ekern = esym;
+	if (((int)ssym - (int)end) < 0 ||
+	    ((int)ssym - (int)end) > 0x1000 ||
+	    ssym[0] != ELFMAG0 || ssym[1] != ELFMAG1 ||
+	    ssym[2] != ELFMAG2 || ssym[3] != ELFMAG3 ) {
+		ssym = NULL;
+		esym = NULL;
+		ekern = end;
+	}
+
+	/*
+	 * Point environment for getenv() lookups.
+	 */
+	environment = envv;
+
+	/*
+	 * Determine system type and set up configuration record data.
+	 */
+	sys_config.system_type = -1;
+	cp = getenv("systype");
+/*XXX*/    cp = "moosehead";
+	if(cp && strncasecmp("moosehead", cp, 9) == 0) {
+		sys_config.system_type = SGI_O2;
+		strlcpy(cpu_model, "SGI O2", sizeof(cpu_model));
+		sys_config.cons_ioaddr[0] = 0x00390000;	/*XXX*/
+		sys_config.cons_ioaddr[1] = 0x00398000;	/*XXX*/
+		sys_config.cons_baudclk = 1843200;		/*XXX*/
+		sys_config.cons_iot = &macebus_tag;
+		sys_config.local.bus_base = 0x0;		/*XXX*/
+#if defined(_LP64)
+		sys_config.pci_io[0].bus_base = 0xffffffff00000000;/*XXX*/
+		sys_config.pci_mem[0].bus_base = 0xffffffff00000000;/*XXX*/
+#else
+		sys_config.pci_io[0].bus_base = 0x00000000;/*XXX*/
+		sys_config.pci_mem[0].bus_base = 0x00000000;/*XXX*/
+#endif
+		sys_config.pci_mem[0].bus_base_dma = 0x00000000;/*XXX*/
+		sys_config.pci_mem[0].bus_reverse = my_endian;
+		sys_config.cpu.tlbwired = 3;
+	}
+
+	/*
+	 * Determine CPU clock frequency for timer and delay setup
+	 */
+	if(getenv("cpuclock") != 0) {
+		sys_config.cpu.clock = atoi(getenv("cpuclock"), 10);
+	}
+	else {
+		sys_config.cpu.clock = 180000000;  /* Reasonable default */
+	}
+
+	/*
+	 *  Initialize virtual memory system.
+         */
+	if(getenv("memsize") != 0) {
+		physmem = atop(atoi(getenv("memsize"), 10) * 1024 *1024);
+	}
+	else {
+		physmem = atop(1024 * 1024 * 64);  /* Reasonable default */
+	}
+#if 0
+#if defined(DDB) || defined(DEBUG)
+	physmem = atop(1024 * 1024 * 256);
+#if defined(_LP64)
+	tlbtrcptr = 0xffffffff90000000;
+	memset((void *)0xffffffff90000000, 0, 1024*1024);
+#else
+	tlbtrcptr = 0x90000000;
+	memset((void *)0x90000000, 0, 1024*1024);
+#endif
+#endif
+#endif
+
+	/* Set pagesize to enable use of page macros and functions */
+	uvmexp.pagesize = 4096;
+	uvm_setpagesize();
+
+	/* Build up memory description and commit to UVM system */
+	mem_layout[0].mem_start = atop(0x20000);	/* Skip int vectors */
+	mem_layout[0].mem_size = atop(KSEG0_TO_PHYS(kernel_text));
+	mem_layout[0].mem_size -= mem_layout[0].mem_start;
+
+	mem_layout[1].mem_start = atop(round_page(KSEG0_TO_PHYS((long)ekern)));
+	mem_layout[1].mem_size = physmem - mem_layout[1].mem_start;
+
+	avail_end = ptoa(physmem);
+
+	for(i = 1; i < MAXMEMSEGS && mem_layout[i].mem_size != 0; i++) {
+		vaddr_t fp, lp;
+
+		fp = mem_layout[i].mem_start;
+		lp = mem_layout[i].mem_start + mem_layout[i].mem_size;
+		uvm_page_physload(fp, lp, fp, lp, VM_FREELIST_DEFAULT); 
+	}
+
+	/*
+	 *  Figure out where we was booted from.
+	 */
+argc = 0;
+	if(argc > 1)
+		arg0 = (char *)(long)argv[1];
+	else
+		arg0 = getenv("bootdev");
+
+	if(arg0 == 0)
+		arg0 = "unknown";
+	makebootdev(arg0);
+
+	/*
+	 * Look at arguments passed to us and compute boothowto.
+	 * Default to SINGLE and ASKNAME if no args or
+	 * SINGLE and DFLTROOT if this is a ramdisk kernel.
+	 */
+#ifdef RAMDISK_HOOKS
+	boothowto = RB_SINGLE | RB_DFLTROOT;
+#else
+	boothowto = RB_SINGLE | RB_ASKNAME;
+#endif /* RAMDISK_HOOKS */
+
+	get_eth_hw_addr(getenv("ethaddr"), eth_hw_addr);
+	dobootopts(getenv("osloadoptions"));
+
+	/*  Check any extra arguments which override.  */
+	for(i = 2; i < argc; i++) {
+		if(*((char *)(long)argv[i]) == '-') {
+			dobootopts((char *)(long)argv[i] + 1);
+		}
+	}
+
+	/* Check l3cache size and disable (hard) if non present. */
+	if(getenv("l3cache") != 0) {
+		i = atoi(getenv("l3cache"), 10);
+		CpuTertiaryCacheSize = 1024 * 1024 * i;
+	} else {
+		CpuTertiaryCacheSize = 0;
+	}
+	if(CpuTertiaryCacheSize == 0) {
+		CpuExternalCacheOn = 0;		/* No L3 detected */
+	} else {
+		CpuExternalCacheOn = 1;
+	}
+
+	cp = getenv("ecache_on");
+	if(cp && (*cp == 0 || *cp == 'n' || *cp == 'N')) {
+		CpuExternalCacheOn = 0;		/* Override config setting */
+	}
+
+	cp = getenv("ocache_on");
+	if(cp && (*cp == 0 || *cp == 'n' || *cp == 'N')) {
+		CpuOnboardCacheOn = 0;		/* Override HW setting */
+	} else {
+		CpuOnboardCacheOn = 1;
+	}
+
+	sys_config.cpu.cfg_reg = Mips_ConfigCache();
+	sys_config.cpu.type = cpu_id.cpu.cp_imp;
+	sys_config.cpu.vers_maj = cpu_id.cpu.cp_majrev;
+	sys_config.cpu.vers_min = cpu_id.cpu.cp_minrev;
+
+	/*
+	 *  Configure TLB.
+	 */
+	switch(sys_config.cpu.type) {
+	case MIPS_RM7000:
+		if(sys_config.cpu.vers_maj < 2) {
+			sys_config.cpu.tlbsize = 48;
+		} else {
+			sys_config.cpu.tlbsize = 64;
+		}
+		break;
+
+	default:
+		sys_config.cpu.tlbsize = 48;
+		break;
+	}
+
+	if(getenv("tlbwired")) {
+		i = atoi(getenv("tlbwired"), 10);
+		if((i < sys_config.cpu.tlbwired) || (i >= sys_config.cpu.tlbsize)) {
+		} else {
+			sys_config.cpu.tlbwired = i;
+		}
+	}
+	tlb_set_wired(0);
+	tlb_flush(sys_config.cpu.tlbsize);
+	tlb_set_wired(sys_config.cpu.tlbwired);
+	
+	/*
+	 *  Set up some fixed mappings. These are so frequently
+	 *  used so faulting them in will waste to many cycles.
+	 */
+	if (sys_config.system_type == MOMENTUM_CP7000G ||
+	    sys_config.system_type == MOMENTUM_CP7000 ||
+	    sys_config.system_type == GALILEO_EV64240) {
+		tlb.tlb_mask = PG_SIZE_16M;
+#if defined(LP64)
+		tlb.tlb_hi = vad_to_vpn(0xfffffffffc000000) | 1;
+		tlb.tlb_lo0 = vad_to_pfn(0xfffffffff4000000) | PG_IOPAGE;
+#else
+		tlb.tlb_hi = vad_to_vpn(0xfc000000) | 1;
+		tlb.tlb_lo0 = vad_to_pfn(0xf4000000) | PG_IOPAGE;
+#endif
+		tlb.tlb_lo1 = vad_to_pfn(sys_config.cons_ioaddr[0]) | PG_IOPAGE;
+		tlb_write_indexed(2, &tlb);
+
+		if (sys_config.system_type == GALILEO_EV64240) {
+			tlb.tlb_mask = PG_SIZE_16M;
+			tlb.tlb_hi = vad_to_vpn(0xf8000000) | 1;
+			tlb.tlb_lo0 = vad_to_pfn(sys_config.pci_io[0].bus_base) | PG_IOPAGE;
+			tlb.tlb_lo1 = vad_to_pfn(sys_config.pci_mem[0].bus_base) | PG_IOPAGE;
+			tlb_write_indexed(3, &tlb);
+		}
+	}
+
+	/*
+	 *  Get a console, very early but after initial mapping setup.
+	 */
+	consinit();
+
+	if (sys_config.system_type < 0) {
+		printf("'systype' = '%s' not known!\n", cp ? cp : "NULL");
+		panic("unidentified system");
+	}
+
+
+	/*
+	 * Allocate U page(s) for proc[0], pm_tlbpid 1.
+	 */
+	proc0.p_addr = proc0paddr = curprocpaddr =
+		(struct user *)pmap_steal_memory(USPACE, NULL,NULL);
+	proc0.p_md.md_regs = (struct trap_frame *)&proc0paddr->u_pcb.pcb_regs;
+	firstaddr = KSEG0_TO_PHYS(proc0.p_addr);
+	tlb_set_pid(1);
+
+	/*
+	 * Allocate system data structures.
+	 */
+	i = (vsize_t)allocsys(NULL);
+        sd = (caddr_t)pmap_steal_memory(i, NULL, NULL);
+        allocsys(sd);
+
+	/*
+	 * Bootstrap VM system.
+	 */
+	pmap_bootstrap();
+
+	/*
+	 * Copy down exception vector code. If code is to large
+	 * copy down trampolines instead of doing a panic.
+	 */
+	if (e_tlb_miss - tlb_miss > 0x100) {
+		bcopy(tlb_miss_tramp, (char *)TLB_MISS_EXC_VEC,
+		    e_tlb_miss_tramp - tlb_miss_tramp);
+		bcopy(xtlb_miss_tramp, (char *)XTLB_MISS_EXC_VEC,
+		    e_xtlb_miss_tramp - xtlb_miss_tramp);
+	} else {
+		bcopy(tlb_miss, (char *)TLB_MISS_EXC_VEC,
+		    e_tlb_miss - tlb_miss);
+	}
+
+	bcopy(exception, (char *)CACHE_ERR_EXC_VEC, e_exception - exception);
+
+	/*
+	 *  Keep PMON2000 exceptions if requested.
+	 */
+	if(!getenv("pmonexept")) {
+		bcopy(exception, (char *)GEN_EXC_VEC, e_exception - exception);
+	}
+
+#ifdef DDB
+	db_machine_init();
+	if (boothowto & RB_KDB)
+		Debugger();
+#endif
+
+	/*
+	 * Clear out the I and D caches.
+	 */
+	Mips_SyncCache();
+
+	/*
+	 * Initialize error message buffer.
+	 */
+	initmsgbuf((caddr_t)0xffffffff80002000, MSGBUFSIZE);
+
+	/*
+	 *  Return new stack pointer.
+	 */
+	return ((caddr_t)proc0paddr + USPACE - 64);
+}
+
+/*
+ * Allocate space for system data structures. Doesn't need to be mapped.
+ */
+caddr_t
+allocsys(caddr_t v)
+{
+	caddr_t start;
+
+	start = v;
+
+#define	valloc(name, type, num) \
+	    (name) = (type *)v; v = (caddr_t)((name)+(num))
+#ifdef SYSVMSG
+	valloc(msgpool, char, msginfo.msgmax);
+	valloc(msgmaps, struct msgmap, msginfo.msgseg);
+	valloc(msghdrs, struct msg, msginfo.msgtql);
+	valloc(msqids, struct msqid_ds, msginfo.msgmni);
+#endif
+
+#ifndef BUFCACHEPERCENT
+#define BUFCACHEPERCENT 5
+#endif
+
+	/*
+	 * Determine how many buffers to allocate.
+	 */
+	if (bufpages == 0) {
+		bufpages = (physmem / (100/BUFCACHEPERCENT));
+	}
+	if (nbuf == 0) {
+		nbuf = bufpages;
+		if (nbuf < 16)
+			nbuf = 16;
+	}
+	/* Restrict to at most 70% filled kvm */
+	if (nbuf > (VM_MAX_KERNEL_ADDRESS-VM_MIN_KERNEL_ADDRESS) / MAXBSIZE * 7 / 10) {
+		nbuf = (VM_MAX_KERNEL_ADDRESS-VM_MIN_KERNEL_ADDRESS) / MAXBSIZE * 7 / 10;
+	}
+
+	/* More buffer pages than fits into the buffers is senseless.  */
+	if (bufpages > nbuf * MAXBSIZE / PAGE_SIZE) {
+		bufpages = nbuf * MAXBSIZE / PAGE_SIZE;
+	}
+
+	if (nswbuf == 0) { 
+		nswbuf = (nbuf / 2) &~ 1;	/* even */
+		if (nswbuf > 256) {
+			nswbuf = 256;
+		}
+	}
+
+	valloc(buf, struct buf, nbuf);
+
+	/*
+	 * Clear allocated memory.
+	 */
+	if(start != 0) {
+		bzero(start, v - start);
+	}
+
+	return(v);
+}
+
+
+/*
+ * Return a pointer to the given environment variable.
+ */
+static char *
+getenv(envname)
+	char *envname;
+{
+	int32_t *env = environment;
+	char *envp;
+	int i;
+
+return(NULL);
+	i = strlen(envname);
+
+	while(*env) {
+		envp = (char *)(long)*env;
+		if(strncasecmp(envname, envp, i) == 0 && envp[i] == '=') {
+			return(&envp[i+1]);
+		}
+		env++;
+	}
+	return(NULL);
+}
+
+/*
+ *  Decode boot options.
+ */
+static void
+dobootopts(cp)
+	char *cp;
+{
+	while(cp && *cp) {
+		switch (*cp++) {
+		case 'm': /* multiuser */
+			boothowto &= ~RB_SINGLE;
+			break;
+
+		case 's': /* singleuser */
+			boothowto |= RB_SINGLE;
+			break;
+
+		case 'd': /* use compiled in default root */
+			boothowto |= RB_DFLTROOT;
+			break;
+
+		case 'a': /* ask for names */
+			boothowto |= RB_ASKNAME;
+			break;
+
+		case 'A': /* don't ask for names */
+			boothowto &= ~RB_ASKNAME;
+			break;
+
+		case 't': /* use serial console */
+			boothowto |= RB_SERCONS;
+			break;
+
+		case 'c': /* boot configure */
+			boothowto |= RB_CONFIG;
+			break;
+
+		case 'B': /* Enter debugger */
+			boothowto |= RB_KDB;
+			break;
+		}
+
+	}
+}
+
+
+/*
+ * Console initialization: called early on from main,
+ * before vm init or startup.  Do enough configuration
+ * to choose and initialize a console.
+ */
+void
+consinit()
+{
+	if (console_ok) {
+		return;
+	}
+	cninit();
+	console_ok = 1;
+}
+
+/*
+ * cpu_startup: allocate memory for variable-sized tables,
+ * initialize cpu, and do autoconfiguration.
+ */
+void
+cpu_startup()
+{
+	unsigned i;
+	int base, residual;
+	vaddr_t minaddr, maxaddr;
+	vsize_t size;
+#ifdef DEBUG
+	extern int pmapdebugflag;
+	int opmapdebugflag = pmapdebugflag;
+
+	pmapdebugflag = 0;	/* Shut up pmap debug during bootstrap */
+#endif
+
+	/*
+	 * Good {morning,afternoon,evening,night}.
+	 */
+	printf(version);
+	printf("real mem = %d\n", ptoa(physmem));
+
+	/*
+	 * Allocate virtual address space for file I/O buffers.
+	 * Note they are different than the array of headers, 'buf',
+	 * and usually occupy more virtual memory than physical.
+	 */
+	size = MAXBSIZE * nbuf;
+	if (uvm_map(kernel_map, (vaddr_t *) &buffers, round_page(size),
+			NULL, UVM_UNKNOWN_OFFSET, 0,
+			UVM_MAPFLAG(UVM_PROT_NONE, UVM_PROT_NONE, UVM_INH_NONE,
+			UVM_ADV_NORMAL, 0)) != KERN_SUCCESS) {
+		panic("cpu_startup: cannot allocate VM for buffers");
+	}
+	base = bufpages / nbuf;
+	residual = bufpages % nbuf;
+	if (base >= MAXBSIZE / PAGE_SIZE) {
+		/* don't want to alloc more physical mem than needed */
+		base = MAXBSIZE / PAGE_SIZE;
+		residual = 0;
+	}
+
+	for (i = 0; i < nbuf; i++) {
+		vsize_t curbufsize;
+		vaddr_t curbuf;
+
+		/*
+		 * First <residual> buffers get (base+1) physical pages
+		 * allocated for them.  The rest get (base) physical pages.
+		 *
+		 * The rest of each buffer occupies virtual space,
+		 * but has no physical memory allocated for it.
+		 */
+		curbuf = (vaddr_t)buffers + i * MAXBSIZE;
+		curbufsize = PAGE_SIZE * (i < residual ? base+1 : base);
+
+		while (curbufsize) {
+			struct vm_page *pg = uvm_pagealloc(NULL, 0, NULL, 0);
+			if (pg == NULL)
+				panic("cpu_startup: not enough memory for"
+					" buffer cache");
+			pmap_kenter_pa(curbuf, VM_PAGE_TO_PHYS(pg),
+					VM_PROT_READ|VM_PROT_WRITE);
+			curbuf += PAGE_SIZE;
+			curbufsize -= PAGE_SIZE;
+		}
+	}
+	/*
+	 * Allocate a submap for exec arguments.  This map effectively
+	 * limits the number of processes exec'ing at any time.
+	 */
+	exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 16 * NCARGS,
+					TRUE, FALSE, NULL);
+	/* Allocate a submap for physio */
+	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
+	    VM_PHYS_SIZE, TRUE, FALSE, NULL);
+
+	/* Finally, allocate mbuf pool. */
+	mb_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
+				VM_MBUF_SIZE, FALSE, FALSE, NULL);
+#ifdef DEBUG
+	pmapdebugflag = opmapdebugflag;
+#endif
+	printf("avail mem = %d\n", ptoa(uvmexp.free));
+	printf("using %d buffers containing %d bytes of memory\n",
+		nbuf, bufpages * PAGE_SIZE);
+	/*
+	 * Set up CPU-specific registers, cache, etc.
+	 */
+	initcpu();
+
+	/*
+	 * Set up buffers, so they can be used to read disk labels.
+	 */
+	bufinit();
+
+	/*
+	 * Configure the system.
+	 */
+	if (boothowto & RB_CONFIG) {
+#ifdef BOOT_CONFIG
+		user_config();
+#else
+		printf("kernel does not support -c; continuing..\n");
+#endif
+	}
+}
+
+/*
+ * machine dependent system variables.
+ */
+int
+cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p)
+	int *name;
+	u_int namelen;
+	void *oldp;
+	size_t *oldlenp;
+	void *newp;
+	size_t newlen;
+	struct proc *p;
+{
+	/* all sysctl names at this level are terminal */
+	if (namelen != 1)
+		return ENOTDIR;		/* overloaded */
+
+	switch (name[0]) {
+	case CPU_ALLOWAPERTURE:
+#ifdef APERTURE
+	if (securelevel > 0)
+		return sysctl_rdint(oldp, oldlenp, newp, allowaperture);
+	else
+		return sysctl_int(oldp, oldlenp, newp, newlen, &allowaperture);
+#else
+		return (sysctl_rdint(oldp, oldlenp, newp, 0));
+#endif
+	default:
+		return EOPNOTSUPP;
+	}
+}
+
+/*
+ * Set registers on exec for native exec format. For o64/64.
+ */
+void
+setregs(p, pack, stack, retval)
+	struct proc *p;
+	struct exec_package *pack;
+	u_long stack;
+	register_t *retval;
+{
+	extern struct proc *machFPCurProcPtr;
+#if 0
+/* XXX should check validity of header and perhaps be 32/64 indep. */
+        Elf64_Ehdr *eh = pack->ep_hdr;
+
+        if ((((eh->e_flags & EF_MIPS_ABI) != E_MIPS_ABI_NONE) &&
+            ((eh->e_flags & EF_MIPS_ABI) != E_MIPS_ABI_O32)) ||
+            ((eh->e_flags & EF_MIPS_ARCH) >= E_MIPS_ARCH_3) ||
+            (eh->e_ident[EI_CLASS] != ELFCLASS32)) {
+		p->p_md.md_flags |= MDP_O32;
+        }
+#endif
+
+#if !defined(_LP64)
+	p->p_md.md_flags |= MDP_O32;
+#endif
+
+	bzero((caddr_t)p->p_md.md_regs, sizeof(struct trap_frame));
+	p->p_md.md_regs->sp = stack;
+	p->p_md.md_regs->pc = pack->ep_entry & ~3;
+	p->p_md.md_regs->t9 = pack->ep_entry & ~3; /* abicall req */
+#if 0
+	p->p_md.md_regs->sr = SR_FR_32|SR_KSU_USER|SR_UX|SR_EXL|SR_INT_ENAB;
+#else
+	p->p_md.md_regs->sr = SR_KSU_USER|SR_XX|SR_EXL|SR_INT_ENAB;
+#endif
+	p->p_md.md_regs->sr |= (idle_mask << 8) & SR_INT_MASK;
+	p->p_md.md_regs->ic = idle_mask & IC_INT_MASK;
+	p->p_md.md_flags &= ~MDP_FPUSED;
+	if (machFPCurProcPtr == p)
+		machFPCurProcPtr = (struct proc *)0;
+	p->p_md.md_ss_addr = 0;
+	p->p_md.md_pc_ctrl = 0;
+	p->p_md.md_watch_1 = 0;
+	p->p_md.md_watch_2 = 0;
+}
+
+
+int	waittime = -1;
+
+void
+boot(howto)
+	register int howto;
+{
+
+	/* take a snap shot before clobbering any registers */
+	if (curproc)
+		savectx(curproc->p_addr, 0);
+
+#ifdef DEBUG
+	if (panicstr)
+		stacktrace();
+#endif
+
+	boothowto = howto;
+	if ((howto & RB_NOSYNC) == 0 && waittime < 0) {
+		extern struct proc proc0;
+		/* fill curproc with live object */
+		if (curproc == NULL)
+			curproc = &proc0;
+		/*
+		 * Synchronize the disks....
+		 */
+		waittime = 0;
+		vfs_shutdown();
+
+		/*
+		 * If we've been adjusting the clock, the todr
+		 * will be out of synch; adjust it now.
+		 */
+		resettodr();
+	}
+	(void) splhigh();		/* extreme priority */
+
+	if (howto & RB_HALT) {
+		printf("System halted.\n");
+		if(sys_config.system_type == ALGOR_P5064 && howto & RB_POWERDOWN) {
+			printf("Shutting off!\n");
+			*(int *)(0xffffffffbffa000c) = 1;
+		}
+		while(1); /* Forever */
+	}
+	else {
+		if (howto & RB_DUMP)
+			dumpsys();
+		printf("System restart.\n");
+#if defined(LP64)
+		__asm__(" li $2, 0xffffffff80010100; jr $2; nop\n");
+#else
+		__asm__(" li $2, 0x80010100; jr $2; nop\n");
+#endif
+		while(1); /* Forever */
+	}
+	/*NOTREACHED*/
+}
+
+int	dumpmag = (int)0x8fca0101;	/* magic number for savecore */
+int	dumpsize = 0;		/* also for savecore */
+long	dumplo = 0;
+
+void
+dumpconf()
+{
+	int nblks;
+
+	dumpsize = ptoa(physmem);
+	if (dumpdev != NODEV && bdevsw[major(dumpdev)].d_psize) {
+		nblks = (*bdevsw[major(dumpdev)].d_psize)(dumpdev);
+		if (dumpsize > btoc(dbtob(nblks - dumplo)))
+			dumpsize = btoc(dbtob(nblks - dumplo));
+		else if (dumplo == 0)
+			dumplo = nblks - btodb(ctob(physmem));
+	}
+	/*
+	 * Don't dump on the first page
+	 * in case the dump device includes a disk label.
+	 */
+	if (dumplo < btodb(PAGE_SIZE))
+		dumplo = btodb(PAGE_SIZE);
+}
+
+/*
+ * Doadump comes here after turning off memory management and
+ * getting on the dump stack, either when called above, or by
+ * the auto-restart code.
+ */
+void
+dumpsys()
+{
+
+	msgbufmapped = 0;
+	if (dumpdev == NODEV)
+		return;
+	/*
+	 * For dumps during autoconfiguration,
+	 * if dump device has already configured...
+	 */
+	if (dumpsize == 0)
+		dumpconf();
+	if (dumplo < 0)
+		return;
+	printf("\ndumping to dev %x, offset %d\n", dumpdev, dumplo);
+	printf("dump not yet implemented");
+#if 0 /* XXX HAVE TO FIX XXX */
+	switch (error = (*bdevsw[major(dumpdev)].d_dump)(dumpdev, dumplo,)) {
+
+	case ENXIO:
+		printf("device bad\n");
+		break;
+
+	case EFAULT:
+		printf("device not ready\n");
+		break;
+
+	case EINVAL:
+		printf("area improper\n");
+		break;
+
+	case EIO:
+		printf("i/o error\n");
+		break;
+
+	default:
+		printf("error %d\n", error);
+		break;
+
+	case 0:
+		printf("succeeded\n");
+	}
+#endif
+}
+
+void
+initcpu()
+{
+}
+
+/*
+ * Convert "xx:xx:xx:xx:xx:xx" string to ethernet hardware address.
+ */
+static void
+get_eth_hw_addr(char *s, char *a)
+{
+	int i;
+	if(s != NULL) {
+		for(i = 0; i < 6; i++) {
+			a[i] = atoi(s, 16);
+			s += 3;		/* Don't get to fancy here :-) */
+		}
+	}
+}
+
+/*
+ * Convert an ASCII string into an integer.
+ */
+static int
+atoi(s, b)
+	char *s;
+	int   b;
+{
+	int c;
+	unsigned base = b, d;
+	int neg = 0, val = 0;
+
+	if (s == 0 || (c = *s++) == 0)
+		goto out;
+
+	/* skip spaces if any */
+	while (c == ' ' || c == '\t')
+		c = *s++;
+
+	/* parse sign, allow more than one (compat) */
+	while (c == '-') {
+		neg = !neg;
+		c = *s++;
+	}
+
+	/* parse base specification, if any */
+	if (c == '0') {
+		c = *s++;
+		switch (c) {
+		case 'X':
+		case 'x':
+			base = 16;
+			c = *s++;
+			break;
+		case 'B':
+		case 'b':
+			base = 2;
+			c = *s++;
+			break;
+		default:
+			base = 8;
+		}
+	}
+
+	/* parse number proper */
+	for (;;) {
+		if (c >= '0' && c <= '9')
+			d = c - '0';
+		else if (c >= 'a' && c <= 'z')
+			d = c - 'a' + 10;
+		else if (c >= 'A' && c <= 'Z')
+			d = c - 'A' + 10;
+		else
+			break;
+		val *= base;
+		val += d;
+		c = *s++;
+	}
+	if (neg)
+		val = -val;
+out:
+	return val;	
+}
+
+/*
+ *  RM7000 Performance counter support.
+ */
+
+int
+rm7k_perfcntr(cmd, arg1, arg2, arg3)
+	int cmd;
+	long  arg1, arg2, arg3;
+{
+	int result;
+	quad_t cntval;
+	struct proc *p = curproc;
+
+
+	switch(cmd) {
+	case PCNT_FNC_SELECT:
+		if((arg1 & 0xff) > PCNT_SRC_MAX || 
+		   (arg1 & ~(PCNT_CE|PCNT_UM|PCNT_KM|0xff)) != 0) {
+			result = EINVAL;
+			break;
+		}
+printf("perfcnt select %x, proc %p\n", arg1, p);
+		p->p_md.md_pc_count = 0;
+		p->p_md.md_pc_spill = 0;
+		p->p_md.md_pc_ctrl = arg1;
+		result = 0;
+		break;
+
+	case PCNT_FNC_READ:
+		cntval = p->p_md.md_pc_count;
+		cntval += (quad_t)p->p_md.md_pc_spill << 31;
+		result = copyout(&cntval, (void *)arg1, sizeof(cntval));
+printf("perfcnt read %d:%d -> %p\n", p->p_md.md_pc_count, p->p_md.md_pc_spill, arg1);
+		break;
+
+	default:
+printf("perfcnt error %d\n", cmd);
+		result = -1;
+		break;
+	}
+	return(result);
+}
+
+/*
+ *  Called when the performance counter d31 gets set.
+ *  Increase spill value and reset d31.
+ */
+void
+rm7k_perfintr(trapframe)
+	struct trap_frame *trapframe;
+{
+	struct proc *p = curproc;
+
+	printf("perfintr proc %p!\n", p);
+	cp0_setperfcount(cp0_getperfcount() & 0x7fffffff);
+	if(p != NULL) {
+		p->p_md.md_pc_spill++;
+	}
+	
+}
+
+int
+rm7k_watchintr(trapframe)
+	struct trap_frame *trapframe;
+{
+	return(0);
+}