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authorJason Wright <jason@cvs.openbsd.org>1999-08-06 01:25:13 +0000
committerJason Wright <jason@cvs.openbsd.org>1999-08-06 01:25:13 +0000
commit9a37609508564f459a7c58c6160ab9252064d64b (patch)
treea32b7d14b95e086ae7c42d7b87733b536c349a4f /sys/arch
parent28020380f961ea84ca0ace1d612bdc35d549196e (diff)
revamp interrupt handler to allow for return values:
<0 - interrupt might have been handled 0 - interrupt not handled >0 - interrupt definately handled
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/sparc/sparc/locore.s19
1 files changed, 12 insertions, 7 deletions
diff --git a/sys/arch/sparc/sparc/locore.s b/sys/arch/sparc/sparc/locore.s
index 45a3863be67..a77985a566e 100644
--- a/sys/arch/sparc/sparc/locore.s
+++ b/sys/arch/sparc/sparc/locore.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.s,v 1.25 1999/04/22 18:47:19 art Exp $ */
+/* $OpenBSD: locore.s,v 1.26 1999/08/06 01:25:12 jason Exp $ */
/* $NetBSD: locore.s,v 1.73 1997/09/13 20:36:48 pk Exp $ */
/*
@@ -2271,9 +2271,10 @@ return_from_syscall:
* we do them in-line before enabling traps.
*
* After preliminary setup work, the interrupt is passed to each
- * registered handler in turn. These are expected to return nonzero if
- * they took care of the interrupt. If a handler claims the interrupt,
- * we exit (hardware interrupts are latched in the requestor so we'll
+ * registered handler in turn. These are expected to return 1 if they
+ * took care of the interrupt, 0 if they didn't, and -1 if the device
+ * isn't sure. If a handler claims the interrupt, we exit
+ * (hardware interrupts are latched in the requestor so we'll
* just take another interrupt in the unlikely event of simultaneous
* interrupts from two different devices at the same level). If we go
* through all the registered handlers and no one claims it, we report a
@@ -2418,6 +2419,7 @@ _sparc_interrupt_common:
st %o0, [%l4 + %l5]
set _intrhand, %l4 ! %l4 = intrhand[intlev];
ld [%l4 + %l5], %l4
+ clr %l5 ! %l5 = 0
b 3f
st %fp, [%sp + CCFSZ + 16]
@@ -2428,12 +2430,15 @@ _sparc_interrupt_common:
add %sp, CCFSZ, %o0
2: jmpl %o1, %o7 ! handled = (*ih->ih_fun)(...)
ld [%l4 + 8], %l4 ! and ih = ih->ih_next
- tst %o0
- bnz 4f ! if (handled) break
- nop
+ cmp %o0, 1
+ bge 4f ! if (handled >= 1) break
+ or %o0, %l5, %l5 ! and %l5 |= handled
3: tst %l4
bnz 1b ! while (ih)
nop
+ tst %l5 ! if (handled) break
+ bnz 4f
+ nop
call _strayintr ! strayintr(&intrframe)
add %sp, CCFSZ, %o0
/* all done: restore registers and go return */