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authorMiod Vallat <miod@cvs.openbsd.org>2009-04-10 20:57:29 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2009-04-10 20:57:29 +0000
commitea674e191fa4f2c16bdd0ba317e6f50a3c43ad40 (patch)
tree6ea64c2b0d3062eaf791cc7f89b9eed8e5fa3b47 /sys/arch
parent3a5f7c387b932d9469cd4adcfbae318e32b0fc22 (diff)
Catch up with sparc changes (bcopy fix, struct cpuinfo, etc); still dies early
with so-called ``external memory fault'' which cause I can't figure out.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/solbourne/solbourne/genassym.cf6
-rw-r--r--sys/arch/solbourne/solbourne/locore.s67
-rw-r--r--sys/arch/solbourne/solbourne/pmap.c18
-rw-r--r--sys/arch/solbourne/solbourne/trap.c9
4 files changed, 59 insertions, 41 deletions
diff --git a/sys/arch/solbourne/solbourne/genassym.cf b/sys/arch/solbourne/solbourne/genassym.cf
index d2774076a97..5cb3b542655 100644
--- a/sys/arch/solbourne/solbourne/genassym.cf
+++ b/sys/arch/solbourne/solbourne/genassym.cf
@@ -1,4 +1,4 @@
-# $OpenBSD: genassym.cf,v 1.1 2005/04/20 01:00:18 miod Exp $
+# $OpenBSD: genassym.cf,v 1.2 2009/04/10 20:57:28 miod Exp $
#
# Copyright (c) 2005, Miodrag Vallat
#
@@ -104,3 +104,7 @@ export SONPROC
struct uvmexp V_
member INTR intrs
member swtch
+
+# CPU info structure
+struct cpu_softc
+member CPUINFO_CURPROC ci.ci_curproc
diff --git a/sys/arch/solbourne/solbourne/locore.s b/sys/arch/solbourne/solbourne/locore.s
index 442798dcf92..21644f93067 100644
--- a/sys/arch/solbourne/solbourne/locore.s
+++ b/sys/arch/solbourne/solbourne/locore.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.s,v 1.13 2008/10/10 20:21:39 deraadt Exp $ */
+/* $OpenBSD: locore.s,v 1.14 2009/04/10 20:57:28 miod Exp $ */
/* OpenBSD: locore.s,v 1.64 2005/04/17 18:47:50 miod Exp */
/*
@@ -218,6 +218,8 @@ _C_LABEL(kgdb_stack):
.globl _C_LABEL(cpcb)
_C_LABEL(cpcb): .word _C_LABEL(u0)
+curproc = CPUINFO_VA + CPUINFO_CURPROC
+
/*
* cputyp is the current cpu type, used to distinguish between
* the many variations of different sun4* machines. It contains
@@ -2687,22 +2689,23 @@ dostart:
nop; nop; nop
/*
- * ... and set up the PTW as we want them
+ * ... and unmap ROM code.
*/
set PTW0_DEFAULT & ~PTW_V, %o1
sta %o1, [%g0] ASI_PTW0
+#if 0
set PTW1_DEFAULT, %o1
sta %o1, [%g0] ASI_PTW1
set PTW2_DEFAULT, %o1
sta %o1, [%g0] ASI_PTW2
+#endif
sta %g0, [%g0] ASI_PIID
sta %g0, [%g0] ASI_GTLB_INVAL_PID
nop; nop; nop
/*
- * Call main. This returns to us after loading /sbin/init into
- * user space. (If the exec fails, main() does not return.)
+ * Call main.
*/
call _C_LABEL(main)
clr %o0 ! our frame arg is ignored
@@ -3275,7 +3278,11 @@ ENTRY(cpu_switchto)
*/
tst %o0
be,a Lsw_load ! if no old process, go load
- wr %g1, (IPL_CLOCK << 8) | PSR_ET, %psr
+#if 0
+ wr %g1, (IPL_SCHED << 8) | PSR_ET, %psr
+#else
+ wr %g1, (IPL_SCHED << 8), %psr
+#endif
/*
* save: write back all windows (including the current one).
@@ -3288,15 +3295,39 @@ wb1: SAVE; SAVE; SAVE; SAVE; SAVE; SAVE; SAVE /* 7 of each: */
/*
* Load the new process. To load, we must change stacks and
* alter cpcb and %wim, hence we must disable traps. %psr is
- * currently equal to oldpsr (%g1) ^ (IPL_CLOCK << 8);
+ * currently equal to oldpsr (%g1) ^ (IPL_SCHED << 8);
* this means that PSR_ET is on. Likewise, PSR_ET is on
* in newpsr (%g2), although we do not know newpsr's ipl.
*
* We also must load up the `in' and `local' registers.
*/
- wr %g1, (IPL_CLOCK << 8) | PSR_ET, %psr
+#if 0
+ wr %g1, (IPL_SCHED << 8) | PSR_ET, %psr
+#else
+ wr %g1, (IPL_SCHED << 8), %psr
+#endif
Lsw_load:
-! wr %g1, (IPL_CLOCK << 8) | PSR_ET, %psr ! done above
+#if 0
+! wr %g1, (IPL_SCHED << 8) | PSR_ET, %psr ! done above
+#else
+! wr %g1, (IPL_SCHED << 8), %psr ! done above
+#endif
+
+ /*
+ * Access the new pcb while we still enable traps. This is
+ * simpler (for us) than doing manual TLB insertion, and
+ * is faster if this is a TLB hit.
+ */
+ ld [%g5 + PCB_SP], %o1 ! access pcb
+ ld [%g3 + P_VMSPACE], %o3 ! access p
+ ld [%o3 + VM_PMAP], %o3 ! access p->p_vmspace
+ ld [%o3 + PMAP_PSEGTAB], %o3 ! access pmap
+
+ /*
+ * Disable traps now.
+ */
+ wr %g1, PSR_ET, %psr
+
/* compute new wim */
ld [%g5 + PCB_WIM], %o0
mov 1, %o1
@@ -3318,13 +3349,17 @@ Lsw_load:
*/
ld [%g3 + P_VMSPACE], %o3 ! vm = p->p_vmspace;
+#if 0
PTE_OF_ADDR(%o3, %o1, %o2, badstack)
INSERT_PTE(%o3, %o1)
+#endif
ld [%o3 + VM_PMAP], %o3 ! pm = vm->vm_map.pmap;
add %o3, PMAP_PSEGTAB, %o3
+#if 0
PTE_OF_ADDR(%o3, %o1, %o2, badstack)
INSERT_PTE(%o3, %o1)
+#endif
ld [%o3], %o3 ! pmap->pm_psegtab
lda [%g0] ASI_PDBR, %o4 ! get old psegtab
@@ -3517,17 +3552,6 @@ Lfserr:
retl ! and return error indicator
mov -1, %o0
- /*
- * This is just like Lfserr, but it's a global label that allows
- * mem_access_fault() to check to see that we don't want to try to
- * page in the fault. It's used by xldcontrolb().
- */
- .globl _C_LABEL(Lfsbail)
-Lfsbail:
- st %g0, [%o2 + PCB_ONFAULT]! error in r/w, clear pcb_onfault
- retl ! and return error indicator
- mov -1, %o0
-
/*
* copywords(src, dst, nbytes)
*
@@ -3600,7 +3624,7 @@ ENTRY(memcpy)
mov %o0, %o3
mov %o1, %o0
mov %o3, %o1
-ENTRY(bcopy)
+Lbcopy_old:
cmp %o2, BCOPY_SMALL
Lbcopy_start:
bge,a Lbcopy_fancy ! if >= this many, go be fancy.
@@ -3768,6 +3792,7 @@ Lbcopy_done:
/*
* ovbcopy(src, dst, len): like bcopy, but regions may overlap.
*/
+ENTRY(bcopy)
ENTRY(ovbcopy)
cmp %o0, %o1 ! src < dst?
bgeu Lbcopy_start ! no, go copy forwards as via bcopy
@@ -3862,7 +3887,7 @@ Lback_fancy:
dec 2, %o0 ! do {
ldsh [%o0], %o4 ! src -= 2;
dec 2, %o1 ! dst -= 2;
- deccc 2, %o0 ! *(short *)dst = *(short *)src;
+ deccc 2, %o2 ! *(short *)dst = *(short *)src;
bge 5b ! } while ((len -= 2) >= 0);
sth %o4, [%o1]
b Lback_mopb ! goto mop_up_byte;
diff --git a/sys/arch/solbourne/solbourne/pmap.c b/sys/arch/solbourne/solbourne/pmap.c
index 09a70e96e3b..49d1aa40dcd 100644
--- a/sys/arch/solbourne/solbourne/pmap.c
+++ b/sys/arch/solbourne/solbourne/pmap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.c,v 1.2 2008/06/14 10:55:20 mk Exp $ */
+/* $OpenBSD: pmap.c,v 1.3 2009/04/10 20:57:28 miod Exp $ */
/*
* Copyright (c) 2005, Miodrag Vallat
*
@@ -195,7 +195,7 @@ pmap_pte(pmap_t pmap, vaddr_t va)
* they will be in locore.s after bootstrap() returns.
*/
void
-pmap_bootstrap(size_t parmdata)
+pmap_bootstrap(size_t promdata)
{
extern caddr_t end;
extern vaddr_t esym;
@@ -272,10 +272,10 @@ pmap_bootstrap(size_t parmdata)
#endif
/*
- * Reserve room for the parameter data we're interested in.
+ * Reserve room for the prom data we're interested in.
*/
prom_data = ekern;
- ekern += parmdata;
+ ekern += promdata;
/*
* From then on, all allocations will be multiples of the
@@ -455,7 +455,8 @@ pmap_bootstrap(size_t parmdata)
#endif
uvm_page_physload(
atop(PTW1_TO_PHYS(ekern)), prompa,
- atop(PTW1_TO_PHYS(ekern)), prompa, VM_FREELIST_DEFAULT);
+ atop(PTW1_TO_PHYS(ekern)), prompa,
+ VM_FREELIST_DEFAULT);
uvm_page_physload(
prompa + promlen, atop(PHYSMEM_BASE) + physmem,
prompa + promlen, atop(PHYSMEM_BASE) + physmem,
@@ -1440,7 +1441,7 @@ pmap_is_modified(struct vm_page *pg)
/*
* Flush instruction cache on the given dirty area.
*
- * The KAP is the only sparc implementation OpenBSD runs on with independant
+ * The KAP is the only sparc implementation OpenBSD runs on with independent
* instruction and data caches; for now, we won't add a function pointer
* to the cpu structure, but will directly invoke the necessary operation.
*/
@@ -1494,11 +1495,6 @@ pmap_changeprot(struct pmap *pmap, vaddr_t va, vm_prot_t prot, int wired)
void
pmap_redzone()
{
- pt_entry_t *pte;
-
- pte = pmap_pte(pmap_kernel(), VM_MIN_KERNEL_ADDRESS);
- *pte = PG_NV;
- tlb_flush(VM_MIN_KERNEL_ADDRESS);
}
/*
diff --git a/sys/arch/solbourne/solbourne/trap.c b/sys/arch/solbourne/solbourne/trap.c
index b2e88c58f69..2c613279751 100644
--- a/sys/arch/solbourne/solbourne/trap.c
+++ b/sys/arch/solbourne/solbourne/trap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: trap.c,v 1.10 2008/05/03 20:18:24 martin Exp $ */
+/* $OpenBSD: trap.c,v 1.11 2009/04/10 20:57:28 miod Exp $ */
/* OpenBSD: trap.c,v 1.42 2004/12/06 20:12:25 miod Exp */
/*
@@ -696,7 +696,6 @@ mem_access_fault(type, ser, v, pc, psr, tf)
ftype = ser & FCR_RO ? VM_PROT_WRITE : VM_PROT_READ;
va = trunc_page(v);
if (psr & PSR_PS) {
- extern char Lfsbail[];
if (type == T_TEXTFAULT) {
/*
* If we are trying to figure on which processor mask
@@ -712,12 +711,6 @@ mem_access_fault(type, ser, v, pc, psr, tf)
panic("kernel fault");
/* NOTREACHED */
}
- /*
- * If this was an access that we shouldn't try to page in,
- * resume at the fault handler without any action.
- */
- if (p->p_addr && p->p_addr->u_pcb.pcb_onfault == Lfsbail)
- goto kfault;
/*
* During autoconfiguration, faults are never OK unless