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authorMiod Vallat <miod@cvs.openbsd.org>2005-12-20 07:06:30 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2005-12-20 07:06:30 +0000
commitfd68d8cacb4ab77a0d30cdd479f07bd33c141a0f (patch)
tree63c8622e2b1948957aafbcbf6ac93f819bee25bf /sys/arch
parentad1cff6ab02fa20a482b038484093cb6c7ab870b (diff)
Since we are allowed to rely on the fact that the pcb is the first element
of struct user, use syntactic sugar in genassym.cf and use PCB_xxx defines instead of U_PCB_xxx, like all other platforms do; no functional change.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/mips64/mips64/context.S86
-rw-r--r--sys/arch/mips64/mips64/exception.S40
-rw-r--r--sys/arch/mips64/mips64/lcore_access.S28
-rw-r--r--sys/arch/mips64/mips64/lcore_ddb.S46
-rw-r--r--sys/arch/mips64/mips64/lcore_float.S416
-rw-r--r--sys/arch/mips64/mips64/tlbhandler.S8
-rw-r--r--sys/arch/sgi/sgi/genassym.cf14
7 files changed, 319 insertions, 319 deletions
diff --git a/sys/arch/mips64/mips64/context.S b/sys/arch/mips64/mips64/context.S
index b2a4cdee02e..0e51e44efb9 100644
--- a/sys/arch/mips64/mips64/context.S
+++ b/sys/arch/mips64/mips64/context.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: context.S,v 1.8 2004/09/27 19:16:06 pefo Exp $ */
+/* $OpenBSD: context.S,v 1.9 2005/12/20 07:06:26 miod Exp $ */
/*
* Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -46,23 +46,23 @@
* Save registers and state used by reboot to take snapshot.
*/
LEAF(savectx, 0)
- REG_S s0, U_PCB_CONTEXT+0*REGSZ(a0)
- REG_S s1, U_PCB_CONTEXT+1*REGSZ(a0)
- REG_S s2, U_PCB_CONTEXT+2*REGSZ(a0)
- REG_S s3, U_PCB_CONTEXT+3*REGSZ(a0)
+ REG_S s0, PCB_CONTEXT+0*REGSZ(a0)
+ REG_S s1, PCB_CONTEXT+1*REGSZ(a0)
+ REG_S s2, PCB_CONTEXT+2*REGSZ(a0)
+ REG_S s3, PCB_CONTEXT+3*REGSZ(a0)
mfc0 v0, COP_0_STATUS_REG
- REG_S s4, U_PCB_CONTEXT+4*REGSZ(a0)
- REG_S s5, U_PCB_CONTEXT+5*REGSZ(a0)
- REG_S s6, U_PCB_CONTEXT+6*REGSZ(a0)
- REG_S s7, U_PCB_CONTEXT+7*REGSZ(a0)
- REG_S sp, U_PCB_CONTEXT+8*REGSZ(a0)
- REG_S s8, U_PCB_CONTEXT+9*REGSZ(a0)
- REG_S ra, U_PCB_CONTEXT+10*REGSZ(a0)
- REG_S v0, U_PCB_CONTEXT+11*REGSZ(a0)
+ REG_S s4, PCB_CONTEXT+4*REGSZ(a0)
+ REG_S s5, PCB_CONTEXT+5*REGSZ(a0)
+ REG_S s6, PCB_CONTEXT+6*REGSZ(a0)
+ REG_S s7, PCB_CONTEXT+7*REGSZ(a0)
+ REG_S sp, PCB_CONTEXT+8*REGSZ(a0)
+ REG_S s8, PCB_CONTEXT+9*REGSZ(a0)
+ REG_S ra, PCB_CONTEXT+10*REGSZ(a0)
+ REG_S v0, PCB_CONTEXT+11*REGSZ(a0)
cfc0 t1, COP_0_ICR
lw t0, cpl
- REG_S t1, U_PCB_CONTEXT+12*REGSZ(a0) # save status register
- REG_S t0, U_PCB_CONTEXT+13*REGSZ(a0)
+ REG_S t1, PCB_CONTEXT+12*REGSZ(a0) # save status register
+ REG_S t0, PCB_CONTEXT+13*REGSZ(a0)
j ra
move v0, zero
END(savectx)
@@ -224,27 +224,27 @@ END(switch_exit)
*/
NON_LEAF(cpu_switch, FRAMESZ(CF_SZ), ra)
PTR_L t3, curprocpaddr
- REG_S sp, U_PCB_CONTEXT+8*REGSZ(t3) # save old sp
+ REG_S sp, PCB_CONTEXT+8*REGSZ(t3) # save old sp
PTR_SUBU sp, sp, FRAMESZ(CF_SZ)
REG_S ra, CF_RA_OFFS(sp)
.mask 0x80000000, (CF_RA_OFFS - FRAMESZ(CF_SZ))
lw t0, cpl
- sw t0, U_PCB_CONTEXT+13*REGSZ(t3)
+ sw t0, PCB_CONTEXT+13*REGSZ(t3)
# lw t2, cnt+V_SWTCH # for statistics
- REG_S s0, U_PCB_CONTEXT+0*REGSZ(t3) # do a 'savectx()'
- REG_S s1, U_PCB_CONTEXT+1*REGSZ(t3)
- REG_S s2, U_PCB_CONTEXT+2*REGSZ(t3)
- REG_S s3, U_PCB_CONTEXT+3*REGSZ(t3)
- REG_S s4, U_PCB_CONTEXT+4*REGSZ(t3)
- REG_S s5, U_PCB_CONTEXT+5*REGSZ(t3)
- REG_S s6, U_PCB_CONTEXT+6*REGSZ(t3)
- REG_S s7, U_PCB_CONTEXT+7*REGSZ(t3)
- REG_S s8, U_PCB_CONTEXT+9*REGSZ(t3)
- REG_S ra, U_PCB_CONTEXT+10*REGSZ(t3)
+ REG_S s0, PCB_CONTEXT+0*REGSZ(t3) # do a 'savectx()'
+ REG_S s1, PCB_CONTEXT+1*REGSZ(t3)
+ REG_S s2, PCB_CONTEXT+2*REGSZ(t3)
+ REG_S s3, PCB_CONTEXT+3*REGSZ(t3)
+ REG_S s4, PCB_CONTEXT+4*REGSZ(t3)
+ REG_S s5, PCB_CONTEXT+5*REGSZ(t3)
+ REG_S s6, PCB_CONTEXT+6*REGSZ(t3)
+ REG_S s7, PCB_CONTEXT+7*REGSZ(t3)
+ REG_S s8, PCB_CONTEXT+9*REGSZ(t3)
+ REG_S ra, PCB_CONTEXT+10*REGSZ(t3)
mfc0 t0, COP_0_STATUS_REG
cfc0 t1, COP_0_ICR
- REG_S t0, U_PCB_CONTEXT+11*REGSZ(t3)
- REG_S t1, U_PCB_CONTEXT+12*REGSZ(t3)
+ REG_S t0, PCB_CONTEXT+11*REGSZ(t3)
+ REG_S t1, PCB_CONTEXT+12*REGSZ(t3)
lw t1, whichqs # look for non-empty queue
# addu t2, t2, 1
@@ -397,25 +397,25 @@ ctx3:
/*
* Restore registers and return.
*/
- REG_L a0, U_PCB_CONTEXT+13*REGSZ(t3)
- REG_L s0, U_PCB_CONTEXT+0*REGSZ(t3)
- REG_L s1, U_PCB_CONTEXT+1*REGSZ(t3)
- REG_L s2, U_PCB_CONTEXT+2*REGSZ(t3)
- REG_L s3, U_PCB_CONTEXT+3*REGSZ(t3)
- REG_L s4, U_PCB_CONTEXT+4*REGSZ(t3)
- REG_L s5, U_PCB_CONTEXT+5*REGSZ(t3)
- REG_L s6, U_PCB_CONTEXT+6*REGSZ(t3)
- REG_L s7, U_PCB_CONTEXT+7*REGSZ(t3)
- REG_L sp, U_PCB_CONTEXT+8*REGSZ(t3)
- REG_L s8, U_PCB_CONTEXT+9*REGSZ(t3)
+ REG_L a0, PCB_CONTEXT+13*REGSZ(t3)
+ REG_L s0, PCB_CONTEXT+0*REGSZ(t3)
+ REG_L s1, PCB_CONTEXT+1*REGSZ(t3)
+ REG_L s2, PCB_CONTEXT+2*REGSZ(t3)
+ REG_L s3, PCB_CONTEXT+3*REGSZ(t3)
+ REG_L s4, PCB_CONTEXT+4*REGSZ(t3)
+ REG_L s5, PCB_CONTEXT+5*REGSZ(t3)
+ REG_L s6, PCB_CONTEXT+6*REGSZ(t3)
+ REG_L s7, PCB_CONTEXT+7*REGSZ(t3)
+ REG_L sp, PCB_CONTEXT+8*REGSZ(t3)
+ REG_L s8, PCB_CONTEXT+9*REGSZ(t3)
sw a0, cpl
#ifdef IMASK_EXTERNAL
jal hw_setintrmask
nop
#endif
- REG_L ra, U_PCB_CONTEXT+10*REGSZ(t3)
- REG_L v0, U_PCB_CONTEXT+11*REGSZ(t3)
- REG_L v1, U_PCB_CONTEXT+12*REGSZ(t3)
+ REG_L ra, PCB_CONTEXT+10*REGSZ(t3)
+ REG_L v0, PCB_CONTEXT+11*REGSZ(t3)
+ REG_L v1, PCB_CONTEXT+12*REGSZ(t3)
#ifndef IMASK_EXTERNAL
ctc0 v1, COP_0_ICR # XXX RM7000
#endif
diff --git a/sys/arch/mips64/mips64/exception.S b/sys/arch/mips64/mips64/exception.S
index 65e582604b9..ef6ec50d665 100644
--- a/sys/arch/mips64/mips64/exception.S
+++ b/sys/arch/mips64/mips64/exception.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: exception.S,v 1.7 2004/09/27 19:20:49 pefo Exp $ */
+/* $OpenBSD: exception.S,v 1.8 2005/12/20 07:06:26 miod Exp $ */
/*
* Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -535,28 +535,28 @@ NNON_LEAF(u_syscall, FRAMESZ(CF_SZ), ra)
.set noat
.mask 0x80000000, (CF_RA_OFFS - FRAMESZ(CF_SZ))
- REG_S a0, UADDR+U_PCB_REGS+(A0 * REGSZ)
- REG_S a1, UADDR+U_PCB_REGS+(A1 * REGSZ)
- REG_S a2, UADDR+U_PCB_REGS+(A2 * REGSZ)
- REG_S a3, UADDR+U_PCB_REGS+(A3 * REGSZ)
+ REG_S a0, UADDR+PCB_REGS+(A0 * REGSZ)
+ REG_S a1, UADDR+PCB_REGS+(A1 * REGSZ)
+ REG_S a2, UADDR+PCB_REGS+(A2 * REGSZ)
+ REG_S a3, UADDR+PCB_REGS+(A3 * REGSZ)
mfc0 a0, COP_0_STATUS_REG # First arg is the status reg.
mfc0 a1, COP_0_CAUSE_REG # Second arg is the cause reg.
dmfc0 a3, COP_0_EXC_PC # Fourth arg is the pc.
- REG_S sp, UADDR+U_PCB_REGS+(SP * REGSZ)
+ REG_S sp, UADDR+PCB_REGS+(SP * REGSZ)
LA sp, KERNELSTACK - FRAMESZ(CF_SZ) # switch to kernel SP
- REG_S ra, UADDR+U_PCB_REGS+(RA * REGSZ)
- REG_S a0, UADDR+U_PCB_REGS+(SR * REGSZ)
- REG_S a1, UADDR+U_PCB_REGS+(CAUSE * REGSZ)
- REG_S a3, UADDR+U_PCB_REGS+(PC * REGSZ)
+ REG_S ra, UADDR+PCB_REGS+(RA * REGSZ)
+ REG_S a0, UADDR+PCB_REGS+(SR * REGSZ)
+ REG_S a1, UADDR+PCB_REGS+(CAUSE * REGSZ)
+ REG_S a3, UADDR+PCB_REGS+(PC * REGSZ)
REG_S a3, CF_RA_OFFS(sp) # for debugging
LA gp, _gp # switch to kernel GP
lw a3, cpl
- sw a3, UADDR+U_PCB_REGS+(CPL * REGSZ)
+ sw a3, UADDR+PCB_REGS+(CPL * REGSZ)
.set at
# Turn off fpu and enter kernel mode
and t0, a0, ~(SR_COP_1_BIT | SR_EXL | SR_KSU_MASK | SR_INT_ENAB)
mtc0 t0, COP_0_STATUS_REG
- li a0, UADDR+U_PCB_REGS
+ li a0, UADDR+PCB_REGS
ITLBNOPFIX
/*
* If CPU is a RM7000 save away performance stuff.
@@ -614,20 +614,20 @@ NNON_LEAF(u_syscall, FRAMESZ(CF_SZ), ra)
nop;nop;nop;nop
1:
#endif
- lw a3, UADDR+U_PCB_REGS+(CPL * REGSZ)
+ lw a3, UADDR+PCB_REGS+(CPL * REGSZ)
sw a3, cpl
.set noat
- REG_L a0, UADDR+U_PCB_REGS+(SR * REGSZ)
+ REG_L a0, UADDR+PCB_REGS+(SR * REGSZ)
mtc0 a0, COP_0_STATUS_REG # still exeption level
- REG_L a0, UADDR+U_PCB_REGS+(PC * REGSZ)
- REG_L v0, UADDR+U_PCB_REGS+(V0 * REGSZ)
+ REG_L a0, UADDR+PCB_REGS+(PC * REGSZ)
+ REG_L v0, UADDR+PCB_REGS+(V0 * REGSZ)
dmtc0 a0, COP_0_EXC_PC # set return address
- REG_L v1, UADDR+U_PCB_REGS+(V1 * REGSZ)
- REG_L gp, UADDR+U_PCB_REGS+(GP * REGSZ)
- REG_L sp, UADDR+U_PCB_REGS+(SP * REGSZ)
- REG_L ra, UADDR+U_PCB_REGS+(RA * REGSZ)
+ REG_L v1, UADDR+PCB_REGS+(V1 * REGSZ)
+ REG_L gp, UADDR+PCB_REGS+(GP * REGSZ)
+ REG_L sp, UADDR+PCB_REGS+(SP * REGSZ)
+ REG_L ra, UADDR+PCB_REGS+(RA * REGSZ)
sync
eret
.set at
diff --git a/sys/arch/mips64/mips64/lcore_access.S b/sys/arch/mips64/mips64/lcore_access.S
index 3e74b2b1117..15567a41511 100644
--- a/sys/arch/mips64/mips64/lcore_access.S
+++ b/sys/arch/mips64/mips64/lcore_access.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: lcore_access.S,v 1.8 2004/10/20 12:49:15 pefo Exp $ */
+/* $OpenBSD: lcore_access.S,v 1.9 2005/12/20 07:06:26 miod Exp $ */
/*
* Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -79,7 +79,7 @@ LEAF(badaddr, 0)
li v0, KT_BADERR
PTR_L t3, curprocpaddr
bne a1, 1, 2f
- sw v0, U_PCB_ONFAULT(t3)
+ sw v0, PCB_ONFAULT(t3)
lbu v0, (a0) # don't put in bd-slot!
b 5f
nop
@@ -93,7 +93,7 @@ LEAF(badaddr, 0)
lw v0, (a0)
5:
sync
- sw zero, U_PCB_ONFAULT(t3)
+ sw zero, PCB_ONFAULT(t3)
j ra
move v0, zero # made it w/o errors
baderr:
@@ -351,11 +351,11 @@ NON_LEAF(copyinstr, FRAMESZ(CF_SZ), ra)
li v0, KT_COPYERR
PTR_L t3, curprocpaddr
jal copystr
- sw v0, U_PCB_ONFAULT(t3)
+ sw v0, PCB_ONFAULT(t3)
PTR_L ra, CF_RA_OFFS(sp)
PTR_L t3, curprocpaddr
- sw zero, U_PCB_ONFAULT(t3)
+ sw zero, PCB_ONFAULT(t3)
PTR_ADDU sp, sp, FRAMESZ(CF_SZ)
j ra
move v0, zero
@@ -379,11 +379,11 @@ NON_LEAF(copyoutstr, FRAMESZ(CF_SZ), ra)
li v0, KT_COPYERR
PTR_L t3, curprocpaddr
jal copystr
- sw v0, U_PCB_ONFAULT(t3)
+ sw v0, PCB_ONFAULT(t3)
PTR_L ra, CF_RA_OFFS(sp)
PTR_L t3, curprocpaddr
- sw zero, U_PCB_ONFAULT(t3)
+ sw zero, PCB_ONFAULT(t3)
PTR_ADDU sp, sp, FRAMESZ(CF_SZ)
j ra
move v0, zero
@@ -404,11 +404,11 @@ NON_LEAF(copyin, FRAMESZ(CF_SZ), ra)
li v0, KT_COPYERR
PTR_L t3, curprocpaddr
jal bcopy
- sw v0, U_PCB_ONFAULT(t3)
+ sw v0, PCB_ONFAULT(t3)
PTR_L ra, CF_RA_OFFS(sp)
PTR_L t3, curprocpaddr
- sw zero, U_PCB_ONFAULT(t3)
+ sw zero, PCB_ONFAULT(t3)
PTR_ADDU sp, sp, FRAMESZ(CF_SZ)
j ra
move v0, zero
@@ -429,11 +429,11 @@ NON_LEAF(copyout, FRAMESZ(CF_SZ), ra)
li v0, KT_COPYERR
PTR_L t3, curprocpaddr
jal bcopy
- sw v0, U_PCB_ONFAULT(t3)
+ sw v0, PCB_ONFAULT(t3)
PTR_L ra, CF_RA_OFFS(sp)
PTR_L t3, curprocpaddr
- sw zero, U_PCB_ONFAULT(t3)
+ sw zero, PCB_ONFAULT(t3)
PTR_ADDU sp, sp, FRAMESZ(CF_SZ)
j ra
move v0, zero
@@ -442,7 +442,7 @@ END(copyout)
_copyerr:
PTR_L ra, CF_RA_OFFS(sp)
PTR_L t3, curprocpaddr
- sw zero, U_PCB_ONFAULT(t3)
+ sw zero, PCB_ONFAULT(t3)
PTR_ADDU sp, sp, FRAMESZ(CF_SZ)
j ra
li v0, EFAULT # return error
@@ -457,11 +457,11 @@ NON_LEAF(kcopy, FRAMESZ(CF_SZ), ra)
li v0, KT_KCOPYERR
PTR_L t3, curprocpaddr
jal bcopy
- sw v0, U_PCB_ONFAULT(t3)
+ sw v0, PCB_ONFAULT(t3)
PTR_L ra, CF_RA_OFFS(sp)
PTR_L t3, curprocpaddr
- sw zero, U_PCB_ONFAULT(t3)
+ sw zero, PCB_ONFAULT(t3)
PTR_ADDU sp, sp, FRAMESZ(CF_SZ)
j ra
move v0, zero
diff --git a/sys/arch/mips64/mips64/lcore_ddb.S b/sys/arch/mips64/mips64/lcore_ddb.S
index 88ba91d6975..8e72fe38bdf 100644
--- a/sys/arch/mips64/mips64/lcore_ddb.S
+++ b/sys/arch/mips64/mips64/lcore_ddb.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: lcore_ddb.S,v 1.7 2004/09/27 19:16:06 pefo Exp $ */
+/* $OpenBSD: lcore_ddb.S,v 1.8 2005/12/20 07:06:26 miod Exp $ */
/*
* Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -46,17 +46,17 @@ LEAF(kdbpeekd, 0)
li v0, KT_DDBERR
and v1, a0, 7 # unaligned ?
bne v1, zero, 1f
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
ld v0, (a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
1:
LDHI v0, 0(a0)
LDLO v0, 7(a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpeekd)
#endif
@@ -65,17 +65,17 @@ LEAF(kdbpeek, 0)
li v0, KT_DDBERR
and v1, a0, 3 # unaligned ?
bne v1, zero, 1f
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
lw v0, (a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
1:
LWHI v0, 0(a0)
LWLO v0, 3(a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpeek)
LEAF(kdbpeekw, 0)
@@ -83,25 +83,25 @@ LEAF(kdbpeekw, 0)
li v0, KT_DDBERR
and v1, a0, 1 # unaligned ?
bne v1, zero, 1f
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
lh v0, (a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
1:
li v0, -1 # error!
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpeekw)
LEAF(kdbpeekb, 0)
PTR_L t0, curprocpaddr
li v0, KT_DDBERR
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
lb v0, 0(a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpeekb)
.globl kt_ddberr
@@ -115,17 +115,17 @@ LEAF(kdbpoked, 0)
li v0, KT_DDBERR
and v1, a0, 7 # unaligned ?
bne v1, zero, 1f
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
sd a1, (a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
1:
SDHI a1, 0(a0)
SDLO a1, 7(a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpoked)
#endif
@@ -135,17 +135,17 @@ LEAF(kdbpoke, 0)
li v0, KT_DDBERR
and v1, a0, 3 # unaligned ?
bne v1, zero, 1f
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
sw a1, (a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
1:
SWHI a1, 0(a0)
SWLO a1, 3(a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpoke)
LEAF(kdbpokew, 0)
@@ -153,24 +153,24 @@ LEAF(kdbpokew, 0)
li v0, KT_DDBERR
and v1, a0, 1 # unaligned ?
bne v1, zero, 1f
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
sh a1, (a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
1:
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpokew)
LEAF(kdbpokeb, 0)
PTR_L t0, curprocpaddr
li v0, KT_DDBERR
- sw v0, U_PCB_ONFAULT(t0)
+ sw v0, PCB_ONFAULT(t0)
sb a1, 0(a0)
jr ra
- sw zero, U_PCB_ONFAULT(t0)
+ sw zero, PCB_ONFAULT(t0)
END(kdbpokeb)
LEAF(Debugger, 0)
diff --git a/sys/arch/mips64/mips64/lcore_float.S b/sys/arch/mips64/mips64/lcore_float.S
index 07a36a6eb41..05835b0506a 100644
--- a/sys/arch/mips64/mips64/lcore_float.S
+++ b/sys/arch/mips64/mips64/lcore_float.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: lcore_float.S,v 1.10 2004/11/08 20:55:45 miod Exp $ */
+/* $OpenBSD: lcore_float.S,v 1.11 2005/12/20 07:06:26 miod Exp $ */
/*
* Copyright (c) 2001-2003 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -76,83 +76,83 @@ LEAF(MipsSwitchFPState, 0)
cfc1 t0, FPC_CSR # stall til FP done
cfc1 t0, FPC_CSR # now get status
li t3, ~SR_COP_1_BIT
- REG_L t2, U_PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
- REG_S t0, U_PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
+ REG_L t2, PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
+ REG_S t0, PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
and t2, t2, t3 # clear COP_1 enable bit
- REG_S t2, U_PCB_REGS+(PS * REGSZ)(a0) # save new status register
+ REG_S t2, PCB_REGS+(PS * REGSZ)(a0) # save new status register
/*
* Save the floating point registers.
*/
- sdc1 $f0, U_PCB_FPREGS+(0 * REGSZ)(a0)
- sdc1 $f1, U_PCB_FPREGS+(1 * REGSZ)(a0)
- sdc1 $f2, U_PCB_FPREGS+(2 * REGSZ)(a0)
- sdc1 $f3, U_PCB_FPREGS+(3 * REGSZ)(a0)
- sdc1 $f4, U_PCB_FPREGS+(4 * REGSZ)(a0)
- sdc1 $f5, U_PCB_FPREGS+(5 * REGSZ)(a0)
- sdc1 $f6, U_PCB_FPREGS+(6 * REGSZ)(a0)
- sdc1 $f7, U_PCB_FPREGS+(7 * REGSZ)(a0)
- sdc1 $f8, U_PCB_FPREGS+(8 * REGSZ)(a0)
- sdc1 $f9, U_PCB_FPREGS+(9 * REGSZ)(a0)
- sdc1 $f10, U_PCB_FPREGS+(10 * REGSZ)(a0)
- sdc1 $f11, U_PCB_FPREGS+(11 * REGSZ)(a0)
- sdc1 $f12, U_PCB_FPREGS+(12 * REGSZ)(a0)
- sdc1 $f13, U_PCB_FPREGS+(13 * REGSZ)(a0)
- sdc1 $f14, U_PCB_FPREGS+(14 * REGSZ)(a0)
- sdc1 $f15, U_PCB_FPREGS+(15 * REGSZ)(a0)
- sdc1 $f16, U_PCB_FPREGS+(16 * REGSZ)(a0)
- sdc1 $f17, U_PCB_FPREGS+(17 * REGSZ)(a0)
- sdc1 $f18, U_PCB_FPREGS+(18 * REGSZ)(a0)
- sdc1 $f19, U_PCB_FPREGS+(19 * REGSZ)(a0)
- sdc1 $f20, U_PCB_FPREGS+(20 * REGSZ)(a0)
- sdc1 $f21, U_PCB_FPREGS+(21 * REGSZ)(a0)
- sdc1 $f22, U_PCB_FPREGS+(22 * REGSZ)(a0)
- sdc1 $f23, U_PCB_FPREGS+(23 * REGSZ)(a0)
- sdc1 $f24, U_PCB_FPREGS+(24 * REGSZ)(a0)
- sdc1 $f25, U_PCB_FPREGS+(25 * REGSZ)(a0)
- sdc1 $f26, U_PCB_FPREGS+(26 * REGSZ)(a0)
- sdc1 $f27, U_PCB_FPREGS+(27 * REGSZ)(a0)
- sdc1 $f28, U_PCB_FPREGS+(28 * REGSZ)(a0)
- sdc1 $f29, U_PCB_FPREGS+(29 * REGSZ)(a0)
- sdc1 $f30, U_PCB_FPREGS+(30 * REGSZ)(a0)
- sdc1 $f31, U_PCB_FPREGS+(31 * REGSZ)(a0)
+ sdc1 $f0, PCB_FPREGS+(0 * REGSZ)(a0)
+ sdc1 $f1, PCB_FPREGS+(1 * REGSZ)(a0)
+ sdc1 $f2, PCB_FPREGS+(2 * REGSZ)(a0)
+ sdc1 $f3, PCB_FPREGS+(3 * REGSZ)(a0)
+ sdc1 $f4, PCB_FPREGS+(4 * REGSZ)(a0)
+ sdc1 $f5, PCB_FPREGS+(5 * REGSZ)(a0)
+ sdc1 $f6, PCB_FPREGS+(6 * REGSZ)(a0)
+ sdc1 $f7, PCB_FPREGS+(7 * REGSZ)(a0)
+ sdc1 $f8, PCB_FPREGS+(8 * REGSZ)(a0)
+ sdc1 $f9, PCB_FPREGS+(9 * REGSZ)(a0)
+ sdc1 $f10, PCB_FPREGS+(10 * REGSZ)(a0)
+ sdc1 $f11, PCB_FPREGS+(11 * REGSZ)(a0)
+ sdc1 $f12, PCB_FPREGS+(12 * REGSZ)(a0)
+ sdc1 $f13, PCB_FPREGS+(13 * REGSZ)(a0)
+ sdc1 $f14, PCB_FPREGS+(14 * REGSZ)(a0)
+ sdc1 $f15, PCB_FPREGS+(15 * REGSZ)(a0)
+ sdc1 $f16, PCB_FPREGS+(16 * REGSZ)(a0)
+ sdc1 $f17, PCB_FPREGS+(17 * REGSZ)(a0)
+ sdc1 $f18, PCB_FPREGS+(18 * REGSZ)(a0)
+ sdc1 $f19, PCB_FPREGS+(19 * REGSZ)(a0)
+ sdc1 $f20, PCB_FPREGS+(20 * REGSZ)(a0)
+ sdc1 $f21, PCB_FPREGS+(21 * REGSZ)(a0)
+ sdc1 $f22, PCB_FPREGS+(22 * REGSZ)(a0)
+ sdc1 $f23, PCB_FPREGS+(23 * REGSZ)(a0)
+ sdc1 $f24, PCB_FPREGS+(24 * REGSZ)(a0)
+ sdc1 $f25, PCB_FPREGS+(25 * REGSZ)(a0)
+ sdc1 $f26, PCB_FPREGS+(26 * REGSZ)(a0)
+ sdc1 $f27, PCB_FPREGS+(27 * REGSZ)(a0)
+ sdc1 $f28, PCB_FPREGS+(28 * REGSZ)(a0)
+ sdc1 $f29, PCB_FPREGS+(29 * REGSZ)(a0)
+ sdc1 $f30, PCB_FPREGS+(30 * REGSZ)(a0)
+ sdc1 $f31, PCB_FPREGS+(31 * REGSZ)(a0)
1:
/*
* Restore the floating point registers.
*/
- REG_L t0, U_PCB_FPREGS+(32 * REGSZ)(a1) # get status register
- ldc1 $f0, U_PCB_FPREGS+(0 * REGSZ)(a1)
- ldc1 $f1, U_PCB_FPREGS+(1 * REGSZ)(a1)
- ldc1 $f2, U_PCB_FPREGS+(2 * REGSZ)(a1)
- ldc1 $f3, U_PCB_FPREGS+(3 * REGSZ)(a1)
- ldc1 $f4, U_PCB_FPREGS+(4 * REGSZ)(a1)
- ldc1 $f5, U_PCB_FPREGS+(5 * REGSZ)(a1)
- ldc1 $f6, U_PCB_FPREGS+(6 * REGSZ)(a1)
- ldc1 $f7, U_PCB_FPREGS+(7 * REGSZ)(a1)
- ldc1 $f8, U_PCB_FPREGS+(8 * REGSZ)(a1)
- ldc1 $f9, U_PCB_FPREGS+(9 * REGSZ)(a1)
- ldc1 $f10, U_PCB_FPREGS+(10 * REGSZ)(a1)
- ldc1 $f11, U_PCB_FPREGS+(11 * REGSZ)(a1)
- ldc1 $f12, U_PCB_FPREGS+(12 * REGSZ)(a1)
- ldc1 $f13, U_PCB_FPREGS+(13 * REGSZ)(a1)
- ldc1 $f14, U_PCB_FPREGS+(14 * REGSZ)(a1)
- ldc1 $f15, U_PCB_FPREGS+(15 * REGSZ)(a1)
- ldc1 $f16, U_PCB_FPREGS+(16 * REGSZ)(a1)
- ldc1 $f17, U_PCB_FPREGS+(17 * REGSZ)(a1)
- ldc1 $f18, U_PCB_FPREGS+(18 * REGSZ)(a1)
- ldc1 $f19, U_PCB_FPREGS+(19 * REGSZ)(a1)
- ldc1 $f20, U_PCB_FPREGS+(20 * REGSZ)(a1)
- ldc1 $f21, U_PCB_FPREGS+(21 * REGSZ)(a1)
- ldc1 $f22, U_PCB_FPREGS+(22 * REGSZ)(a1)
- ldc1 $f23, U_PCB_FPREGS+(23 * REGSZ)(a1)
- ldc1 $f24, U_PCB_FPREGS+(24 * REGSZ)(a1)
- ldc1 $f25, U_PCB_FPREGS+(25 * REGSZ)(a1)
- ldc1 $f26, U_PCB_FPREGS+(26 * REGSZ)(a1)
- ldc1 $f27, U_PCB_FPREGS+(27 * REGSZ)(a1)
- ldc1 $f28, U_PCB_FPREGS+(28 * REGSZ)(a1)
- ldc1 $f29, U_PCB_FPREGS+(29 * REGSZ)(a1)
- ldc1 $f30, U_PCB_FPREGS+(30 * REGSZ)(a1)
- ldc1 $f31, U_PCB_FPREGS+(31 * REGSZ)(a1)
+ REG_L t0, PCB_FPREGS+(32 * REGSZ)(a1) # get status register
+ ldc1 $f0, PCB_FPREGS+(0 * REGSZ)(a1)
+ ldc1 $f1, PCB_FPREGS+(1 * REGSZ)(a1)
+ ldc1 $f2, PCB_FPREGS+(2 * REGSZ)(a1)
+ ldc1 $f3, PCB_FPREGS+(3 * REGSZ)(a1)
+ ldc1 $f4, PCB_FPREGS+(4 * REGSZ)(a1)
+ ldc1 $f5, PCB_FPREGS+(5 * REGSZ)(a1)
+ ldc1 $f6, PCB_FPREGS+(6 * REGSZ)(a1)
+ ldc1 $f7, PCB_FPREGS+(7 * REGSZ)(a1)
+ ldc1 $f8, PCB_FPREGS+(8 * REGSZ)(a1)
+ ldc1 $f9, PCB_FPREGS+(9 * REGSZ)(a1)
+ ldc1 $f10, PCB_FPREGS+(10 * REGSZ)(a1)
+ ldc1 $f11, PCB_FPREGS+(11 * REGSZ)(a1)
+ ldc1 $f12, PCB_FPREGS+(12 * REGSZ)(a1)
+ ldc1 $f13, PCB_FPREGS+(13 * REGSZ)(a1)
+ ldc1 $f14, PCB_FPREGS+(14 * REGSZ)(a1)
+ ldc1 $f15, PCB_FPREGS+(15 * REGSZ)(a1)
+ ldc1 $f16, PCB_FPREGS+(16 * REGSZ)(a1)
+ ldc1 $f17, PCB_FPREGS+(17 * REGSZ)(a1)
+ ldc1 $f18, PCB_FPREGS+(18 * REGSZ)(a1)
+ ldc1 $f19, PCB_FPREGS+(19 * REGSZ)(a1)
+ ldc1 $f20, PCB_FPREGS+(20 * REGSZ)(a1)
+ ldc1 $f21, PCB_FPREGS+(21 * REGSZ)(a1)
+ ldc1 $f22, PCB_FPREGS+(22 * REGSZ)(a1)
+ ldc1 $f23, PCB_FPREGS+(23 * REGSZ)(a1)
+ ldc1 $f24, PCB_FPREGS+(24 * REGSZ)(a1)
+ ldc1 $f25, PCB_FPREGS+(25 * REGSZ)(a1)
+ ldc1 $f26, PCB_FPREGS+(26 * REGSZ)(a1)
+ ldc1 $f27, PCB_FPREGS+(27 * REGSZ)(a1)
+ ldc1 $f28, PCB_FPREGS+(28 * REGSZ)(a1)
+ ldc1 $f29, PCB_FPREGS+(29 * REGSZ)(a1)
+ ldc1 $f30, PCB_FPREGS+(30 * REGSZ)(a1)
+ ldc1 $f31, PCB_FPREGS+(31 * REGSZ)(a1)
and t0, t0, ~FPC_EXCEPTION_BITS
ctc1 t0, FPC_CSR
@@ -180,83 +180,83 @@ LEAF(MipsSwitchFPState16, 0)
cfc1 t0, FPC_CSR # stall til FP done
cfc1 t0, FPC_CSR # now get status
li t3, ~SR_COP_1_BIT
- REG_L t2, U_PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
- REG_S t0, U_PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
+ REG_L t2, PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
+ REG_S t0, PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
and t2, t2, t3 # clear COP_1 enable bit
- REG_S t2, U_PCB_REGS+(PS * REGSZ)(a0) # save new status register
+ REG_S t2, PCB_REGS+(PS * REGSZ)(a0) # save new status register
/*
* Save the floating point registers.
*/
- swc1 $f0, U_PCB_FPREGS+(0 * REGSZ)(a0)
- swc1 $f1, U_PCB_FPREGS+(1 * REGSZ)(a0)
- swc1 $f2, U_PCB_FPREGS+(2 * REGSZ)(a0)
- swc1 $f3, U_PCB_FPREGS+(3 * REGSZ)(a0)
- swc1 $f4, U_PCB_FPREGS+(4 * REGSZ)(a0)
- swc1 $f5, U_PCB_FPREGS+(5 * REGSZ)(a0)
- swc1 $f6, U_PCB_FPREGS+(6 * REGSZ)(a0)
- swc1 $f7, U_PCB_FPREGS+(7 * REGSZ)(a0)
- swc1 $f8, U_PCB_FPREGS+(8 * REGSZ)(a0)
- swc1 $f9, U_PCB_FPREGS+(9 * REGSZ)(a0)
- swc1 $f10, U_PCB_FPREGS+(10 * REGSZ)(a0)
- swc1 $f11, U_PCB_FPREGS+(11 * REGSZ)(a0)
- swc1 $f12, U_PCB_FPREGS+(12 * REGSZ)(a0)
- swc1 $f13, U_PCB_FPREGS+(13 * REGSZ)(a0)
- swc1 $f14, U_PCB_FPREGS+(14 * REGSZ)(a0)
- swc1 $f15, U_PCB_FPREGS+(15 * REGSZ)(a0)
- swc1 $f16, U_PCB_FPREGS+(16 * REGSZ)(a0)
- swc1 $f17, U_PCB_FPREGS+(17 * REGSZ)(a0)
- swc1 $f18, U_PCB_FPREGS+(18 * REGSZ)(a0)
- swc1 $f19, U_PCB_FPREGS+(19 * REGSZ)(a0)
- swc1 $f20, U_PCB_FPREGS+(20 * REGSZ)(a0)
- swc1 $f21, U_PCB_FPREGS+(21 * REGSZ)(a0)
- swc1 $f22, U_PCB_FPREGS+(22 * REGSZ)(a0)
- swc1 $f23, U_PCB_FPREGS+(23 * REGSZ)(a0)
- swc1 $f24, U_PCB_FPREGS+(24 * REGSZ)(a0)
- swc1 $f25, U_PCB_FPREGS+(25 * REGSZ)(a0)
- swc1 $f26, U_PCB_FPREGS+(26 * REGSZ)(a0)
- swc1 $f27, U_PCB_FPREGS+(27 * REGSZ)(a0)
- swc1 $f28, U_PCB_FPREGS+(28 * REGSZ)(a0)
- swc1 $f29, U_PCB_FPREGS+(29 * REGSZ)(a0)
- swc1 $f30, U_PCB_FPREGS+(30 * REGSZ)(a0)
- swc1 $f31, U_PCB_FPREGS+(31 * REGSZ)(a0)
+ swc1 $f0, PCB_FPREGS+(0 * REGSZ)(a0)
+ swc1 $f1, PCB_FPREGS+(1 * REGSZ)(a0)
+ swc1 $f2, PCB_FPREGS+(2 * REGSZ)(a0)
+ swc1 $f3, PCB_FPREGS+(3 * REGSZ)(a0)
+ swc1 $f4, PCB_FPREGS+(4 * REGSZ)(a0)
+ swc1 $f5, PCB_FPREGS+(5 * REGSZ)(a0)
+ swc1 $f6, PCB_FPREGS+(6 * REGSZ)(a0)
+ swc1 $f7, PCB_FPREGS+(7 * REGSZ)(a0)
+ swc1 $f8, PCB_FPREGS+(8 * REGSZ)(a0)
+ swc1 $f9, PCB_FPREGS+(9 * REGSZ)(a0)
+ swc1 $f10, PCB_FPREGS+(10 * REGSZ)(a0)
+ swc1 $f11, PCB_FPREGS+(11 * REGSZ)(a0)
+ swc1 $f12, PCB_FPREGS+(12 * REGSZ)(a0)
+ swc1 $f13, PCB_FPREGS+(13 * REGSZ)(a0)
+ swc1 $f14, PCB_FPREGS+(14 * REGSZ)(a0)
+ swc1 $f15, PCB_FPREGS+(15 * REGSZ)(a0)
+ swc1 $f16, PCB_FPREGS+(16 * REGSZ)(a0)
+ swc1 $f17, PCB_FPREGS+(17 * REGSZ)(a0)
+ swc1 $f18, PCB_FPREGS+(18 * REGSZ)(a0)
+ swc1 $f19, PCB_FPREGS+(19 * REGSZ)(a0)
+ swc1 $f20, PCB_FPREGS+(20 * REGSZ)(a0)
+ swc1 $f21, PCB_FPREGS+(21 * REGSZ)(a0)
+ swc1 $f22, PCB_FPREGS+(22 * REGSZ)(a0)
+ swc1 $f23, PCB_FPREGS+(23 * REGSZ)(a0)
+ swc1 $f24, PCB_FPREGS+(24 * REGSZ)(a0)
+ swc1 $f25, PCB_FPREGS+(25 * REGSZ)(a0)
+ swc1 $f26, PCB_FPREGS+(26 * REGSZ)(a0)
+ swc1 $f27, PCB_FPREGS+(27 * REGSZ)(a0)
+ swc1 $f28, PCB_FPREGS+(28 * REGSZ)(a0)
+ swc1 $f29, PCB_FPREGS+(29 * REGSZ)(a0)
+ swc1 $f30, PCB_FPREGS+(30 * REGSZ)(a0)
+ swc1 $f31, PCB_FPREGS+(31 * REGSZ)(a0)
1:
/*
* Restore the floating point registers.
*/
- REG_L t0, U_PCB_FPREGS+(32 * REGSZ)(a1) # get status register
- lwc1 $f0, U_PCB_FPREGS+(0 * REGSZ)(a1)
- lwc1 $f1, U_PCB_FPREGS+(1 * REGSZ)(a1)
- lwc1 $f2, U_PCB_FPREGS+(2 * REGSZ)(a1)
- lwc1 $f3, U_PCB_FPREGS+(3 * REGSZ)(a1)
- lwc1 $f4, U_PCB_FPREGS+(4 * REGSZ)(a1)
- lwc1 $f5, U_PCB_FPREGS+(5 * REGSZ)(a1)
- lwc1 $f6, U_PCB_FPREGS+(6 * REGSZ)(a1)
- lwc1 $f7, U_PCB_FPREGS+(7 * REGSZ)(a1)
- lwc1 $f8, U_PCB_FPREGS+(8 * REGSZ)(a1)
- lwc1 $f9, U_PCB_FPREGS+(9 * REGSZ)(a1)
- lwc1 $f10, U_PCB_FPREGS+(10 * REGSZ)(a1)
- lwc1 $f11, U_PCB_FPREGS+(11 * REGSZ)(a1)
- lwc1 $f12, U_PCB_FPREGS+(12 * REGSZ)(a1)
- lwc1 $f13, U_PCB_FPREGS+(13 * REGSZ)(a1)
- lwc1 $f14, U_PCB_FPREGS+(14 * REGSZ)(a1)
- lwc1 $f15, U_PCB_FPREGS+(15 * REGSZ)(a1)
- lwc1 $f16, U_PCB_FPREGS+(16 * REGSZ)(a1)
- lwc1 $f17, U_PCB_FPREGS+(17 * REGSZ)(a1)
- lwc1 $f18, U_PCB_FPREGS+(18 * REGSZ)(a1)
- lwc1 $f19, U_PCB_FPREGS+(19 * REGSZ)(a1)
- lwc1 $f20, U_PCB_FPREGS+(20 * REGSZ)(a1)
- lwc1 $f21, U_PCB_FPREGS+(21 * REGSZ)(a1)
- lwc1 $f22, U_PCB_FPREGS+(22 * REGSZ)(a1)
- lwc1 $f23, U_PCB_FPREGS+(23 * REGSZ)(a1)
- lwc1 $f24, U_PCB_FPREGS+(24 * REGSZ)(a1)
- lwc1 $f25, U_PCB_FPREGS+(25 * REGSZ)(a1)
- lwc1 $f26, U_PCB_FPREGS+(26 * REGSZ)(a1)
- lwc1 $f27, U_PCB_FPREGS+(27 * REGSZ)(a1)
- lwc1 $f28, U_PCB_FPREGS+(28 * REGSZ)(a1)
- lwc1 $f29, U_PCB_FPREGS+(29 * REGSZ)(a1)
- lwc1 $f30, U_PCB_FPREGS+(30 * REGSZ)(a1)
- lwc1 $f31, U_PCB_FPREGS+(31 * REGSZ)(a1)
+ REG_L t0, PCB_FPREGS+(32 * REGSZ)(a1) # get status register
+ lwc1 $f0, PCB_FPREGS+(0 * REGSZ)(a1)
+ lwc1 $f1, PCB_FPREGS+(1 * REGSZ)(a1)
+ lwc1 $f2, PCB_FPREGS+(2 * REGSZ)(a1)
+ lwc1 $f3, PCB_FPREGS+(3 * REGSZ)(a1)
+ lwc1 $f4, PCB_FPREGS+(4 * REGSZ)(a1)
+ lwc1 $f5, PCB_FPREGS+(5 * REGSZ)(a1)
+ lwc1 $f6, PCB_FPREGS+(6 * REGSZ)(a1)
+ lwc1 $f7, PCB_FPREGS+(7 * REGSZ)(a1)
+ lwc1 $f8, PCB_FPREGS+(8 * REGSZ)(a1)
+ lwc1 $f9, PCB_FPREGS+(9 * REGSZ)(a1)
+ lwc1 $f10, PCB_FPREGS+(10 * REGSZ)(a1)
+ lwc1 $f11, PCB_FPREGS+(11 * REGSZ)(a1)
+ lwc1 $f12, PCB_FPREGS+(12 * REGSZ)(a1)
+ lwc1 $f13, PCB_FPREGS+(13 * REGSZ)(a1)
+ lwc1 $f14, PCB_FPREGS+(14 * REGSZ)(a1)
+ lwc1 $f15, PCB_FPREGS+(15 * REGSZ)(a1)
+ lwc1 $f16, PCB_FPREGS+(16 * REGSZ)(a1)
+ lwc1 $f17, PCB_FPREGS+(17 * REGSZ)(a1)
+ lwc1 $f18, PCB_FPREGS+(18 * REGSZ)(a1)
+ lwc1 $f19, PCB_FPREGS+(19 * REGSZ)(a1)
+ lwc1 $f20, PCB_FPREGS+(20 * REGSZ)(a1)
+ lwc1 $f21, PCB_FPREGS+(21 * REGSZ)(a1)
+ lwc1 $f22, PCB_FPREGS+(22 * REGSZ)(a1)
+ lwc1 $f23, PCB_FPREGS+(23 * REGSZ)(a1)
+ lwc1 $f24, PCB_FPREGS+(24 * REGSZ)(a1)
+ lwc1 $f25, PCB_FPREGS+(25 * REGSZ)(a1)
+ lwc1 $f26, PCB_FPREGS+(26 * REGSZ)(a1)
+ lwc1 $f27, PCB_FPREGS+(27 * REGSZ)(a1)
+ lwc1 $f28, PCB_FPREGS+(28 * REGSZ)(a1)
+ lwc1 $f29, PCB_FPREGS+(29 * REGSZ)(a1)
+ lwc1 $f30, PCB_FPREGS+(30 * REGSZ)(a1)
+ lwc1 $f31, PCB_FPREGS+(31 * REGSZ)(a1)
and t0, t0, ~FPC_EXCEPTION_BITS
ctc1 t0, FPC_CSR
@@ -296,48 +296,48 @@ LEAF(MipsSaveCurFPState, 0)
* First read out the status register to make sure that all FP operations
* have completed.
*/
- REG_L t2, U_PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
+ REG_L t2, PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
li t3, ~SR_COP_1_BIT
and t2, t2, t3 # clear COP_1 enable bit
cfc1 t0, FPC_CSR # stall til FP done
cfc1 t0, FPC_CSR # now get status
- REG_S t2, U_PCB_REGS+(PS * REGSZ)(a0) # save new status register
- REG_S t0, U_PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
+ REG_S t2, PCB_REGS+(PS * REGSZ)(a0) # save new status register
+ REG_S t0, PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
/*
* Save the floating point registers.
*/
- sdc1 $f0, U_PCB_FPREGS+(0 * REGSZ)(a0)
- sdc1 $f1, U_PCB_FPREGS+(1 * REGSZ)(a0)
- sdc1 $f2, U_PCB_FPREGS+(2 * REGSZ)(a0)
- sdc1 $f3, U_PCB_FPREGS+(3 * REGSZ)(a0)
- sdc1 $f4, U_PCB_FPREGS+(4 * REGSZ)(a0)
- sdc1 $f5, U_PCB_FPREGS+(5 * REGSZ)(a0)
- sdc1 $f6, U_PCB_FPREGS+(6 * REGSZ)(a0)
- sdc1 $f7, U_PCB_FPREGS+(7 * REGSZ)(a0)
- sdc1 $f8, U_PCB_FPREGS+(8 * REGSZ)(a0)
- sdc1 $f9, U_PCB_FPREGS+(9 * REGSZ)(a0)
- sdc1 $f10, U_PCB_FPREGS+(10 * REGSZ)(a0)
- sdc1 $f11, U_PCB_FPREGS+(11 * REGSZ)(a0)
- sdc1 $f12, U_PCB_FPREGS+(12 * REGSZ)(a0)
- sdc1 $f13, U_PCB_FPREGS+(13 * REGSZ)(a0)
- sdc1 $f14, U_PCB_FPREGS+(14 * REGSZ)(a0)
- sdc1 $f15, U_PCB_FPREGS+(15 * REGSZ)(a0)
- sdc1 $f16, U_PCB_FPREGS+(16 * REGSZ)(a0)
- sdc1 $f17, U_PCB_FPREGS+(17 * REGSZ)(a0)
- sdc1 $f18, U_PCB_FPREGS+(18 * REGSZ)(a0)
- sdc1 $f19, U_PCB_FPREGS+(19 * REGSZ)(a0)
- sdc1 $f20, U_PCB_FPREGS+(20 * REGSZ)(a0)
- sdc1 $f21, U_PCB_FPREGS+(21 * REGSZ)(a0)
- sdc1 $f22, U_PCB_FPREGS+(22 * REGSZ)(a0)
- sdc1 $f23, U_PCB_FPREGS+(23 * REGSZ)(a0)
- sdc1 $f24, U_PCB_FPREGS+(24 * REGSZ)(a0)
- sdc1 $f25, U_PCB_FPREGS+(25 * REGSZ)(a0)
- sdc1 $f26, U_PCB_FPREGS+(26 * REGSZ)(a0)
- sdc1 $f27, U_PCB_FPREGS+(27 * REGSZ)(a0)
- sdc1 $f28, U_PCB_FPREGS+(28 * REGSZ)(a0)
- sdc1 $f29, U_PCB_FPREGS+(29 * REGSZ)(a0)
- sdc1 $f30, U_PCB_FPREGS+(30 * REGSZ)(a0)
- sdc1 $f31, U_PCB_FPREGS+(31 * REGSZ)(a0)
+ sdc1 $f0, PCB_FPREGS+(0 * REGSZ)(a0)
+ sdc1 $f1, PCB_FPREGS+(1 * REGSZ)(a0)
+ sdc1 $f2, PCB_FPREGS+(2 * REGSZ)(a0)
+ sdc1 $f3, PCB_FPREGS+(3 * REGSZ)(a0)
+ sdc1 $f4, PCB_FPREGS+(4 * REGSZ)(a0)
+ sdc1 $f5, PCB_FPREGS+(5 * REGSZ)(a0)
+ sdc1 $f6, PCB_FPREGS+(6 * REGSZ)(a0)
+ sdc1 $f7, PCB_FPREGS+(7 * REGSZ)(a0)
+ sdc1 $f8, PCB_FPREGS+(8 * REGSZ)(a0)
+ sdc1 $f9, PCB_FPREGS+(9 * REGSZ)(a0)
+ sdc1 $f10, PCB_FPREGS+(10 * REGSZ)(a0)
+ sdc1 $f11, PCB_FPREGS+(11 * REGSZ)(a0)
+ sdc1 $f12, PCB_FPREGS+(12 * REGSZ)(a0)
+ sdc1 $f13, PCB_FPREGS+(13 * REGSZ)(a0)
+ sdc1 $f14, PCB_FPREGS+(14 * REGSZ)(a0)
+ sdc1 $f15, PCB_FPREGS+(15 * REGSZ)(a0)
+ sdc1 $f16, PCB_FPREGS+(16 * REGSZ)(a0)
+ sdc1 $f17, PCB_FPREGS+(17 * REGSZ)(a0)
+ sdc1 $f18, PCB_FPREGS+(18 * REGSZ)(a0)
+ sdc1 $f19, PCB_FPREGS+(19 * REGSZ)(a0)
+ sdc1 $f20, PCB_FPREGS+(20 * REGSZ)(a0)
+ sdc1 $f21, PCB_FPREGS+(21 * REGSZ)(a0)
+ sdc1 $f22, PCB_FPREGS+(22 * REGSZ)(a0)
+ sdc1 $f23, PCB_FPREGS+(23 * REGSZ)(a0)
+ sdc1 $f24, PCB_FPREGS+(24 * REGSZ)(a0)
+ sdc1 $f25, PCB_FPREGS+(25 * REGSZ)(a0)
+ sdc1 $f26, PCB_FPREGS+(26 * REGSZ)(a0)
+ sdc1 $f27, PCB_FPREGS+(27 * REGSZ)(a0)
+ sdc1 $f28, PCB_FPREGS+(28 * REGSZ)(a0)
+ sdc1 $f29, PCB_FPREGS+(29 * REGSZ)(a0)
+ sdc1 $f30, PCB_FPREGS+(30 * REGSZ)(a0)
+ sdc1 $f31, PCB_FPREGS+(31 * REGSZ)(a0)
mtc0 t1, COP_0_STATUS_REG # Restore the status register.
ITLBNOPFIX
@@ -356,48 +356,48 @@ LEAF(MipsSaveCurFPState16, 0)
* First read out the status register to make sure that all FP operations
* have completed.
*/
- REG_L t2, U_PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
+ REG_L t2, PCB_REGS+(PS * REGSZ)(a0) # get CPU status register
li t3, ~SR_COP_1_BIT
and t2, t2, t3 # clear COP_1 enable bit
cfc1 t0, FPC_CSR # stall til FP done
cfc1 t0, FPC_CSR # now get status
- REG_S t2, U_PCB_REGS+(PS * REGSZ)(a0) # save new status register
- REG_S t0, U_PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
+ REG_S t2, PCB_REGS+(PS * REGSZ)(a0) # save new status register
+ REG_S t0, PCB_FPREGS+(32 * REGSZ)(a0) # save FP status
/*
* Save the floating point registers.
*/
- swc1 $f0, U_PCB_FPREGS+(0 * REGSZ)(a0)
- swc1 $f1, U_PCB_FPREGS+(1 * REGSZ)(a0)
- swc1 $f2, U_PCB_FPREGS+(2 * REGSZ)(a0)
- swc1 $f3, U_PCB_FPREGS+(3 * REGSZ)(a0)
- swc1 $f4, U_PCB_FPREGS+(4 * REGSZ)(a0)
- swc1 $f5, U_PCB_FPREGS+(5 * REGSZ)(a0)
- swc1 $f6, U_PCB_FPREGS+(6 * REGSZ)(a0)
- swc1 $f7, U_PCB_FPREGS+(7 * REGSZ)(a0)
- swc1 $f8, U_PCB_FPREGS+(8 * REGSZ)(a0)
- swc1 $f9, U_PCB_FPREGS+(9 * REGSZ)(a0)
- swc1 $f10, U_PCB_FPREGS+(10 * REGSZ)(a0)
- swc1 $f11, U_PCB_FPREGS+(11 * REGSZ)(a0)
- swc1 $f12, U_PCB_FPREGS+(12 * REGSZ)(a0)
- swc1 $f13, U_PCB_FPREGS+(13 * REGSZ)(a0)
- swc1 $f14, U_PCB_FPREGS+(14 * REGSZ)(a0)
- swc1 $f15, U_PCB_FPREGS+(15 * REGSZ)(a0)
- swc1 $f16, U_PCB_FPREGS+(16 * REGSZ)(a0)
- swc1 $f17, U_PCB_FPREGS+(17 * REGSZ)(a0)
- swc1 $f18, U_PCB_FPREGS+(18 * REGSZ)(a0)
- swc1 $f19, U_PCB_FPREGS+(19 * REGSZ)(a0)
- swc1 $f20, U_PCB_FPREGS+(20 * REGSZ)(a0)
- swc1 $f21, U_PCB_FPREGS+(21 * REGSZ)(a0)
- swc1 $f22, U_PCB_FPREGS+(22 * REGSZ)(a0)
- swc1 $f23, U_PCB_FPREGS+(23 * REGSZ)(a0)
- swc1 $f24, U_PCB_FPREGS+(24 * REGSZ)(a0)
- swc1 $f25, U_PCB_FPREGS+(25 * REGSZ)(a0)
- swc1 $f26, U_PCB_FPREGS+(26 * REGSZ)(a0)
- swc1 $f27, U_PCB_FPREGS+(27 * REGSZ)(a0)
- swc1 $f28, U_PCB_FPREGS+(28 * REGSZ)(a0)
- swc1 $f29, U_PCB_FPREGS+(29 * REGSZ)(a0)
- swc1 $f30, U_PCB_FPREGS+(30 * REGSZ)(a0)
- swc1 $f31, U_PCB_FPREGS+(31 * REGSZ)(a0)
+ swc1 $f0, PCB_FPREGS+(0 * REGSZ)(a0)
+ swc1 $f1, PCB_FPREGS+(1 * REGSZ)(a0)
+ swc1 $f2, PCB_FPREGS+(2 * REGSZ)(a0)
+ swc1 $f3, PCB_FPREGS+(3 * REGSZ)(a0)
+ swc1 $f4, PCB_FPREGS+(4 * REGSZ)(a0)
+ swc1 $f5, PCB_FPREGS+(5 * REGSZ)(a0)
+ swc1 $f6, PCB_FPREGS+(6 * REGSZ)(a0)
+ swc1 $f7, PCB_FPREGS+(7 * REGSZ)(a0)
+ swc1 $f8, PCB_FPREGS+(8 * REGSZ)(a0)
+ swc1 $f9, PCB_FPREGS+(9 * REGSZ)(a0)
+ swc1 $f10, PCB_FPREGS+(10 * REGSZ)(a0)
+ swc1 $f11, PCB_FPREGS+(11 * REGSZ)(a0)
+ swc1 $f12, PCB_FPREGS+(12 * REGSZ)(a0)
+ swc1 $f13, PCB_FPREGS+(13 * REGSZ)(a0)
+ swc1 $f14, PCB_FPREGS+(14 * REGSZ)(a0)
+ swc1 $f15, PCB_FPREGS+(15 * REGSZ)(a0)
+ swc1 $f16, PCB_FPREGS+(16 * REGSZ)(a0)
+ swc1 $f17, PCB_FPREGS+(17 * REGSZ)(a0)
+ swc1 $f18, PCB_FPREGS+(18 * REGSZ)(a0)
+ swc1 $f19, PCB_FPREGS+(19 * REGSZ)(a0)
+ swc1 $f20, PCB_FPREGS+(20 * REGSZ)(a0)
+ swc1 $f21, PCB_FPREGS+(21 * REGSZ)(a0)
+ swc1 $f22, PCB_FPREGS+(22 * REGSZ)(a0)
+ swc1 $f23, PCB_FPREGS+(23 * REGSZ)(a0)
+ swc1 $f24, PCB_FPREGS+(24 * REGSZ)(a0)
+ swc1 $f25, PCB_FPREGS+(25 * REGSZ)(a0)
+ swc1 $f26, PCB_FPREGS+(26 * REGSZ)(a0)
+ swc1 $f27, PCB_FPREGS+(27 * REGSZ)(a0)
+ swc1 $f28, PCB_FPREGS+(28 * REGSZ)(a0)
+ swc1 $f29, PCB_FPREGS+(29 * REGSZ)(a0)
+ swc1 $f30, PCB_FPREGS+(30 * REGSZ)(a0)
+ swc1 $f31, PCB_FPREGS+(31 * REGSZ)(a0)
mtc0 t1, COP_0_STATUS_REG # Restore the status register.
ITLBNOPFIX
@@ -472,7 +472,7 @@ NON_LEAF(MipsFPTrap, FRAMESZ(CF_SZ), ra)
PTR_ADDU v0, a2, 4 # v0 = next pc
2:
PTR_L a3, curprocpaddr # first arg is ptr to CPU regs
- PTR_S v0, U_PCB_REGS+(PC * REGSZ)(a3) # save new pc
+ PTR_S v0, PCB_REGS+(PC * REGSZ)(a3) # save new pc
/*
* Check to see if the instruction to be emulated is a floating-point
* instruction.
diff --git a/sys/arch/mips64/mips64/tlbhandler.S b/sys/arch/mips64/mips64/tlbhandler.S
index 095d4673f5d..13efe4d25e8 100644
--- a/sys/arch/mips64/mips64/tlbhandler.S
+++ b/sys/arch/mips64/mips64/tlbhandler.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: tlbhandler.S,v 1.11 2005/12/17 20:17:46 miod Exp $ */
+/* $OpenBSD: tlbhandler.S,v 1.12 2005/12/20 07:06:26 miod Exp $ */
/*
* Copyright (c) 1995-2004 Opsycon AB (www.opsycon.se / www.opsycon.com)
@@ -67,7 +67,7 @@ tlb_miss:
PTR_S k0, REGSZ(k1)
PTR_L k1, curprocpaddr
- PTR_L k1, U_PCB_SEGTAB(k1)
+ PTR_L k1, PCB_SEGTAB(k1)
PTR_SRL k0, k0, SEGSHIFT - LOGREGSZ
andi k0, k0, (PMAP_SEGTABSIZE - 1) << LOGREGSZ
PTR_ADDU k1, k1, k0
@@ -99,7 +99,7 @@ tlb_miss:
dmfc0 k0, COP_0_BAD_VADDR
bltz k0, _k_miss # kernel address space
PTR_SRL k0, k0, SEGSHIFT - LOGREGSZ
- PTR_L k1, U_PCB_SEGTAB(k1)
+ PTR_L k1, PCB_SEGTAB(k1)
andi k0, k0, (PMAP_SEGTABSIZE - 1) << LOGREGSZ
PTR_ADDU k1, k1, k0
PTR_L k1, 0(k1) # get pointer to page table
@@ -144,7 +144,7 @@ xtlb_miss:
beqz k1, _inv_seg # wrong if outside pm_segtab
PTR_SLL k0, k0, LOGREGSZ
PTR_L k1, curprocpaddr
- PTR_L k1, U_PCB_SEGTAB(k1)
+ PTR_L k1, PCB_SEGTAB(k1)
PTR_ADDU k1, k1, k0
PTR_L k1, 0(k1) # get pointer to page table
dmfc0 k0, COP_0_BAD_VADDR
diff --git a/sys/arch/sgi/sgi/genassym.cf b/sys/arch/sgi/sgi/genassym.cf
index bbc4815e5de..2cdfbdb3110 100644
--- a/sys/arch/sgi/sgi/genassym.cf
+++ b/sys/arch/sgi/sgi/genassym.cf
@@ -1,4 +1,4 @@
-# $OpenBSD: genassym.cf,v 1.5 2005/12/17 20:17:48 miod Exp $
+# $OpenBSD: genassym.cf,v 1.6 2005/12/20 07:06:29 miod Exp $
#
# Copyright (c) 1997 Per Fogelstrom / Opsycon AB
#
@@ -48,12 +48,12 @@ member P_WATCH_1 p_md.md_watch_1
member P_WATCH_2 p_md.md_watch_2
member P_WATCH_M p_md.md_watch_m
-struct user
-member U_PCB_REGS u_pcb.pcb_regs.zero
-member U_PCB_FPREGS u_pcb.pcb_regs.f0
-member U_PCB_CONTEXT u_pcb.pcb_context
-member U_PCB_ONFAULT u_pcb.pcb_onfault
-member U_PCB_SEGTAB u_pcb.pcb_segtab
+struct pcb
+member pcb_regs
+member PCB_FPREGS pcb_regs.f0
+member pcb_context
+member pcb_onfault
+member pcb_segtab
export VM_MIN_KERNEL_ADDRESS
export SIGFPE
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-05 00:49:30 +0000