diff options
author | Steve Murphree <smurph@cvs.openbsd.org> | 2000-01-06 03:21:45 +0000 |
---|---|---|
committer | Steve Murphree <smurph@cvs.openbsd.org> | 2000-01-06 03:21:45 +0000 |
commit | 05427f7693924705096cbb84ffb757417d35f141 (patch) | |
tree | 6bd150139cec0d1d7336e8e6fbadb576ea50a08d /sys/arch | |
parent | b349c2901026285386ff85dff9f4cae23fa52900 (diff) |
Added support for MVME177 (mc68060)
Diffstat (limited to 'sys/arch')
22 files changed, 2410 insertions, 1517 deletions
diff --git a/sys/arch/mvme68k/conf/GENERIC b/sys/arch/mvme68k/conf/GENERIC index ba6d5817228..a069a1f9621 100644 --- a/sys/arch/mvme68k/conf/GENERIC +++ b/sys/arch/mvme68k/conf/GENERIC @@ -1,18 +1,21 @@ -# $OpenBSD: GENERIC,v 1.9 1997/03/31 00:23:50 downsj Exp $ +# $OpenBSD: GENERIC,v 1.10 2000/01/06 03:21:42 smurph Exp $ machine mvme68k m68k include "../../../conf/GENERIC" -#option M68060 # support for 060 +option M68030 # support for 030 option M68040 # support for 040 +option M68060 # support for 060 option FPSP # MC68040 floating point support -option M68030 # support for 030 +option M060SP # ...and MC68060 support package +option FPU_EMULATE # FPU emulation option MVME147 # (requires M68030) option MVME162 # (requires M68040, FPSP) option MVME167 # includes 166 (requires M68040, FPSP) -#option MVME177 # (requires M68060, ...) +option MVME172 # (requires M68060, 060SP, FPSP) +option MVME177 # (requires M68060, 060SP, FPSP) option COMPAT_SUNOS option COMPAT_HPUX diff --git a/sys/arch/mvme68k/conf/Makefile.mvme68k b/sys/arch/mvme68k/conf/Makefile.mvme68k index 707250b1ecc..ae4afbc69ef 100644 --- a/sys/arch/mvme68k/conf/Makefile.mvme68k +++ b/sys/arch/mvme68k/conf/Makefile.mvme68k @@ -1,4 +1,4 @@ -# $OpenBSD: Makefile.mvme68k,v 1.9 1997/09/15 02:40:31 deraadt Exp $ +# $OpenBSD: Makefile.mvme68k,v 1.10 2000/01/06 03:21:42 smurph Exp $ # This makefile is constructed from a machine description: # config machineid @@ -33,7 +33,15 @@ MVME68K=../.. INCLUDES= -I. -I$S/arch -I$S -nostdinc CPPFLAGS= ${INCLUDES} ${IDENT} ${PARAM} -D_KERNEL -Dmvme68k CWARNFLAGS= -Werror -CFLAGS= ${DEBUG} ${COPTS} ${CWARNFLAGS} -msoft-float + +.if empty(IDENT:M-DM68060) +CMACHFLAGS= -m68020 +.else +CMACHFLAGS= -m68060 -Wa,-m68030 +.endif +CMACHFLAGS+= -msoft-float + +CFLAGS= ${DEBUG} ${CWARNFLAGS} ${COPTS} ${CMACHFLAGS} AFLAGS= -x assembler-with-cpp -traditional-cpp -D_LOCORE LINKFLAGS= -Ttext 0x10000 -z -e start STRIPFLAGS= -d @@ -61,6 +69,9 @@ LIBCOMPAT= ${COMPATLIB_PROF} ### for the Motorola 68040 Floating Point Software Product .include "$S/arch/m68k/fpsp/Makefile.inc" +### for the Motorola 68060 Support Package +.include "$S/arch/m68k/060sp/Makefile.inc" + # compile rules: rules are named ${TYPE}_${SUFFIX} where TYPE is NORMAL or # HOSTED}, and SUFFIX is the file suffix, capitalized (e.g. C for a .c file). @@ -80,7 +91,7 @@ HOSTED_C= ${HOSTCC} ${HOSTED_CFLAGS} ${HOSTED_CPPFLAGS} -c $< # ${SYSTEM_LD_HEAD} # ${SYSTEM_LD} swapxxx.o # ${SYSTEM_LD_TAIL} -SYSTEM_OBJ= locore.o ${FPSP} \ +SYSTEM_OBJ= locore.o ${FPSP} ${060SP}\ param.o ioconf.o ${OBJS} ${LIBKERN} ${LIBCOMPAT} SYSTEM_DEP= Makefile ${SYSTEM_OBJ} SYSTEM_LD_HEAD= @rm -f $@ diff --git a/sys/arch/mvme68k/dev/cl.c b/sys/arch/mvme68k/dev/cl.c index 7959032ec6b..ad34596955c 100644 --- a/sys/arch/mvme68k/dev/cl.c +++ b/sys/arch/mvme68k/dev/cl.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cl.c,v 1.17 1999/10/04 04:23:41 smurph Exp $ */ +/* $OpenBSD: cl.c,v 1.18 2000/01/06 03:21:42 smurph Exp $ */ /* * Copyright (c) 1995 Dale Rahn. All rights reserved. @@ -231,22 +231,18 @@ int clprobe(parent, self, aux) void *self; void *aux; { - /* probing onboard 166/167/187 CL-cd2400 + /* probing onboard 166/167/177/187 CL-cd2400 * should be previously configured, * we can check the value before resetting the chip */ struct clreg *cl_reg; struct confargs *ca = aux; int ret; - if (cputyp != CPU_167 && cputyp != CPU_166 -#ifdef CPU_187 - && cputyp != CPU_187 -#endif - ) + if (cputyp != CPU_167 && cputyp != CPU_166 && cputyp != CPU_177) { return 0; } - cl_reg = (struct clreg *)ca->ca_vaddr; + cl_reg = (struct clreg *)ca->ca_vaddr; #if 0 ret = !badvaddr(&cl_reg->cl_gfrcr,1); diff --git a/sys/arch/mvme68k/dev/if_ie.c b/sys/arch/mvme68k/dev/if_ie.c index 1f449c17e80..9affbebd089 100644 --- a/sys/arch/mvme68k/dev/if_ie.c +++ b/sys/arch/mvme68k/dev/if_ie.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_ie.c,v 1.10 1999/09/27 02:49:00 smurph Exp $ */ +/* $OpenBSD: if_ie.c,v 1.11 2000/01/06 03:21:42 smurph Exp $ */ /*- * Copyright (c) 1999 Steve Murphree, Jr. @@ -344,8 +344,7 @@ iematch(parent, vcf, args) { struct cfdata *cf = vcf; struct confargs *ca = args; - - return (!badvaddr(ca->ca_vaddr, 4)); + return (!badvaddr(ca->ca_vaddr, 4)); } /* @@ -493,8 +492,23 @@ ieattach(parent, self, aux) case BUS_PCCTWO: pcctwointr_establish(PCC2V_IE, &sc->sc_ih); sc->sc_pcc2 = (struct pcctworeg *)ca->ca_master; - sc->sc_pcc2->pcc2_ieirq = pri | PCC2_SC_SNOOP | - PCC2_IRQ_IEN | PCC2_IRQ_ICLR; + switch (cputyp) { +#ifdef MVME172 + case CPU_172: +#endif +#ifdef MVME177 + case CPU_177: +#endif +#if defined(MVME172) || defined(MVME177) + /* no snooping on 68060 */ + sc->sc_pcc2->pcc2_ieirq = pri | PCC2_SC_SNOOP | + PCC2_IRQ_IEN | PCC2_IRQ_ICLR; + break; +#endif + default: + sc->sc_pcc2->pcc2_ieirq = pri | PCC2_SC_SNOOP | + PCC2_IRQ_IEN | PCC2_IRQ_ICLR; + } pcctwointr_establish(PCC2V_IEFAIL, &sc->sc_failih); sc->sc_pcc2->pcc2_iefailirq = pri | PCC2_IRQ_IEN | PCC2_IRQ_ICLR; diff --git a/sys/arch/mvme68k/dev/mc.c b/sys/arch/mvme68k/dev/mc.c index 384b32e1d0b..d5ca0024c18 100644 --- a/sys/arch/mvme68k/dev/mc.c +++ b/sys/arch/mvme68k/dev/mc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: mc.c,v 1.5 1996/11/23 21:45:59 kstailey Exp $ */ +/* $OpenBSD: mc.c,v 1.6 2000/01/06 03:21:42 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -84,7 +84,7 @@ mcmatch(parent, vcf, args) struct confargs *ca = args; struct mcreg *mc = (struct mcreg *)(IIOV(ca->ca_paddr) + MC_MCCHIP_OFF); - if (cputyp != CPU_162 || badvaddr(mc, 1) || + if ((cputyp != CPU_172 && cputyp != CPU_162) || badvaddr(mc, 1) || mc->mc_chipid != MC_CHIPID) return (0); return (1); diff --git a/sys/arch/mvme68k/dev/mcreg.h b/sys/arch/mvme68k/dev/mcreg.h index a13626209f8..5b0a88e8014 100644 --- a/sys/arch/mvme68k/dev/mcreg.h +++ b/sys/arch/mvme68k/dev/mcreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mcreg.h,v 1.3 1996/04/28 11:03:24 deraadt Exp $ */ +/* $OpenBSD: mcreg.h,v 1.4 2000/01/06 03:21:42 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -35,69 +35,69 @@ * VME162 MCchip */ struct mcreg { - volatile u_char mc_chipid; - volatile u_char mc_chiprev; - volatile u_char mc_genctl; - volatile u_char mc_vecbase; - volatile u_long mc_t1cmp; - volatile u_long mc_t1count; - volatile u_long mc_t2cmp; - volatile u_long mc_t2count; - volatile u_char mc_lsbprescale; - volatile u_char mc_adjprescale; - volatile u_char mc_t2ctl; - volatile u_char mc_t1ctl; - volatile u_char mc_t4irq; - volatile u_char mc_t3irq; - volatile u_char mc_t2irq; - volatile u_char mc_t1irq; - volatile u_char mc_parity; - volatile u_char mc_zsirq; - volatile u_char mc_t4ctl; - volatile u_char mc_t3ctl; - volatile u_short mc_drambase; - volatile u_short mc_srambase; - volatile u_char mc_dramsize; - volatile u_char mc_memoptions; -#define MC_MEMOPTIONS_SRAMMASK 0x18 -#define MC_MEMOPTIONS_SRAM128K 0x00 -#define MC_MEMOPTIONS_SRAM512K 0x08 -#define MC_MEMOPTIONS_SRAM1M 0x10 -#define MC_MEMOPTIONS_SRAM2M 0x18 -#define MC_MEMOPTIONS_DRAMMASK 0x07 -#define MC_MEMOPTIONS_DRAM1M 0x00 -#define MC_MEMOPTIONS_DRAM2M 0x01 -#define MC_MEMOPTIONS_DRAM4M 0x03 -#define MC_MEMOPTIONS_DRAM4M2 0x04 -#define MC_MEMOPTIONS_DRAM8M 0x05 -#define MC_MEMOPTIONS_DRAM16M 0x07 - volatile u_char mc_sramsize; - volatile u_char mc_resv1; - volatile u_char mc_ieerr; - volatile u_char mc_resv2; - volatile u_char mc_ieirq; - volatile u_char mc_iefailirq; - volatile u_char mc_ncrerr; - volatile u_char mc_input; - volatile u_char mc_ver; - volatile u_char mc_ncrirq; - volatile u_long mc_t3cmp; - volatile u_long mc_t3count; - volatile u_long mc_t4cmp; - volatile u_long mc_t4count; - volatile u_char mc_busclock; - volatile u_char mc_promtime; - volatile u_char mc_flashctl; - volatile u_char mc_abortirq; - volatile u_char mc_resetctl; - volatile u_char mc_watchdogctl; - volatile u_char mc_watchdogtime; - volatile u_char mc_resv3; - volatile u_char mc_dramctl; - volatile u_char mc_resv4; - volatile u_char mc_mpustat; - volatile u_char mc_resv5; - volatile u_long mc_prescale; +/*0x00*/ volatile u_char mc_chipid; +/*0x01*/ volatile u_char mc_chiprev; +/*0x02*/ volatile u_char mc_genctl; +/*0x03*/ volatile u_char mc_vecbase; +/*0x04*/ volatile u_long mc_t1cmp; +/*0x08*/ volatile u_long mc_t1count; +/*0x0C*/ volatile u_long mc_t2cmp; +/*0x10*/ volatile u_long mc_t2count; +/*0x14*/ volatile u_char mc_lsbprescale; +/*0x15*/ volatile u_char mc_adjprescale; +/*0x16*/ volatile u_char mc_t2ctl; +/*0x17*/ volatile u_char mc_t1ctl; +/*0x18*/ volatile u_char mc_t4irq; +/*0x19*/ volatile u_char mc_t3irq; +/*0x1A*/ volatile u_char mc_t2irq; +/*0x1B*/ volatile u_char mc_t1irq; +/*0x1C*/ volatile u_char mc_parity; +/*0x1D*/ volatile u_char mc_zsirq; +/*0x1E*/ volatile u_char mc_t4ctl; +/*0x1F*/ volatile u_char mc_t3ctl; +/*0x20*/ volatile u_short mc_drambase; +/*0x22*/ volatile u_short mc_srambase; +/*0x24*/ volatile u_char mc_dramsize; +/*0x25*/ volatile u_char mc_memoptions; + #define MC_MEMOPTIONS_SRAMMASK 0x18 + #define MC_MEMOPTIONS_SRAM128K 0x00 + #define MC_MEMOPTIONS_SRAM512K 0x08 + #define MC_MEMOPTIONS_SRAM1M 0x10 + #define MC_MEMOPTIONS_SRAM2M 0x18 + #define MC_MEMOPTIONS_DRAMMASK 0x07 + #define MC_MEMOPTIONS_DRAM1M 0x00 + #define MC_MEMOPTIONS_DRAM2M 0x01 + #define MC_MEMOPTIONS_DRAM4M 0x03 + #define MC_MEMOPTIONS_DRAM4M2 0x04 + #define MC_MEMOPTIONS_DRAM8M 0x05 + #define MC_MEMOPTIONS_DRAM16M 0x07 +/*0x01*/ volatile u_char mc_sramsize; +/*0x01*/ volatile u_char mc_resv1; +/*0x01*/ volatile u_char mc_ieerr; +/*0x01*/ volatile u_char mc_resv2; +/*0x01*/ volatile u_char mc_ieirq; +/*0x01*/ volatile u_char mc_iefailirq; +/*0x01*/ volatile u_char mc_ncrerr; +/*0x01*/ volatile u_char mc_input; +/*0x01*/ volatile u_char mc_ver; +/*0x01*/ volatile u_char mc_ncrirq; +/*0x01*/ volatile u_long mc_t3cmp; +/*0x01*/ volatile u_long mc_t3count; +/*0x01*/ volatile u_long mc_t4cmp; +/*0x01*/ volatile u_long mc_t4count; +/*0x01*/ volatile u_char mc_busclock; +/*0x01*/ volatile u_char mc_promtime; +/*0x01*/ volatile u_char mc_flashctl; +/*0x01*/ volatile u_char mc_abortirq; +/*0x01*/ volatile u_char mc_resetctl; +/*0x01*/ volatile u_char mc_watchdogctl; +/*0x01*/ volatile u_char mc_watchdogtime; +/*0x01*/ volatile u_char mc_resv3; +/*0x01*/ volatile u_char mc_dramctl; +/*0x01*/ volatile u_char mc_resv4; +/*0x01*/ volatile u_char mc_mpustat; +/*0x01*/ volatile u_char mc_resv5; +/*0x01*/ volatile u_long mc_prescale; }; #define MC_MCCHIP_OFF 0x42000 #define MC_CHIPID 0x84 diff --git a/sys/arch/mvme68k/dev/pcctwo.c b/sys/arch/mvme68k/dev/pcctwo.c index 3d6d1e7cb43..c0da0082f53 100644 --- a/sys/arch/mvme68k/dev/pcctwo.c +++ b/sys/arch/mvme68k/dev/pcctwo.c @@ -1,5 +1,5 @@ -/* $OpenBSD: pcctwo.c,v 1.5 1996/11/23 21:46:00 kstailey Exp $ */ +/* $OpenBSD: pcctwo.c,v 1.6 2000/01/06 03:21:42 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -84,7 +84,7 @@ pcctwomatch(parent, vcf, args) struct pcctworeg *pcc2; /* the PCC2 only exists on MVME16x's except the 162, right? */ - if (cputyp == CPU_162 || cputyp == CPU_147) + if (cputyp == CPU_162 || cputyp == CPU_147 || cputyp == CPU_172) return (0); pcc2 = (struct pcctworeg *)(IIOV(ca->ca_paddr) + PCC2_PCC2CHIP_OFF); if (badvaddr(pcc2, 1) || pcc2->pcc2_chipid != PCC2_CHIPID) diff --git a/sys/arch/mvme68k/dev/siop.c b/sys/arch/mvme68k/dev/siop.c index 92e97a08edd..15b0f7eef53 100644 --- a/sys/arch/mvme68k/dev/siop.c +++ b/sys/arch/mvme68k/dev/siop.c @@ -1,4 +1,4 @@ -/* $OpenBSD: siop.c,v 1.6 1997/11/24 01:13:52 mickey Exp $ */ +/* $OpenBSD: siop.c,v 1.7 2000/01/06 03:21:42 smurph Exp $ */ /* * Copyright (c) 1994 Michael L. Hitch @@ -56,7 +56,7 @@ #include <mvme68k/dev/siopreg.h> #include <mvme68k/dev/siopvar.h> -extern u_int kvtop(); +extern u_int kvtop(); /* * SCSI delays @@ -82,8 +82,8 @@ const #include <mvme68k/dev/siop_script.out> /* default to not inhibit sync negotiation on any drive */ -u_char siop_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0 }; /* initialize, so patchable */ -u_char siop_allow_disc[8] = { 3, 3, 3, 3, 3, 3, 3, 3 }; +u_char siop_inhibit_sync[8] = { 0, 0, 0, 0, 0, 0, 0}; /* initialize, so patchable */ +u_char siop_allow_disc[8] = { 3, 3, 3, 3, 3, 3, 3, 3}; int siop_no_dma = 0; int siop_reset_delay = 250; /* delay after reset, in milleseconds */ @@ -102,14 +102,14 @@ int siop_init_wait = SCSI_INIT_WAIT; * 0x20 - panic on unhandled exceptions * 0x100 - disconnect/reselect */ -int siop_debug = 0; -int siopsync_debug = 0; -int siopdma_hits = 0; -int siopdma_misses = 0; -int siopchain_ints = 0; -int siopstarts = 0; -int siopints = 0; -int siopphmm = 0; +int siop_debug = 0; +int siopsync_debug = 0; +int siopdma_hits = 0; +int siopdma_misses = 0; +int siopchain_ints = 0; +int siopstarts = 0; +int siopints = 0; +int siopphmm = 0; #define SIOP_TRACE_SIZE 128 #define SIOP_TRACE(a,b,c,d) \ siop_trbuf[siop_trix] = (a); \ @@ -117,8 +117,8 @@ int siopphmm = 0; siop_trbuf[siop_trix+2] = (c); \ siop_trbuf[siop_trix+3] = (d); \ siop_trix = (siop_trix + 4) & (SIOP_TRACE_SIZE - 1); -u_char siop_trbuf[SIOP_TRACE_SIZE]; -int siop_trix; +u_char siop_trbuf[SIOP_TRACE_SIZE]; +int siop_trix; #else #define SIOP_TRACE(a,b,c,d) #endif @@ -129,7 +129,7 @@ int siop_trix; */ void siop_minphys(bp) - struct buf *bp; +struct buf *bp; { /* @@ -144,7 +144,7 @@ siop_minphys(bp) */ int siop_scsicmd(xs) - struct scsi_xfer *xs; +struct scsi_xfer *xs; { struct siop_acb *acb; struct siop_softc *sc; @@ -172,7 +172,7 @@ siop_scsicmd(xs) if (acb == NULL) { xs->error = XS_DRIVER_STUFFUP; - return(TRY_AGAIN_LATER); + return (TRY_AGAIN_LATER); } acb->flags = ACB_ACTIVE; @@ -191,14 +191,14 @@ siop_scsicmd(xs) splx(s); if (flags & SCSI_POLL || siop_no_dma) - return(siop_poll(sc, acb)); - return(SUCCESSFULLY_QUEUED); + return (siop_poll(sc, acb)); + return (SUCCESSFULLY_QUEUED); } int siop_poll(sc, acb) - struct siop_softc *sc; - struct siop_acb *acb; +struct siop_softc *sc; +struct siop_acb *acb; { siop_regmap_p rp = sc->sc_siopp; struct scsi_xfer *xs = acb->xs; @@ -214,26 +214,26 @@ siop_poll(sc, acb) to = xs->timeout / 1000; if (sc->nexus_list.tqh_first) printf("%s: siop_poll called with disconnected device\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); for (;;) { /* use cmd_wait values? */ i = 50000; spl0(); while (((istat = rp->siop_istat) & - (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) { + (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) { if (--i <= 0) { #ifdef DEBUG printf ("waiting: tgt %d cmd %02x sbcl %02x dsp %x (+%x) dcmd %x ds %x timeout %d\n", - xs->sc_link->target, acb->cmd.opcode, - rp->siop_sbcl, rp->siop_dsp, - rp->siop_dsp - sc->sc_scriptspa, - *((long *)&rp->siop_dcmd), &acb->ds, acb->xs->timeout); + xs->sc_link->target, acb->cmd.opcode, + rp->siop_sbcl, rp->siop_dsp, + rp->siop_dsp - sc->sc_scriptspa, + *((long *)&rp->siop_dcmd), &acb->ds, acb->xs->timeout); #endif i = 50000; --to; if (to <= 0) { siopreset(sc); - return(COMPLETE); + return (COMPLETE); } } delay(10); @@ -243,7 +243,7 @@ siop_poll(sc, acb) if (siop_checkintr(sc, istat, dstat, sstat0, &status)) { if (acb != sc->sc_nexus) printf("%s: siop_poll disconnected device completed\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); else if ((sc->sc_flags & SIOP_INTDEFER) == 0) { sc->sc_flags &= ~SIOP_INTSOFF; rp->siop_sien = sc->sc_sien; @@ -263,7 +263,7 @@ siop_poll(sc, acb) */ void siop_sched(sc) - struct siop_softc *sc; +struct siop_softc *sc; { struct scsi_link *slp; struct siop_acb *acb; @@ -272,17 +272,17 @@ siop_sched(sc) #ifdef DEBUG if (sc->sc_nexus) { printf("%s: siop_sched- nexus %x/%d ready %x/%d\n", - sc->sc_dev.dv_xname, sc->sc_nexus, - sc->sc_nexus->xs->sc_link->target, - sc->ready_list.tqh_first, - sc->ready_list.tqh_first->xs->sc_link->target); + sc->sc_dev.dv_xname, sc->sc_nexus, + sc->sc_nexus->xs->sc_link->target, + sc->ready_list.tqh_first, + sc->ready_list.tqh_first->xs->sc_link->target); return; } #endif for (acb = sc->ready_list.tqh_first; acb; acb = acb->chain.tqe_next) { slp = acb->xs->sc_link; i = slp->target; - if(!(sc->sc_tinfo[i].lubusy & (1 << slp->lun))) { + if (!(sc->sc_tinfo[i].lubusy & (1 << slp->lun))) { struct siop_tinfo *ti = &sc->sc_tinfo[i]; TAILQ_REMOVE(&sc->ready_list, acb, chain); @@ -297,7 +297,7 @@ siop_sched(sc) if (acb == NULL) { #ifdef DEBUGXXX printf("%s: siop_sched didn't find ready command\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); #endif return; } @@ -314,8 +314,8 @@ siop_sched(sc) void siop_scsidone(acb, stat) - struct siop_acb *acb; - int stat; +struct siop_acb *acb; +int stat; { struct scsi_xfer *xs = acb->xs; struct scsi_link *slp = xs->sc_link; @@ -345,7 +345,7 @@ siop_scsidone(acb, stat) TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); --sc->sc_active; sc->sc_tinfo[slp->target].lubusy &= - ~(1 << slp->lun); + ~(1 << slp->lun); sc->sc_tinfo[slp->target].senses++; if (sc->sc_nexus == acb) { sc->sc_nexus = NULL; @@ -360,11 +360,13 @@ siop_scsidone(acb, stat) } else { xs->resid = 0; /* XXXX */ } + #if whataboutthisone case SCSI_BUSY: xs->error = XS_BUSY; break; #endif + xs->flags |= ITSDONE; /* @@ -387,11 +389,11 @@ siop_scsidone(acb, stat) } else { register struct siop_acb *acb2; for (acb2 = sc->nexus_list.tqh_first; acb2; - acb2 = acb2->chain.tqe_next) + acb2 = acb2->chain.tqe_next) if (acb2 == acb) { TAILQ_REMOVE(&sc->nexus_list, acb, chain); sc->sc_tinfo[slp->target].lubusy - &= ~(1<<slp->lun); + &= ~(1<<slp->lun); --sc->sc_active; break; } @@ -402,7 +404,7 @@ siop_scsidone(acb, stat) --sc->sc_active; } else { printf("%s: can't find matching acb\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); #ifdef DDB /* Debugger(); */ #endif @@ -423,48 +425,46 @@ siop_scsidone(acb, stat) void siopabort(sc, rp, where) - register struct siop_softc *sc; - siop_regmap_p rp; - char *where; +register struct siop_softc *sc; +siop_regmap_p rp; +char *where; { int i; printf ("%s: abort %s: dstat %02x, sstat0 %02x sbcl %02x\n", - sc->sc_dev.dv_xname, - where, rp->siop_dstat, rp->siop_sstat0, rp->siop_sbcl); + sc->sc_dev.dv_xname, + where, rp->siop_dstat, rp->siop_sstat0, rp->siop_sbcl); if (sc->sc_active > 0) { #ifdef TODO - SET_SBIC_cmd (rp, SBIC_CMD_ABORT); - WAIT_CIP (rp); + SET_SBIC_cmd (rp, SBIC_CMD_ABORT); + WAIT_CIP (rp); - GET_SBIC_asr (rp, asr); - if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI)) - { - /* ok, get more drastic.. */ + GET_SBIC_asr (rp, asr); + if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI)) { + /* ok, get more drastic.. */ - SET_SBIC_cmd (rp, SBIC_CMD_RESET); - delay(25); - SBIC_WAIT(rp, SBIC_ASR_INT, 0); - GET_SBIC_csr (rp, csr); /* clears interrupt also */ + SET_SBIC_cmd (rp, SBIC_CMD_RESET); + delay(25); + SBIC_WAIT(rp, SBIC_ASR_INT, 0); + GET_SBIC_csr (rp, csr); /* clears interrupt also */ - return; - } + return; + } - do - { - SBIC_WAIT (rp, SBIC_ASR_INT, 0); - GET_SBIC_csr (rp, csr); - } - while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1) - && (csr != SBIC_CSR_CMD_INVALID)); + do { + SBIC_WAIT (rp, SBIC_ASR_INT, 0); + GET_SBIC_csr (rp, csr); + } + while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1) + && (csr != SBIC_CSR_CMD_INVALID)); #endif /* lets just hope it worked.. */ #ifdef fix_this for (i = 0; i < 2; ++i) { if (sc->sc_iob[i].sc_xs && &sc->sc_iob[i] != - sc->sc_cur) { + sc->sc_cur) { printf ("siopabort: cleanup!\n"); sc->sc_iob[i].sc_xs = NULL; } @@ -476,7 +476,7 @@ siopabort(sc, rp, where) void siopinitialize(sc) - struct siop_softc *sc; +struct siop_softc *sc; { /* * Need to check that scripts is on a long word boundary @@ -490,8 +490,8 @@ siopinitialize(sc) */ MALLOC(sc->sc_acb, struct siop_acb *, - sizeof(struct siop_acb) * SIOP_NACB, M_DEVBUF, M_NOWAIT); - if (sc->sc_acb == NULL) + sizeof(struct siop_acb) * SIOP_NACB, M_DEVBUF, M_NOWAIT); + if (sc->sc_acb == NULL) panic("siopinitialize: ACB malloc failed!"); sc->sc_tcp[1] = 1000 / sc->sc_clock_freq; @@ -516,7 +516,7 @@ siopinitialize(sc) void siopreset(sc) - struct siop_softc *sc; +struct siop_softc *sc; { siop_regmap_p rp; u_int i, s; @@ -572,7 +572,7 @@ siopreset(sc) delay(siop_reset_delay * 1000); printf(": version %d target %d\n", rp->siop_ctest8 >> 4, - sc->sc_link.adapter_target); + sc->sc_link.adapter_target); if ((sc->sc_flags & SIOP_ALIVE) == 0) { TAILQ_INIT(&sc->ready_list); @@ -601,9 +601,9 @@ siopreset(sc) sc->sc_flags &= ~(SIOP_INTDEFER|SIOP_INTSOFF); /* enable SCSI and DMA interrupts */ sc->sc_sien = SIOP_SIEN_M_A | SIOP_SIEN_STO | /*SIOP_SIEN_SEL |*/ SIOP_SIEN_SGE | - SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR; + SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR; sc->sc_dien = SIOP_DIEN_BF | SIOP_DIEN_ABRT | SIOP_DIEN_SIR | - /*SIOP_DIEN_WTD |*/ SIOP_DIEN_IID; + /*SIOP_DIEN_WTD |*/ SIOP_DIEN_IID; rp->siop_sien = sc->sc_sien; rp->siop_dien = sc->sc_dien; } @@ -614,13 +614,13 @@ siopreset(sc) void siop_start (sc, target, lun, cbuf, clen, buf, len) - struct siop_softc *sc; - int target; - int lun; - u_char *cbuf; - int clen; - u_char *buf; - int len; +struct siop_softc *sc; +int target; +int lun; +u_char *cbuf; +int clen; +u_char *buf; +int len; { siop_regmap_p rp = sc->sc_siopp; int i; @@ -632,10 +632,10 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) #ifdef DEBUG if (siop_debug & 0x100 && rp->siop_sbcl & SIOP_BSY) { printf ("ACK! siop was busy: rp %x script %x dsa %x active %d\n", - rp, &scripts, &acb->ds, sc->sc_active); + rp, &scripts, &acb->ds, sc->sc_active); printf ("istat %02x sfbr %02x lcrc %02x sien %02x dien %02x\n", - rp->siop_istat, rp->siop_sfbr, rp->siop_lcrc, - rp->siop_sien, rp->siop_dien); + rp->siop_istat, rp->siop_sfbr, rp->siop_lcrc, + rp->siop_sien, rp->siop_dien); #ifdef DDB /*Debugger();*/ #endif @@ -643,7 +643,7 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) #endif acb->msgout[0] = MSG_IDENTIFY | lun; if (siop_allow_disc[target] & 2 || - (siop_allow_disc[target] && len == 0)) + (siop_allow_disc[target] && len == 0)) acb->msgout[0] = MSG_IDENTIFY_DR | lun; acb->status = 0; acb->stat[0] = -1; @@ -675,8 +675,7 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) if (siopsync_debug) printf ("Forcing target %d asynchronous\n", target); #endif - } - else { + } else { acb->msg[2] = -1; acb->msgout[1] = MSG_EXT_MESSAGE; acb->msgout[2] = 3; @@ -720,10 +719,9 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) #ifdef DEBUG ++siopdma_hits; #endif - } - else { + } else { dmaend = acb->ds.chain[nchain].databuf + - acb->ds.chain[nchain].datalen; + acb->ds.chain[nchain].datalen; acb->ds.chain[nchain].datalen = tcount; #ifdef DEBUG if (nchain) /* Don't count miss on first one */ @@ -737,7 +735,7 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) printf ("DMA chaining set: %d\n", nchain); for (i = 0; i < nchain; ++i) { printf (" [%d] %8x %4x\n", i, acb->ds.chain[i].databuf, - acb->ds.chain[i].datalen); + acb->ds.chain[i].datalen); } } #endif @@ -747,19 +745,21 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) dma_cachectl (cbuf, clen); if (buf != NULL && len != 0) dma_cachectl (buf, len); + #ifdef DEBUG if (siop_debug & 0x100 && rp->siop_sbcl & SIOP_BSY) { printf ("ACK! siop was busy at start: rp %x script %x dsa %x active %d\n", - rp, &scripts, &acb->ds, sc->sc_active); + rp, &scripts, &acb->ds, sc->sc_active); #ifdef DDB /*Debugger();*/ #endif } #endif + if (sc->nexus_list.tqh_first == NULL) { if (rp->siop_istat & SIOP_ISTAT_CON) printf("%s: siop_select while connected?\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); rp->siop_temp = 0; rp->siop_sbcl = sc->sc_sync[target].sbcl; rp->siop_dsa = kvtop(&acb->ds); @@ -769,8 +769,7 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) if ((rp->siop_istat & SIOP_ISTAT_CON) == 0) { rp->siop_istat = SIOP_ISTAT_SIGP; SIOP_TRACE('s',2,0,0); - } - else { + } else { SIOP_TRACE('s',3,rp->siop_istat,0); } } @@ -785,16 +784,16 @@ siop_start (sc, target, lun, cbuf, clen, buf, len) int siop_checkintr(sc, istat, dstat, sstat0, status) - struct siop_softc *sc; - u_char istat; - u_char dstat; - u_char sstat0; - int *status; +struct siop_softc *sc; +u_char istat; +u_char dstat; +u_char sstat0; +int *status; { siop_regmap_p rp = sc->sc_siopp; struct siop_acb *acb = sc->sc_nexus; - int target; - int dfifo, dbc, sstat1; + int target; + int dfifo, dbc, sstat1; dfifo = rp->siop_dfifo; dbc = rp->siop_dbc0; @@ -809,19 +808,19 @@ siop_checkintr(sc, istat, dstat, sstat0, status) if (siop_debug & 0x100) { DCIAS(&acb->stat[0]); /* XXX */ printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", - istat, dstat, sstat0, rp->siop_dsps, rp->siop_sbcl, acb->stat[0], acb->msg[0]); + istat, dstat, sstat0, rp->siop_dsps, rp->siop_sbcl, acb->stat[0], acb->msg[0]); printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n", - acb->msg[0], acb->msg[1], acb->msg[2], - acb->msg[3], acb->msg[4], acb->msg[5]); + acb->msg[0], acb->msg[1], acb->msg[2], + acb->msg[3], acb->msg[4], acb->msg[5]); } #endif if (rp->siop_dsp && (rp->siop_dsp < sc->sc_scriptspa || - rp->siop_dsp >= sc->sc_scriptspa + sizeof(scripts))) { + rp->siop_dsp >= sc->sc_scriptspa + sizeof(scripts))) { printf ("%s: dsp not within script dsp %x scripts %x:%x", - sc->sc_dev.dv_xname, rp->siop_dsp, sc->sc_scriptspa, - sc->sc_scriptspa + sizeof(scripts)); + sc->sc_dev.dv_xname, rp->siop_dsp, sc->sc_scriptspa, + sc->sc_scriptspa + sizeof(scripts)); printf(" istat %x dstat %x sstat0 %x\n", - istat, dstat, sstat0); + istat, dstat, sstat0); Debugger(); } #endif @@ -831,7 +830,7 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (rp->siop_dsa != kvtop(&acb->ds)) { printf ("siop: invalid dsa: %x %x\n", rp->siop_dsa, - kvtop(&acb->ds)); + kvtop(&acb->ds)); panic("*** siop DSA invalid ***"); } #endif @@ -840,21 +839,21 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (siopsync_debug) printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n", - acb->msg[0], acb->msg[1], acb->msg[2], - acb->msg[3], acb->msg[4], acb->msg[5]); + acb->msg[0], acb->msg[1], acb->msg[2], + acb->msg[3], acb->msg[4], acb->msg[5]); #endif if (acb->msg[1] == 0xff) printf ("%s: target %d ignored sync request\n", - sc->sc_dev.dv_xname, target); + sc->sc_dev.dv_xname, target); else if (acb->msg[1] == MSG_REJECT) printf ("%s: target %d rejected sync request\n", - sc->sc_dev.dv_xname, target); + sc->sc_dev.dv_xname, target); sc->sc_sync[target].state = SYNC_DONE; sc->sc_sync[target].sxfer = 0; sc->sc_sync[target].sbcl = 0; if (acb->msg[2] == 3 && - acb->msg[3] == MSG_SYNC_REQ && - acb->msg[5] != 0) { + acb->msg[3] == MSG_SYNC_REQ && + acb->msg[5] != 0) { #ifdef MAXTOR_KLUDGE /* * Kludge for my Maxtor XT8580S @@ -868,18 +867,18 @@ siop_checkintr(sc, istat, dstat, sstat0, status) if (acb->msg[4] && acb->msg[4] < 100 / 4) { #ifdef DEBUG printf ("%d: target %d wanted %dns period\n", - sc->sc_dev.dv_xname, target, - acb->msg[4] * 4); + sc->sc_dev.dv_xname, target, + acb->msg[4] * 4); #endif if (acb->msg[4] == 50 / 4) acb->msg[4] = 208 / 4; else - acb->msg[4] = 100 / 4; + acb->msg[4] = 100 / 4; } #endif /* MAXTOR_KLUDGE */ printf ("%s: target %d now synchronous, period=%dns, offset=%d\n", - sc->sc_dev.dv_xname, target, - acb->msg[4] * 4, acb->msg[5]); + sc->sc_dev.dv_xname, target, + acb->msg[4] * 4, acb->msg[5]); scsi_period_to_siop (sc, target); } } @@ -888,14 +887,14 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (rp->siop_sbcl & SIOP_BSY) { /*printf ("ACK! siop was busy at end: rp %x script %x dsa %x\n", - rp, &scripts, &acb->ds);*/ + rp, &scripts, &acb->ds);*/ #ifdef DDB /*Debugger();*/ #endif } if (acb->msg[0] != 0x00) printf("%s: message was not COMMAND COMPLETE: %x\n", - sc->sc_dev.dv_xname, acb->msg[0]); + sc->sc_dev.dv_xname, acb->msg[0]); #endif if (sc->nexus_list.tqh_first) rp->siop_dcntl |= SIOP_DCNTL_STD; @@ -906,7 +905,7 @@ siop_checkintr(sc, istat, dstat, sstat0, status) ++siopphmm; if (acb == NULL) printf("%s: Phase mismatch with no active command?\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); #endif if (acb->iob_len) { int adjust; @@ -922,13 +921,13 @@ siop_checkintr(sc, istat, dstat, sstat0, status) if (siop_debug & 0x100) { int i; printf ("Phase mismatch: curbuf %x curlen %x dfifo %x dbc %x sstat1 %x adjust %x sbcl %x starts %d acb %x\n", - acb->iob_curbuf, acb->iob_curlen, dfifo, - dbc, sstat1, adjust, rp->siop_sbcl, siopstarts, acb); + acb->iob_curbuf, acb->iob_curlen, dfifo, + dbc, sstat1, adjust, rp->siop_sbcl, siopstarts, acb); if (acb->ds.chain[1].datalen) { for (i = 0; acb->ds.chain[i].datalen; ++i) printf("chain[%d] addr %x len %x\n", - i, acb->ds.chain[i].databuf, - acb->ds.chain[i].datalen); + i, acb->ds.chain[i].databuf, + acb->ds.chain[i].datalen); } } #endif @@ -938,28 +937,28 @@ siop_checkintr(sc, istat, dstat, sstat0, status) SIOP_TRACE('m',rp->siop_sbcl,(rp->siop_dsp>>8),rp->siop_dsp); if (siop_debug & 9) printf ("Phase mismatch: %x dsp +%x dcmd %x\n", - rp->siop_sbcl, - rp->siop_dsp - sc->sc_scriptspa, - *((long *)&rp->siop_dcmd)); + rp->siop_sbcl, + rp->siop_dsp - sc->sc_scriptspa, + *((long *)&rp->siop_dcmd)); #endif if ((rp->siop_sbcl & SIOP_REQ) == 0) { printf ("Phase mismatch: REQ not asserted! %02x dsp %x\n", - rp->siop_sbcl, rp->siop_dsp); + rp->siop_sbcl, rp->siop_dsp); #ifdef DEBUG Debugger(); #endif } switch (rp->siop_sbcl & 7) { - case 0: /* data out */ - case 1: /* data in */ - case 2: /* status */ - case 3: /* command */ - case 6: /* message in */ - case 7: /* message out */ - rp->siop_dsp = sc->sc_scriptspa + Ent_switch; - break; - default: - goto bad_phase; + case 0: /* data out */ + case 1: /* data in */ + case 2: /* status */ + case 3: /* command */ + case 6: /* message in */ + case 7: /* message out */ + rp->siop_dsp = sc->sc_scriptspa + Ent_switch; + break; + default: + goto bad_phase; } return 0; } @@ -967,12 +966,12 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (acb == NULL) printf("%s: Select timeout with no active command?\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); if (rp->siop_sbcl & SIOP_BSY) { printf ("ACK! siop was busy at timeout: rp %x script %x dsa %x\n", - rp, &scripts, &acb->ds); + rp, &scripts, &acb->ds); printf(" sbcl %x sdid %x istat %x dstat %x sstat0 %x\n", - rp->siop_sbcl, rp->siop_sdid, istat, dstat, sstat0); + rp->siop_sbcl, rp->siop_sdid, istat, dstat, sstat0); if (!(rp->siop_sbcl & SIOP_BSY)) { printf ("Yikes, it's not busy now!\n"); #if 0 @@ -1003,9 +1002,9 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (acb == NULL) printf("%s: Unexpected disconnect with no active command?\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); printf ("%s: target %d disconnected unexpectedly\n", - sc->sc_dev.dv_xname, target); + sc->sc_dev.dv_xname, target); #endif #if 0 siopabort (sc, rp, "siopchkintr"); @@ -1016,18 +1015,18 @@ siop_checkintr(sc, istat, dstat, sstat0, status) return 1; } if (dstat & SIOP_DSTAT_SIR && (rp->siop_dsps == 0xff01 || - rp->siop_dsps == 0xff02)) { + rp->siop_dsps == 0xff02)) { #ifdef DEBUG if (siop_debug & 0x100) printf ("%s: ID %02x disconnected TEMP %x (+%x) curbuf %x curlen %x buf %x len %x dfifo %x dbc %x sstat1 %x starts %d acb %x\n", - sc->sc_dev.dv_xname, 1 << target, rp->siop_temp, - rp->siop_temp ? rp->siop_temp - sc->sc_scriptspa : 0, - acb->iob_curbuf, acb->iob_curlen, - acb->ds.chain[0].databuf, acb->ds.chain[0].datalen, dfifo, dbc, sstat1, siopstarts, acb); + sc->sc_dev.dv_xname, 1 << target, rp->siop_temp, + rp->siop_temp ? rp->siop_temp - sc->sc_scriptspa : 0, + acb->iob_curbuf, acb->iob_curlen, + acb->ds.chain[0].databuf, acb->ds.chain[0].datalen, dfifo, dbc, sstat1, siopstarts, acb); #endif if (acb == NULL) { printf("%s: Disconnect with no active command?\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); return (0); } /* @@ -1043,8 +1042,8 @@ siop_checkintr(sc, istat, dstat, sstat0, status) if (acb->iob_curlen && acb->iob_curlen != acb->ds.chain[0].datalen) printf("%s: iob_curbuf/len already set? n %x iob %x/%x chain[0] %x/%x\n", - sc->sc_dev.dv_xname, n, acb->iob_curbuf, acb->iob_curlen, - acb->ds.chain[0].databuf, acb->ds.chain[0].datalen); + sc->sc_dev.dv_xname, n, acb->iob_curbuf, acb->iob_curlen, + acb->ds.chain[0].databuf, acb->ds.chain[0].datalen); if (n < Ent_datain) n = (n - Ent_dataout) / 16; else @@ -1059,7 +1058,7 @@ siop_checkintr(sc, istat, dstat, sstat0, status) if (siop_debug & 0x100) { printf("%s: TEMP offset %d", sc->sc_dev.dv_xname, n); printf(" curbuf %x curlen %x\n", acb->iob_curbuf, - acb->iob_curlen); + acb->iob_curlen); } #endif } @@ -1076,17 +1075,17 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (siop_debug & 0x100) printf ("%s: adjusting DMA chain\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); if (rp->siop_dsps == 0xff02) printf ("%s: ID %02x disconnected without Save Data Pointers\n", - sc->sc_dev.dv_xname, 1 << target); + sc->sc_dev.dv_xname, 1 << target); #endif for (i = 0; i < DMAMAXIO; ++i) { if (acb->ds.chain[i].datalen == 0) break; if (acb->iob_curbuf >= (long)acb->ds.chain[i].databuf && - acb->iob_curbuf < (long)(acb->ds.chain[i].databuf + - acb->ds.chain[i].datalen)) + acb->iob_curbuf < (long)(acb->ds.chain[i].databuf + + acb->ds.chain[i].datalen)) break; } if (i >= DMAMAXIO || acb->ds.chain[i].datalen == 0) @@ -1094,21 +1093,21 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (siop_debug & 0x100) printf(" chain[0]: %x/%x -> %x/%x\n", - acb->ds.chain[0].databuf, - acb->ds.chain[0].datalen, - acb->iob_curbuf, - acb->iob_curlen); + acb->ds.chain[0].databuf, + acb->ds.chain[0].datalen, + acb->iob_curbuf, + acb->iob_curlen); #endif acb->ds.chain[0].databuf = (char *)acb->iob_curbuf; acb->ds.chain[0].datalen = acb->iob_curlen; for (j = 1, ++i; i < DMAMAXIO && acb->ds.chain[i].datalen; ++i, ++j) { #ifdef DEBUG - if (siop_debug & 0x100) - printf(" chain[%d]: %x/%x -> %x/%x\n", j, - acb->ds.chain[j].databuf, - acb->ds.chain[j].datalen, - acb->ds.chain[i].databuf, - acb->ds.chain[i].datalen); + if (siop_debug & 0x100) + printf(" chain[%d]: %x/%x -> %x/%x\n", j, + acb->ds.chain[j].databuf, + acb->ds.chain[j].datalen, + acb->ds.chain[i].databuf, + acb->ds.chain[i].datalen); #endif acb->ds.chain[j].databuf = acb->ds.chain[i].databuf; acb->ds.chain[j].datalen = acb->ds.chain[i].datalen; @@ -1142,21 +1141,21 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #ifdef DEBUG if (siop_debug & 0x100) printf ("%s: target ID %02x reselected dsps %x\n", - sc->sc_dev.dv_xname, reselid, - rp->siop_dsps); + sc->sc_dev.dv_xname, reselid, + rp->siop_dsps); if ((rp->siop_sfbr & 0x80) == 0) printf("%s: Reselect message in was not identify: %x\n", - sc->sc_dev.dv_xname, rp->siop_sfbr); + sc->sc_dev.dv_xname, rp->siop_sfbr); #endif if (sc->sc_nexus) { #ifdef DEBUG if (siop_debug & 0x100) printf ("%s: reselect ID %02x w/active\n", - sc->sc_dev.dv_xname, reselid); + sc->sc_dev.dv_xname, reselid); #endif TAILQ_INSERT_HEAD(&sc->ready_list, sc->sc_nexus, chain); sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target].lubusy - &= ~(1 << sc->sc_nexus->xs->sc_link->lun); + &= ~(1 << sc->sc_nexus->xs->sc_link->lun); --sc->sc_active; } /* @@ -1164,9 +1163,9 @@ siop_checkintr(sc, istat, dstat, sstat0, status) * set sc->sc_nexus to acb */ for (acb = sc->nexus_list.tqh_first; acb; - acb = acb->chain.tqe_next) { + acb = acb->chain.tqe_next) { if (reselid != (acb->ds.scsi_addr >> 16) || - reselun != (acb->msgout[0] & 0x07)) + reselun != (acb->msgout[0] & 0x07)) continue; TAILQ_REMOVE(&sc->nexus_list, acb, chain); sc->sc_nexus = acb; @@ -1180,8 +1179,8 @@ siop_checkintr(sc, istat, dstat, sstat0, status) } if (acb == NULL) { printf("%s: target ID %02x reselect nexus_list %x\n", - sc->sc_dev.dv_xname, reselid, - sc->nexus_list.tqh_first); + sc->sc_dev.dv_xname, reselid, + sc->nexus_list.tqh_first); panic("unable to find reselecting device"); } dma_cachectl (acb, sizeof(*acb)); @@ -1195,15 +1194,15 @@ siop_checkintr(sc, istat, dstat, sstat0, status) /* reselect was interrupted (by Sig_P or select) */ #ifdef DEBUG if (siop_debug & 0x100 || - (ctest2 & SIOP_CTEST2_SIGP) == 0) - printf ("%s: reselect interrupted (Sig_P?) scntl1 %x ctest2 %x sfbr %x istat %x/%x\n", - sc->sc_dev.dv_xname, rp->siop_scntl1, - ctest2, rp->siop_sfbr, istat, rp->siop_istat); + (ctest2 & SIOP_CTEST2_SIGP) == 0) + printf ("%s: reselect interrupted (Sig_P?) scntl1 %x ctest2 %x + sfbr %x istat %x/%x\n", sc->sc_dev.dv_xname, rp->siop_scntl1, + ctest2, rp->siop_sfbr, istat, rp->siop_istat); #endif /* XXX assumes it was not select */ if (sc->sc_nexus == NULL) { printf("%s: reselect interrupted, sc_nexus == NULL\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); #if 0 siop_dump(sc); #ifdef DDB @@ -1211,7 +1210,7 @@ siop_checkintr(sc, istat, dstat, sstat0, status) #endif #endif rp->siop_dcntl |= SIOP_DCNTL_STD; - return(0); + return (0); } target = sc->sc_nexus->xs->sc_link->target; rp->siop_temp = 0; @@ -1224,11 +1223,11 @@ siop_checkintr(sc, istat, dstat, sstat0, status) if (dstat & SIOP_DSTAT_SIR && rp->siop_dsps == 0xff06) { if (acb == NULL) printf("%s: Bad message-in with no active command?\n", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); /* Unrecognized message in byte */ dma_cachectl (&acb->msg[1],1); printf ("%s: Unrecognized message in data sfbr %x msg %x sbcl %x\n", - sc->sc_dev.dv_xname, rp->siop_sfbr, acb->msg[1], rp->siop_sbcl); + sc->sc_dev.dv_xname, rp->siop_sfbr, acb->msg[1], rp->siop_sbcl); /* what should be done here? */ DCIAS(kvtop(&acb->msg[1])); rp->siop_dsp = sc->sc_scriptspa + Ent_switch; @@ -1237,7 +1236,7 @@ siop_checkintr(sc, istat, dstat, sstat0, status) if (dstat & SIOP_DSTAT_SIR && rp->siop_dsps == 0xff0a) { /* Status phase wasn't followed by message in phase? */ printf ("%s: Status phase not followed by message in phase? sbcl %x sbdl %x\n", - sc->sc_dev.dv_xname, rp->siop_sbcl, rp->siop_sbdl); + sc->sc_dev.dv_xname, rp->siop_sbcl, rp->siop_sbdl); if (rp->siop_sbcl == 0xa7) { /* It is now, just continue the script? */ rp->siop_dcntl |= SIOP_DCNTL_STD; @@ -1248,8 +1247,8 @@ siop_checkintr(sc, istat, dstat, sstat0, status) dma_cachectl (&acb->stat[0], 1); dma_cachectl (&acb->msg[0], 1); printf ("SIOP interrupt: %x sts %x msg %x %x sbcl %x\n", - rp->siop_dsps, acb->stat[0], acb->msg[0], acb->msg[1], - rp->siop_sbcl); + rp->siop_dsps, acb->stat[0], acb->msg[0], acb->msg[1], + rp->siop_sbcl); siopreset (sc); *status = -1; return 0; /* siopreset has cleaned up */ @@ -1260,7 +1259,7 @@ siop_checkintr(sc, istat, dstat, sstat0, status) printf ("SIOP: Parity Error\n"); if (dstat & SIOP_DSTAT_IID) printf ("SIOP: Invalid instruction detected\n"); -bad_phase: + bad_phase: /* * temporary panic for unhandled conditions * displays various things about the 53C710 status and registers @@ -1269,13 +1268,13 @@ bad_phase: */ printf ("siopchkintr: target %x ds %x\n", target, &acb->ds); printf ("scripts %x ds %x rp %x dsp %x dcmd %x\n", sc->sc_scriptspa, - kvtop(&acb->ds), kvtop(rp), rp->siop_dsp, - *((long *)&rp->siop_dcmd)); + kvtop(&acb->ds), kvtop(rp), rp->siop_dsp, + *((long *)&rp->siop_dcmd)); printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x " - "dsa %x sbcl %x sts %x msg %x %x sfbr %x\n", - istat, dstat, sstat0, rp->siop_dsps, rp->siop_dsa, - rp->siop_sbcl, acb->stat[0], acb->msg[0], acb->msg[1], - rp->siop_sfbr); + "dsa %x sbcl %x sts %x msg %x %x sfbr %x\n", + istat, dstat, sstat0, rp->siop_dsps, rp->siop_dsa, + rp->siop_sbcl, acb->stat[0], acb->msg[0], acb->msg[1], + rp->siop_sfbr); #ifdef DEBUG if (siop_debug & 0x20) panic("siopchkintr: **** temp ****"); @@ -1290,7 +1289,7 @@ bad_phase: void siop_select(sc) - struct siop_softc *sc; +struct siop_softc *sc; { siop_regmap_p rp; struct siop_acb *acb = sc->sc_nexus; @@ -1320,12 +1319,12 @@ siop_select(sc) #ifdef DEBUG if (siop_debug & 1) printf ("siop_select: target %x cmd %02x ds %x\n", - acb->xs->sc_link->target, acb->cmd.opcode, - &sc->sc_nexus->ds); + acb->xs->sc_link->target, acb->cmd.opcode, + &sc->sc_nexus->ds); #endif siop_start(sc, acb->xs->sc_link->target, acb->xs->sc_link->lun, - &acb->cmd, acb->clen, acb->daddr, acb->dleft); + &acb->cmd, acb->clen, acb->daddr, acb->dleft); return; } @@ -1336,7 +1335,7 @@ siop_select(sc) int siopintr (sc) - register struct siop_softc *sc; +register struct siop_softc *sc; { siop_regmap_p rp; register u_char istat, dstat, sstat0; @@ -1359,10 +1358,10 @@ siopintr (sc) #ifdef DEBUG if (siop_debug & 1) printf ("%s: intr istat %x dstat %x sstat0 %x\n", - sc->sc_dev.dv_xname, istat, dstat, sstat0); + sc->sc_dev.dv_xname, istat, dstat, sstat0); if (!sc->sc_active) { printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x status %x\n", - sc->sc_dev.dv_xname, istat, dstat, sstat0, sc->sc_nexus->stat[0]); + sc->sc_dev.dv_xname, istat, dstat, sstat0, sc->sc_nexus->stat[0]); } #endif @@ -1370,9 +1369,9 @@ siopintr (sc) if (siop_debug & 5) { DCIAS(kvtop(&sc->sc_nexus->stat[0])); printf ("%s: intr istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n", - sc->sc_dev.dv_xname, istat, dstat, sstat0, - rp->siop_dsps, rp->siop_sbcl, - sc->sc_nexus->stat[0], sc->sc_nexus->msg[0]); + sc->sc_dev.dv_xname, istat, dstat, sstat0, + rp->siop_dsps, rp->siop_sbcl, + sc->sc_nexus->stat[0], sc->sc_nexus->msg[0]); } #endif if (sc->sc_flags & SIOP_INTDEFER) { @@ -1389,11 +1388,11 @@ siopintr (sc) #if 0 if (rp->siop_sbcl & SIOP_BSY) { printf ("%s: SCSI bus busy at completion", - sc->sc_dev.dv_xname); + sc->sc_dev.dv_xname); printf(" targ %d sbcl %02x sfbr %x lcrc %02x dsp +%x\n", - sc->sc_nexus->xs->sc_link->target, - rp->siop_sbcl, rp->siop_sfbr, rp->siop_lcrc, - rp->siop_dsp - sc->sc_scriptspa); + sc->sc_nexus->xs->sc_link->target, + rp->siop_sbcl, rp->siop_sfbr, rp->siop_lcrc, + rp->siop_dsp - sc->sc_scriptspa); } #endif siop_scsidone(sc->sc_nexus, sc->sc_nexus->stat[0]); @@ -1408,7 +1407,7 @@ siopintr (sc) * */ scsi_period_to_siop (sc, target) - struct siop_softc *sc; +struct siop_softc *sc; { int period, offset, i, sxfer, sbcl; @@ -1421,14 +1420,14 @@ scsi_period_to_siop (sc, target) } if (sbcl > 3) { printf("siop_sync: unable to compute sync params for period %dns\n", - period * 4); + period * 4); /* * XXX need to pick a value we can do and renegotiate */ sxfer = sbcl = 0; } else - sxfer = (sxfer << 4) | ((offset <= SIOP_MAX_OFFSET) ? - offset : SIOP_MAX_OFFSET); + sxfer = (sxfer << 4) | ((offset <= SIOP_MAX_OFFSET) ? + offset : SIOP_MAX_OFFSET); sc->sc_sync[target].sxfer = sxfer; sc->sc_sync[target].sbcl = sbcl; #ifdef DEBUG @@ -1448,7 +1447,7 @@ siop_dump_trace() i = siop_trix; do { printf("%3d: '%c' %02x %02x %02x\n", i, siop_trbuf[i], - siop_trbuf[i + 1], siop_trbuf[i + 2], siop_trbuf[i + 3]); + siop_trbuf[i + 1], siop_trbuf[i + 2], siop_trbuf[i + 3]); i = (i + 4) & (SIOP_TRACE_SIZE - 1); } while (i != siop_trix); } @@ -1456,7 +1455,7 @@ siop_dump_trace() void siop_dump_acb(acb) - struct siop_acb *acb; +struct siop_acb *acb; { u_char *b = (u_char *) &acb->cmd; int i; @@ -1470,19 +1469,19 @@ siop_dump_acb(acb) return; } printf("(%d:%d) flags %2x clen %2d cmd ", acb->xs->sc_link->target, - acb->xs->sc_link->lun, acb->flags, acb->clen); + acb->xs->sc_link->lun, acb->flags, acb->clen); for (i = acb->clen; i; --i) printf(" %02x", *b++); printf("\n"); printf(" xs: %08x data %8x:%04x ", acb->xs, acb->xs->data, - acb->xs->datalen); + acb->xs->datalen); printf("va %8x:%04x ", acb->iob_buf, acb->iob_len); printf("cur %8x:%04x\n", acb->iob_curbuf, acb->iob_curlen); - } +} void siop_dump(sc) - struct siop_softc *sc; +struct siop_softc *sc; { struct siop_acb *acb; siop_regmap_p rp = sc->sc_siopp; @@ -1491,7 +1490,7 @@ siop_dump(sc) s = splbio(); printf("%s@%x regs %x istat %x\n", - sc->sc_dev.dv_xname, sc, rp, rp->siop_istat); + sc->sc_dev.dv_xname, sc, rp, rp->siop_istat); if (acb = sc->free_list.tqh_first) { printf("Free list:\n"); while (acb) { @@ -1520,10 +1519,10 @@ siop_dump(sc) for (i = 0; i < 8; ++i) { if (sc->sc_tinfo[i].cmds > 2) { printf("tgt %d: cmds %d disc %d senses %d lubusy %x\n", - i, sc->sc_tinfo[i].cmds, - sc->sc_tinfo[i].dconns, - sc->sc_tinfo[i].senses, - sc->sc_tinfo[i].lubusy); + i, sc->sc_tinfo[i].cmds, + sc->sc_tinfo[i].dconns, + sc->sc_tinfo[i].senses, + sc->sc_tinfo[i].lubusy); } } splx(s); diff --git a/sys/arch/mvme68k/dev/siopdma.c b/sys/arch/mvme68k/dev/siopdma.c index 452d522de76..ddbd0dd6c18 100644 --- a/sys/arch/mvme68k/dev/siopdma.c +++ b/sys/arch/mvme68k/dev/siopdma.c @@ -1,4 +1,4 @@ -/* $OpenBSD: siopdma.c,v 1.6 1997/01/28 10:53:41 deraadt Exp $ */ +/* $OpenBSD: siopdma.c,v 1.7 2000/01/06 03:21:42 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -57,11 +57,11 @@ #include <mvme68k/dev/pcctworeg.h> #endif -int afscmatch __P((struct device *, void *, void *)); -void afscattach __P((struct device *, struct device *, void *)); +int afscmatch __P((struct device *, void *, void *)); +void afscattach __P((struct device *, struct device *, void *)); -int siopintr __P((struct siop_softc *)); -int afsc_dmaintr __P((struct siop_softc *)); +int siopintr __P((struct siop_softc *)); +int afsc_dmaintr __P((struct siop_softc *)); struct scsi_adapter afsc_scsiswitch = { siop_scsicmd, @@ -87,8 +87,8 @@ struct cfdriver siop_cd = { int afscmatch(pdp, vcf, args) - struct device *pdp; - void *vcf, *args; +struct device *pdp; +void *vcf, *args; { struct cfdata *cf = vcf; struct confargs *ca = args; @@ -98,8 +98,8 @@ afscmatch(pdp, vcf, args) void afscattach(parent, self, auxp) - struct device *parent, *self; - void *auxp; +struct device *parent, *self; +void *auxp; { struct siop_softc *sc = (struct siop_softc *)self; struct confargs *ca = auxp; @@ -108,7 +108,6 @@ afscattach(parent, self, auxp) extern int cpuspeed; sc->sc_siopp = rp = ca->ca_vaddr; - /* * siop uses sc_clock_freq to define the dcntl & ctest7 reg values * (was 0x0221, but i added SIOP_CTEST7_SC0 for snooping control) @@ -116,21 +115,31 @@ afscattach(parent, self, auxp) */ sc->sc_clock_freq = cpuspeed * 2; #ifdef MVME177 - /* XXX this is a guess! */ + /* MVME177 siop clock documented as fixed 50Mhz in VME177A/HX */ if (cputyp == CPU_177) - sc->sc_clock_freq = cpuspeed; + sc->sc_clock_freq = 50; +#endif +#ifdef MVME172 + /* XXX this is a guess! Same as MVME177?*/ + if (cputyp == CPU_172) + sc->sc_clock_freq = 50; #endif - sc->sc_dcntl = SIOP_DCNTL_EA; -/*X*/ if (sc->sc_clock_freq <= 25) -/*X*/ sc->sc_dcntl |= (2 << 6); -/*X*/ else if (sc->sc_clock_freq <= 37) -/*X*/ sc->sc_dcntl |= (1 << 6); -/*X*/ else if (sc->sc_clock_freq <= 50) -/*X*/ sc->sc_dcntl |= (0 << 6); -/*X*/ else -/*X*/ sc->sc_dcntl |= (3 << 6); - - sc->sc_ctest7 = SIOP_CTEST7_SNOOP | SIOP_CTEST7_TT1; + sc->sc_dcntl = SIOP_DCNTL_EA; +/*XXX*/ if (sc->sc_clock_freq <= 25) +/*XXX*/ sc->sc_dcntl |= (2 << 6); +/*XXX*/ else if (sc->sc_clock_freq <= 37) +/*XXX*/ sc->sc_dcntl |= (1 << 6); +/*XXX*/ else if (sc->sc_clock_freq <= 50) +/*XXX*/ sc->sc_dcntl |= (0 << 6); +/*XXX*/ else +/*XXX*/ sc->sc_dcntl |= (3 << 6); + +#if defined(MVME172) || defined(MVME177) /* No Select timouts on MC68060 */ + if (cputyp == CPU_172 || cputyp == CPU_172) + sc->sc_ctest7 = SIOP_CTEST7_SNOOP | SIOP_CTEST7_TT1 | SIOP_CTEST7_STD; + else +#endif + sc->sc_ctest7 = SIOP_CTEST7_SNOOP | SIOP_CTEST7_TT1; sc->sc_link.adapter_softc = sc; sc->sc_link.adapter_target = 7; /* XXXX should ask ROM */ @@ -146,24 +155,24 @@ afscattach(parent, self, auxp) switch (ca->ca_bustype) { #if NMC > 0 - case BUS_MC: - { - struct mcreg *mc = (struct mcreg *)ca->ca_master; - - mcintr_establish(MCV_NCR, &sc->sc_ih); - mc->mc_ncrirq = ca->ca_ipl | MC_IRQ_IEN; - break; - } + case BUS_MC: + { + struct mcreg *mc = (struct mcreg *)ca->ca_master; + + mcintr_establish(MCV_NCR, &sc->sc_ih); + mc->mc_ncrirq = ca->ca_ipl | MC_IRQ_IEN; + break; + } #endif #if NPCCTWO > 0 - case BUS_PCCTWO: - { - struct pcctworeg *pcc2 = (struct pcctworeg *)ca->ca_master; - - pcctwointr_establish(PCC2V_NCR, &sc->sc_ih); - pcc2->pcc2_ncrirq = ca->ca_ipl | PCC2_IRQ_IEN; - break; - } + case BUS_PCCTWO: + { + struct pcctworeg *pcc2 = (struct pcctworeg *)ca->ca_master; + + pcctwointr_establish(PCC2V_NCR, &sc->sc_ih); + pcc2->pcc2_ncrirq = ca->ca_ipl | PCC2_IRQ_IEN; + break; + } #endif } @@ -174,19 +183,19 @@ afscattach(parent, self, auxp) * (see dk_establish). */ tmp = bootpart; - if (ca->ca_paddr != bootaddr) - bootpart = -1; /* invalid flag to dk_establish */ + if (ca->ca_paddr != bootaddr) + bootpart = -1; /* invalid flag to dk_establish */ config_found(self, &sc->sc_link, scsiprint); - bootpart = tmp; /* restore old value */ + bootpart = tmp; /* restore old value */ } int afsc_dmaintr(sc) - struct siop_softc *sc; +struct siop_softc *sc; { siop_regmap_p rp; - u_char istat; + u_char istat; rp = sc->sc_siopp; istat = rp->siop_istat; diff --git a/sys/arch/mvme68k/include/cpu.h b/sys/arch/mvme68k/include/cpu.h index ecb5325b953..ff6d0b519ce 100644 --- a/sys/arch/mvme68k/include/cpu.h +++ b/sys/arch/mvme68k/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.6 1997/03/31 00:23:59 downsj Exp $ */ +/* $OpenBSD: cpu.h,v 1.7 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -136,19 +136,10 @@ struct clockframe { int astpending; /* need to trap before returning to user mode */ int want_resched; /* resched() was called */ - /* - * simulated software interrupt register + * Get interrupt glue. */ -extern unsigned char ssir; - -#define SIR_NET 0x1 -#define SIR_CLOCK 0x2 - -#define setsoftint(x) ssir |= (x) -#define setsoftnet() ssir |= SIR_NET -#define setsoftclock() ssir |= SIR_CLOCK -u_long allocate_sir __P((void (*proc)(), void *arg)); +#include <machine/intr.h> /* * CTL_MACHDEP definitions. diff --git a/sys/arch/mvme68k/include/param.h b/sys/arch/mvme68k/include/param.h index 494545d57aa..0b4dc1204cf 100644 --- a/sys/arch/mvme68k/include/param.h +++ b/sys/arch/mvme68k/include/param.h @@ -1,4 +1,4 @@ -/* $OpenBSD: param.h,v 1.6 1999/09/22 09:33:33 espie Exp $ */ +/* $OpenBSD: param.h,v 1.7 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -65,16 +65,16 @@ #define NPTEPG (NBPG/(sizeof (pt_entry_t))) #define SEGSHIFT 22 /* LOG2(NBSEG) */ -#define NBSEG (1 << SEGSHIFT) /* bytes/segment */ +#define NBSEG (1 << SEGSHIFT) /* bytes/segment */ #define SEGOFSET (NBSEG-1) /* byte offset into segment */ #define KERNBASE 0x00000000 /* start of kernel virtual */ -#define KERNTEXTOFF 0x00010000 /* start of kernel text */ +#define KERNTEXTOFF 0x00010000 /* start of kernel text */ #define BTOPKERNBASE ((u_long)KERNBASE >> PGSHIFT) #define DEV_BSHIFT 9 /* log2(DEV_BSIZE) */ #define DEV_BSIZE (1 << DEV_BSHIFT) -#define BLKDEV_IOSIZE 2048 +#define BLKDEV_IOSIZE 2048 #define MAXPHYS (64 * 1024) /* max raw I/O transfer size */ #define CLSIZELOG2 0 @@ -98,8 +98,8 @@ #define MCLBYTES (1 << MCLSHIFT) /* large enough for ether MTU */ #define MCLOFSET (MCLBYTES - 1) -#ifndef NMBCLUSTERS -#ifdef GATEWAY +#ifndef NMBCLUSTERS +#ifdef GATEWAY #define NMBCLUSTERS 2048 /* map size, max cluster allocation */ #else #define NMBCLUSTERS 1024 /* map size, max cluster allocation */ @@ -109,7 +109,7 @@ /* * Size of kernel malloc arena in CLBYTES-sized logical pages */ -#ifndef NKMEMCLUSTERS +#ifndef NKMEMCLUSTERS #define NKMEMCLUSTERS (2048 * 1024 / CLBYTES) #endif @@ -146,37 +146,11 @@ */ #include <machine/psl.h> -#define _spl(s) \ -({ \ - register int _spl_r; \ -\ - __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" : \ - "=&d" (_spl_r) : "di" (s)); \ - _spl_r; \ -}) - -/* spl0 requires checking for software interrupts */ -#define spl1() _spl(PSL_S|PSL_IPL1) -#define spl2() _spl(PSL_S|PSL_IPL2) -#define spl3() _spl(PSL_S|PSL_IPL3) -#define spl4() _spl(PSL_S|PSL_IPL4) -#define spl5() _spl(PSL_S|PSL_IPL5) -#define spl6() _spl(PSL_S|PSL_IPL6) -#define spl7() _spl(PSL_S|PSL_IPL7) - -#define splsoftclock() spl1() -#define splsoftnet() spl1() -#define splbio() spl2() -#define splnet() spl3() -#define splimp() spl3() -#define spltty() spl3() -#define splclock() spl5() -#define splstatclock() spl5() -#define splhigh() spl7() -#define splsched() spl7() - -/* watch out for side effects */ -#define splx(s) (s & PSL_IPL ? _spl(s) : spl0()) +/* + * interrupt glue + */ +#include <machine/intr.h> + #ifdef _KERNEL #define DELAY(n) delay(n) diff --git a/sys/arch/mvme68k/mvme68k/genassym.cf b/sys/arch/mvme68k/mvme68k/genassym.cf index 3754e44fd73..8d5f49dcc89 100644 --- a/sys/arch/mvme68k/mvme68k/genassym.cf +++ b/sys/arch/mvme68k/mvme68k/genassym.cf @@ -1,4 +1,4 @@ -# $OpenBSD: genassym.cf,v 1.2 1997/11/20 20:35:17 etheisen Exp $ +# $OpenBSD: genassym.cf,v 1.3 2000/01/06 03:21:43 smurph Exp $ # # Copyright (c) 1995 Theo de Raadt @@ -174,6 +174,10 @@ define CACHE_OFF CACHE_OFF define CACHE_CLR CACHE_CLR define IC_CLEAR IC_CLEAR define DC_CLEAR DC_CLEAR +define CACHE60_ON CACHE60_ON +define CACHE60_OFF CACHE60_OFF +define IC60_CUBC IC60_CUBC +define IC60_CABC IC60_CABC # pte/ste bits define PG_V PG_V diff --git a/sys/arch/mvme68k/mvme68k/locore.s b/sys/arch/mvme68k/mvme68k/locore.s index c3aced10ca6..9ec195e0c03 100644 --- a/sys/arch/mvme68k/mvme68k/locore.s +++ b/sys/arch/mvme68k/mvme68k/locore.s @@ -1,7 +1,8 @@ -/* $OpenBSD: locore.s,v 1.19 1998/09/06 20:10:53 millert Exp $ */ +/* $OpenBSD: locore.s,v 1.20 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt + * Copyright (c) 1999 Steve Murphree, Jr. (68060 support) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -138,7 +139,8 @@ start: RELOC(_esym, a0) movl d2,a0@ | store end of symbol table /* note: d2 now free, d3-d7 still in use */ - RELOC(_lowram, a0) + + RELOC(_lowram, a0) movl a5,a0@ | store start of physical memory clrl sp@- @@ -176,10 +178,19 @@ start: #endif #ifdef MVME177 - cmpw #CPU_177, d0 +#ifdef notyet + cmpw #CPU_176, d0 + beq is177 +#endif + cmpw #CPU_177, d0 beq is177 #endif +#ifdef MVME172 + cmpw #CPU_172, d0 + beq is172 +#endif + .data notsup: .ascii "kernel does not support this model." notsupend: @@ -275,25 +286,58 @@ is167: bra is16x #endif +#ifdef MVME172 +is172: + + RELOC(_memsize162, a1) | how much memory? + jbsr a1@ + movl d0, d2 + + /* enable Super Scalar Dispatch */ + .word 0x4e7a,0x0808 | movc pcr,d0 + bset #0,d0 | turn on bit 0. + .word 0x4e7b,0x0808 | movc d0,pcr Bang! + + RELOC(_mmutype, a0) + movl #MMU_68060,a0@ | with a 68060 MMU + + RELOC(_cputype, a0) | no, we have 68060 + movl #CPU_68060,a0@ | set to reflect 68060 CPU + + RELOC(_fputype, a0) + movl #FPU_68060,a0@ | and a 68060 FPU + + bra is16x +#endif + #ifdef MVME177 is177: + | RELOC(_needprom,a0) | this machine needs the prom mapped! | movl #1,a0@ - + RELOC(_memsize1x7, a1) | how much memory? jbsr a1@ movl d0, d2 + + /* enable Super Scalar Dispatch */ + .word 0x4e7a,0x0808 | movc pcr,d0 + bset #0,d0 | turn on bit 0. + .word 0x4e7b,0x0808 | movc d0,pcr Bang! We are smokin' ! RELOC(_mmutype, a0) movl #MMU_68060,a0@ | with a 68060 MMU RELOC(_cputype, a0) | no, we have 68060 movl #CPU_68060,a0@ | set to reflect 68060 CPU + + RELOC(_fputype, a0) + movl #FPU_68060,a0@ | and a 68060 FPU bra is16x #endif -#if defined(MVME162) || defined(MVME167) || defined(MVME177) +#if defined(MVME162) || defined(MVME167) || defined(MVME177) || defined(MVME172) .data #define ROMPKT_LEN 200 .comm _rompkt, ROMPKT_LEN @@ -375,7 +419,7 @@ Lstart1: moveq #FC_USERD,d0 | user space movc d0,sfc | as source movc d0,dfc | and destination of transfers - moveq #PGSHIFT,d2 + moveq #PGSHIFT,d2 lsrl d2,d1 | convert to page (click) number RELOC(_maxmem, a0) movl d1,a0@ | save as maxmem @@ -387,7 +431,7 @@ Lstart1: /* configure kernel and proc0 VA space so we can get going */ .globl _Sysseg, _pmap_bootstrap, _avail_start #if defined(DDB) || NKSYMS > 0 - RELOC(_esym,a0) | end of static kernel test/data/syms + RELOC(_esym,a0) | end of static kernel text/data/syms movl a0@,d2 jne Lstart2 #endif @@ -410,7 +454,20 @@ Lstart2: bne 1b 2: #endif - pea a5@ | firstpa + +/* do pmap_bootstrap stuff */ + RELOC(_mmutype, a0) + cmpl #MMU_68060,a0@ | 68060? + jne Lpmap040 | no, skip + pea a5@ | firstpa + pea a4@ | nextpa + RELOC(_pmap_bootstrap060,a0) + jbsr a0@ | pmap_bootstrap(firstpa, nextpa) + addql #8,sp + bra Lmmu_enable + +Lpmap040: + pea a5@ | firstpa pea a4@ | nextpa RELOC(_pmap_bootstrap,a0) jbsr a0@ | pmap_bootstrap(firstpa, nextpa) @@ -420,24 +477,26 @@ Lstart2: * Enable the MMU. * Since the kernel is mapped logical == physical, we just turn it on. */ +Lmmu_enable: RELOC(_Sysseg, a0) | system segment table addr movl a0@,d1 | read value (a KVA) addl a5,d1 | convert to PA RELOC(_mmutype, a0) - cmpl #MMU_68040,a0@ | 68040? - jne Lmotommu1 | no, skip + cmpl #MMU_68040,a0@ | 68040 or 68060? + jgt Lmotommu1 | no, skip .long 0x4e7b1807 | movc d1,srp + .long 0x4e7b1806 | movc d1,urp jra Lstploaddone Lmotommu1: - RELOC(_protorp, a0) + RELOC(_protorp, a0) movl #0x80000202,a0@ | nolimit + share global + 4 byte PTEs movl d1,a0@(4) | + segtable address pmove a0@,srp | load the supervisor root pointer movl #0x80000002,a0@ | reinit upper half for CRP loads Lstploaddone: - RELOC(_mmutype, a0) - cmpl #MMU_68040,a0@ | 68040? - jne Lmotommu2 | no, skip + RELOC(_mmutype, a0) + cmpl #MMU_68040,a0@ | 68040 or 68060? + jgt Lmotommu2 | no, skip RELOC(_needprom,a0) cmpl #0,a0@ @@ -465,9 +524,17 @@ Lstploaddone: .word 0xf4d8 | cinva bc .word 0xf518 | pflusha - movl #0x8000,d0 + movl #0x8000,d0 .long 0x4e7b0003 | movc d0,tc - movl #0x80008000,d0 + /* Enable 68060 extensions here */ + RELOC(_mmutype, a0) + cmpl #MMU_68060,a0@ | 68060? + jne Lchache040 + movl #CACHE60_ON,d0 | branch cache, etc... + movc d0,cacr | turn on both caches + jmp Lenab1 +Lchache040: + movl #0x80008000,d0 movc d0,cacr | turn on both caches jmp Lenab1 Lmotommu2: @@ -499,13 +566,17 @@ Lenab2: jbsr _TBIA | invalidate TLB cmpl #MMU_68040,_mmutype | 68040? jeq Lnocache0 | yes, cache already on + cmpl #MMU_68060,_mmutype | 68060? + jeq Lnocache0 | yes, cache already on movl #CACHE_ON,d0 movc d0,cacr | clear cache(s) Lnocache0: /* final setup for C code */ - movl #_vectab,d2 | set VBR +#if 1 + movl #_vectab,d2 | set VBR movc d2,vbr - movw #PSL_LOWIPL,sr | lower SPL +#endif + movw #PSL_LOWIPL,sr | lower SPL movl d3, _bootpart | save bootpart movl d4, _bootdevlun | save bootdevlun movl d5, _bootctrllun | save bootctrllun @@ -587,11 +658,94 @@ _doadump: jbsr _dumpsys jbsr _doboot /*NOTREACHED*/ +/* + * Trap/interrupt vector routines - new for 060 + */ +#include <m68k/m68k/trap_subr.s> + + .globl _trap, _nofault, _longjmp +#if defined(M68040) || defined(M68060) + .globl _addrerr4060 +_addrerr4060: + clrl sp@- | stack adjust count + moveml #0xFFFF,sp@- | save user registers + movl usp,a0 | save the user SP + movl a0,sp@(FR_SP) | in the savearea + movl sp@(FR_HW+8),sp@- + clrl sp@- | dummy code + movl #T_ADDRERR,sp@- | mark address error + jra _ASM_LABEL(faultstkadj) | and deal with it +#endif + +#if defined(M68060) + .globl _buserr60 +_buserr60: + tstl _nofault | device probe? + jeq Lbuserr60 | no, handle as usual + movl _nofault,sp@- | yes, + jbsr _longjmp | longjmp(nofault) +Lbuserr60: + clrl sp@- | stack adjust count + moveml #0xFFFF,sp@- | save user registers + movl usp,a0 | save the user SP + movl a0,sp@(FR_SP) | in the savearea + movel sp@(FR_HW+12),d0 | FSLW + btst #2,d0 | branch prediction error? + jeq Lnobpe + movc cacr,d2 + orl #IC60_CABC,d2 | clear all branch cache entries + movc d2,cacr + movl d0,d1 + addql #1,L60bpe + andl #0x7ffd,d1 + jeq _ASM_LABEL(faultstkadjnotrap2) +Lnobpe: + | we need to adjust for misaligned addresses + movl sp@(FR_HW+8),d1 | grab VA + btst #27,d0 | check for mis-aligned access + jeq Lberr3 | no, skip + addl #28,d1 | yes, get into next page + | operand case: 3, + | instruction case: 4+12+12 + andl #PG_FRAME,d1 | and truncate +Lberr3: + movl d1,sp@- + movl d0,sp@- | code is FSLW now. + andw #0x1f80,d0 + jeq Lisberr | Bus Error? + jra Lismerr | no, MMU fault. +#endif +#if defined(M68040) + .globl _buserr40 +_buserr40: + tstl _nofault | device probe? + jeq Lbuserr40 | no, handle as usual + movl _nofault,sp@- | yes, + jbsr _longjmp | longjmp(nofault) +Lbuserr40: + clrl sp@- | stack adjust count + moveml #0xFFFF,sp@- | save user registers + movl usp,a0 | save the user SP + movl a0,sp@(FR_SP) | in the savearea + movl sp@(FR_HW+20),d1 | get fault address + moveq #0,d0 + movw sp@(FR_HW+12),d0 | get SSW + btst #11,d0 | check for mis-aligned + jeq Lbe1stpg | no skip + addl #3,d1 | get into next page + andl #PG_FRAME,d1 | and truncate +Lbe1stpg: + movl d1,sp@- | pass fault address. + movl d0,sp@- | pass SSW as code + btst #10,d0 | test ATC + jeq Lisberr | it is a bus error + movl #T_MMUFLT,sp@- | show that we are an MMU fault + jra _ASM_LABEL(faultstkadj) | and deal with it +#endif /* * Trap/interrupt vector routines - */ - + */ .globl _trap, _nofault, _longjmp _buserr: tstl _nofault | device probe? @@ -599,9 +753,9 @@ _buserr: movl _nofault,sp@- | yes, jbsr _longjmp | longjmp(nofault) Lberr: -#if defined(M68040) +#if defined(M68040) || defined(M68060) cmpl #MMU_68040,_mmutype | 68040? - jne _addrerr | no, skip + jgt _addrerr | no, skip clrl sp@- | stack adjust count moveml #0xFFFF,sp@- | save user registers movl usp,a0 | save the user SP @@ -634,9 +788,9 @@ _addrerr: movl usp,a0 | save the user SP movl a0,sp@(FR_SP) | in the savearea lea sp@(FR_HW),a1 | grab base of HW berr frame -#if defined(M68040) +#if defined(M68040) || defined(M68060) cmpl #MMU_68040,_mmutype | 68040? - jne Lbenot040 | no, skip + jgt Lbenot040 | no, skip movl a1@(8),sp@- | yes, push fault address clrl sp@- | no SSW for address fault jra Lisaerr | go deal with it @@ -744,9 +898,9 @@ Lstkadj: * FP exceptions. */ _fpfline: -#if defined(M68040) - cmpl #FPU_68040,_fputype | 68040 FPU? - jne Lfp_unimp | no, skip FPSP +#if defined(M68040) || defined(M68060) + cmpl #FPU_68040,_fputype | 68040 or 68060 FPU? + jlt Lfp_unimp | no, skip FPSP cmpw #0x202c,sp@(6) | format type 2? jne _illinst | no, not an FP emulation Ldofp_unimp: @@ -755,7 +909,7 @@ Ldofp_unimp: jmp fpsp_unimp | yes, go handle it #endif Lfp_unimp: -#endif/* M68040 */ +#endif/* M68040 || M68060 */ #ifdef FPU_EMULATE clrl sp@- | stack adjust count moveml #0xFFFF,sp@- | save registers @@ -766,9 +920,9 @@ Lfp_unimp: #endif _fpunsupp: -#if defined(M68040) - cmpl #FPU_68040,_fputype | 68040 FPU? - jne _illinst | no, treat as illinst +#if defined(M68040) || defined(M68060) + cmpl #FPU_68040,_fputype | 68040 or 68060 FPU? + jlt _illinst | no, treat as illinst #ifdef FPSP .globl fpsp_unsupp jmp fpsp_unsupp | yes, go handle it @@ -803,7 +957,7 @@ _fpfault: #if defined(M68040) || defined(M68060) /* always null state frame on 68040, 68060 */ cmpl #CPU_68040,_cputype - jle Lfptnull + jge Lfptnull #endif tstb a0@ | null state frame? jeq Lfptnull | yes, safe @@ -816,80 +970,6 @@ Lfptnull: movl #T_FPERR,sp@- | push type arg jra Ltrapnstkadj | call trap and deal with stack cleanup -/* - * Coprocessor and format errors can generate mid-instruction stack - * frames and cause signal delivery hence we need to check for potential - * stack adjustment. - */ -_coperr: - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- - movl usp,a0 | get and save - movl a0,sp@(FR_SP) | the user stack pointer - clrl sp@- | no VA arg - clrl sp@- | or code arg - movl #T_COPERR,sp@- | push trap type - jra Ltrapnstkadj | call trap and deal with stack adjustments - -_fmterr: - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- - movl usp,a0 | get and save - movl a0,sp@(FR_SP) | the user stack pointer - clrl sp@- | no VA arg - clrl sp@- | or code arg - movl #T_FMTERR,sp@- | push trap type - jra Ltrapnstkadj | call trap and deal with stack adjustments - -/* - * Other exceptions only cause four and six word stack frame and require - * no post-trap stack adjustment. - */ -_illinst: - clrl sp@- - moveml #0xFFFF,sp@- - moveq #T_ILLINST,d0 - jra fault - -_zerodiv: - clrl sp@- - moveml #0xFFFF,sp@- - moveq #T_ZERODIV,d0 - jra fault - -_chkinst: - clrl sp@- - moveml #0xFFFF,sp@- - moveq #T_CHKINST,d0 - jra fault - -_trapvinst: - clrl sp@- - moveml #0xFFFF,sp@- - moveq #T_TRAPVINST,d0 - jra fault - -_privinst: - clrl sp@- - moveml #0xFFFF,sp@- - moveq #T_PRIVINST,d0 - jra fault - - .globl fault -fault: - movl usp,a0 | get and save - movl a0,sp@(FR_SP) | the user stack pointer - clrl sp@- | no VA arg - clrl sp@- | or code arg - movl d0,sp@- | push trap type - jbsr _trap | handle trap - lea sp@(12),sp | pop value args - movl sp@(FR_SP),a0 | restore - movl a0,usp | user SP - moveml sp@+,#0x7FFF | restore most user regs - addql #8,sp | pop SP and stack adjust - jra rei | all done - .globl _hardtrap, _hardintr _hardtrap: moveml #0xC0C0,sp@- | save scratch regs @@ -1276,11 +1356,11 @@ Lbadsw: ENTRY(cpu_switch) movl _curpcb,a0 | current pcb movw sr,a0@(PCB_PS) | save sr before changing ipl + #ifdef notyet movl _curproc,sp@- | remember last proc running #endif clrl _curproc - /* * Find the highest-priority queue that isn't empty, * then take the first proc from that queue. @@ -1321,21 +1401,35 @@ Lsw2: /* * Save state of previous process in its pcb. */ - movl _curpcb,a1 + movl _curpcb,a1 moveml #0xFCFC,a1@(PCB_REGS) | save non-scratch registers movl usp,a2 | grab USP (a2 has been saved) movl a2,a1@(PCB_USP) | and save it - - tstl _fputype | If we don't have an FPU, - jeq Lswnofpsave | don't try to save it. +#ifdef FPU_EMULATE + tstl _fputype | do we have any FPU? + jeq Lswnofpsave | no, dont save +#endif lea a1@(PCB_FPCTX),a2 | pointer to FP save area fsave a2@ | save FP state +#ifdef M68060 + cmpl #MMU_68060,_mmutype | is 68060? + jeq Lsavfp60 | yes, goto Lsavfp60 +#endif /* M68060 */ tstb a2@ | null state frame? jeq Lswnofpsave | yes, all done fmovem fp0-fp7,a2@(216) | save FP general registers fmovem fpcr/fpsr/fpi,a2@(312) | save FP control registers +#ifdef M68060 + jra Lswnofpsave +Lsavfp60: + tstb a2@(2) | null state frame? + jeq Lswnofpsave | yes, all done + fmovem fp0-fp7,a2@(216) | save FP general registers + fmovem fpcr,a2@(312) | save FP control registers + fmovem fpsr,a2@(316) + fmovem fpi,a2@(320) +#endif /* M68060 */ Lswnofpsave: - #ifdef DIAGNOSTIC tstl a0@(P_WCHAN) jne Lbadsw @@ -1362,54 +1456,79 @@ Lswnofpsave: addql #8,sp movl _curpcb,a1 | restore p_addr Lswnochg: - lea tmpstk,sp | now goto a tmp stack for NMI -#if defined(M68040) - cmpl #MMU_68040,_mmutype | 68040? - jne Lres1a | no, skip - .word 0xf518 | yes, pflusha - movl a1@(PCB_USTP),d0 | get USTP - moveq #PGSHIFT,d1 - lsll d1,d0 | convert to addr - .long 0x4e7b0806 | movc d0,urp - jra Lcxswdone -Lres1a: -#endif + cmpl #MMU_68040,_mmutype | 68040 or 68060? + jle Lres2 | yes, goto Lres2 movl #CACHE_CLR,d0 movc d0,cacr | invalidate cache(s) pflusha | flush entire TLB + jra Lres3 +Lres2: + .word 0xf518 | pflusha (68040 and 68060) +| movl #CACHE40_ON,d0 +| movc d0,cacr | invalidate cache(s) +#ifdef M68060 + cmpl #MMU_68060,_mmutype | is 68060? + jne Lres3 | no, skip + movc cacr,d2 + orl #IC60_CUBC,d2 | clear user branch cache entries + movc d2,cacr +#endif /* M68060 */ +Lres3: movl a1@(PCB_USTP),d0 | get USTP moveq #PGSHIFT,d1 lsll d1,d0 | convert to addr + cmpl #MMU_68040,_mmutype | 68040 or 68060? + jle Lres4 | yes, goto Lres4 lea _protorp,a0 | CRP prototype movl d0,a0@(4) | stash USTP pmove a0@,crp | load new user root pointer -Lcxswdone: + jra Lres5 +Lres4: + .long 0x4e7b0806 | movc d0,URP +Lres5: moveml a1@(PCB_REGS),#0xFCFC | and registers movl a1@(PCB_USP),a0 movl a0,usp | and USP - - tstl _fputype | If we don't have an FPU, - jeq Lnofprest | don't try to restore it. +#ifdef FPU_EMULATE + tstl _fputype | do we _have_ any fpu? + jne Lresnonofpatall + movw a1@(PCB_PS),sr | no, restore PS + moveq #1,d0 | return 1 (for alternate returns) + rts +Lresnonofpatall: +#endif lea a1@(PCB_FPCTX),a0 | pointer to FP save area +#ifdef M68060 + cmpl #MMU_68060,_mmutype | is 68060? + jeq Lresfp60rest1 | yes, goto Lresfp60rest1 +#endif /* M68060 */ tstb a0@ | null state frame? - jeq Lresfprest | yes, easy -#if defined(M68040) - cmpl #MMU_68040,_mmutype | 68040? - jne Lresnot040 | no, skip - clrl sp@- | yes... - frestore sp@+ | ...magic! -Lresnot040: -#endif + jeq Lresfprest2 | yes, easy fmovem a0@(312),fpcr/fpsr/fpi | restore FP control registers fmovem a0@(216),fp0-fp7 | restore FP general registers -Lresfprest: +Lresfprest2: frestore a0@ | restore state -Lnofprest: movw a1@(PCB_PS),sr | no, restore PS moveq #1,d0 | return 1 (for alternate returns) rts +#ifdef M68060 +Lresfp60rest1: + tstb a0@(2) | null state frame? + jeq Lresfp60rest2 | yes, easy + fmovem a0@(312),fpcr | restore FP control registers + fmovem a0@(316),fpsr + fmovem a0@(320),fpi + fmovem a0@(216),fp0-fp7 | restore FP general registers +Lresfp60rest2: + frestore a0@ | restore state + movw a1@(PCB_PS),sr | no, restore PS + moveq #1,d0 | return 1 (for alternate returns) + rts +#endif /* M68060 */ + + /* * savectx(pcb) * Update pcb, saving current processor state. @@ -1420,20 +1539,36 @@ ENTRY(savectx) movl usp,a0 | grab USP movl a0,a1@(PCB_USP) | and save it moveml #0xFCFC,a1@(PCB_REGS) | save non-scratch registers - - tstl _fputype | If we don't have an FPU, - jeq Lsvnofpsave | don't try to save it. +#ifdef FPU_EMULATE + tstl _fputype + jeq Lsavedone +#endif lea a1@(PCB_FPCTX),a0 | pointer to FP save area fsave a0@ | save FP state +#ifdef M68060 + cmpl #MMU_68060,_mmutype | is 68060? + jeq Lsavctx60 | yes, goto Lsavctx60 +#endif tstb a0@ | null state frame? - jeq Lsvnofpsave | yes, all done + jeq Lsavedone | yes, all done fmovem fp0-fp7,a0@(216) | save FP general registers fmovem fpcr/fpsr/fpi,a0@(312) | save FP control registers -Lsvnofpsave: + moveq #0,d0 + rts +#ifdef M68060 +Lsavctx60: + tstb a0@(2) + jeq Lsavedone + fmovem fp0-fp7,a0@(216) | save FP general registers + fmovem fpcr,a0@(312) | save FP control registers + fmovem fpsr,a0@(316) + fmovem fpi,a0@(320) +#endif +Lsavedone: moveq #0,d0 | return 0 rts -#if defined(M68040) +#if defined(M68040) || defined(M68060) ENTRY(suline) movl sp@(4),a0 | address to write movl _curpcb,a1 | current pcb @@ -1466,19 +1601,27 @@ Lsldone: */ ENTRY(TBIA) __TBIA: -#if defined(M68040) - cmpl #MMU_68040,_mmutype | 68040? - jne Lmotommu3 | no, skip - .word 0xf518 | yes, pflusha - rts -Lmotommu3: -#endif - tstl _mmutype | what mmu? + cmpl #MMU_68040,_mmutype | 68040 or 68060? + jle Ltbia040 | yes, goto Ltbia040 + pflusha | flush entire TLB + tstl _mmutype jpl Lmc68851a | 68851 implies no d-cache movl #DC_CLEAR,d0 movc d0,cacr | invalidate on-chip d-cache Lmc68851a: rts +Ltbia040: + .word 0xf518 | pflusha +#ifdef M68060 + cmpl #MMU_68060,_mmutype | is 68060? + jne Ltbiano60 | no, skip + movc cacr,d0 + orl #IC60_CABC,d0 | and clear all branch cache entries + movc d0,cacr +#endif +Ltbiano60: + rts + /* * Invalidate any TLB entry for given VA (TB Invalidate Single) @@ -1488,24 +1631,11 @@ ENTRY(TBIS) tstl fulltflush | being conservative? jne __TBIA | yes, flush entire TLB #endif -#if defined(M68040) - cmpl #MMU_68040,_mmutype | 68040? - jne Lmotommu4 | no, skip - movl sp@(4),a0 - movc dfc,d1 - moveq #1,d0 | user space - movc d0,dfc - .word 0xf508 | pflush a0@ - moveq #5,d0 | super space - movc d0,dfc - .word 0xf508 | pflush a0@ - movc d1,dfc - rts -Lmotommu4: -#endif - tstl _mmutype | is 68851? - jpl Lmc68851b | movl sp@(4),a0 | get addr to flush + cmpl #MMU_68040,_mmutype | 68040 or 68060 ? + jle Ltbis040 | yes, goto Ltbis040 + tstl _mmutype + jpl Lmc68851b | is 68851? pflush #0,#0,a0@ | flush address from both sides movl #DC_CLEAR,d0 movc d0,cacr | invalidate on-chip data cache @@ -1513,6 +1643,22 @@ Lmotommu4: Lmc68851b: pflushs #0,#0,a0@ | flush address from both sides rts +Ltbis040: + moveq #5,d0 | select supervisor + movc d0,dfc + .word 0xf508 | pflush a0@ + moveq #FC_USERD,d0 | select user + movc d0,dfc + .word 0xf508 | pflush a0@ +#ifdef M68060 + cmpl #MMU_68060,_mmutype | is 68060? + jne Ltbisno60 | no, skip + movc cacr,d0 + orl #IC60_CABC,d0 | and clear all branch cache entries + movc d0,cacr +Ltbisno60: +#endif + rts /* * Invalidate supervisor side of TLB @@ -1522,17 +1668,29 @@ ENTRY(TBIAS) tstl fulltflush | being conservative? jne __TBIA | yes, flush everything #endif -#if defined(M68040) - cmpl #MMU_68040,_mmutype | 68040? - jne Lmotommu5 | no, skip - .word 0xf518 | yes, pflusha (for now) XXX - rts -Lmotommu5: -#endif - pflush #4,#4 | flush supervisor TLB entries + cmpl #MMU_68040,_mmutype | 68040 or 68060 ? + jle Ltbias040 | yes, goto Ltbias040 + tstl _mmutype + jpl Lmc68851c | 68851? + pflush #4,#4 | flush supervisor TLB entries movl #DC_CLEAR,d0 movc d0,cacr | invalidate on-chip d-cache rts +Lmc68851c: + pflushs #4,#4 | flush supervisor TLB entries + rts +Ltbias040: +| 68040 cannot specify supervisor/user on pflusha, so we flush all + .word 0xf518 | pflusha +#ifdef M68060 + cmpl #MMU_68060,_mmutype + jne Ltbiasno60 + movc cacr,d0 + orl #IC60_CABC,d0 | and clear all branch cache entries + movc d0,cacr +Ltbiasno60: +#endif + rts /* * Invalidate user side of TLB @@ -1542,26 +1700,38 @@ ENTRY(TBIAU) tstl fulltflush | being conservative? jne __TBIA | yes, flush everything #endif -#if defined(M68040) - cmpl #MMU_68040,_mmutype | 68040? - jne Lmotommu6 | no, skip - .word 0xf518 | yes, pflusha (for now) XXX - rts -Lmotommu6: -#endif + cmpl #MMU_68040,_mmutype + jle Ltbiau040 + tstl _mmutype + jpl Lmc68851d | 68851? pflush #0,#4 | flush user TLB entries movl #DC_CLEAR,d0 movc d0,cacr | invalidate on-chip d-cache rts +Lmc68851d: + pflushs #0,#4 | flush user TLB entries + rts +Ltbiau040: +| 68040 cannot specify supervisor/user on pflusha, so we flush all + .word 0xf518 | pflusha +#ifdef M68060 + cmpl #MMU_68060,_mmutype + jne Ltbiauno60 + movc cacr,d0 + orl #IC60_CUBC,d0 | but only user branch cache entries + movc d0,cacr +Ltbiauno60: +#endif + rts /* * Invalidate instruction cache */ ENTRY(ICIA) -#if defined(M68040) +#if defined(M68040) || defined(M68060) ENTRY(ICPA) cmpl #MMU_68040,_mmutype | 68040 - jne Lmotommu7 | no, skip + jgt Lmotommu7 | no, skip .word 0xf498 | cinva ic rts Lmotommu7: @@ -1579,9 +1749,9 @@ Lmotommu7: */ ENTRY(DCIA) __DCIA: -#if defined(M68040) +#if defined(M68040) || defined(M68060) cmpl #MMU_68040,_mmutype | 68040 - jne Lmotommu8 | no, skip + jgt Lmotommu8 | no, skip .word 0xf478 | cpusha dc rts Lmotommu8: @@ -1590,9 +1760,9 @@ Lmotommu8: ENTRY(DCIS) __DCIS: -#if defined(M68040) +#if defined(M68040) || defined(M68060) cmpl #MMU_68040,_mmutype | 68040 - jne Lmotommu9 | no, skip + jgt Lmotommu9 | no, skip .word 0xf478 | cpusha dc rts Lmotommu9: @@ -1604,6 +1774,8 @@ ENTRY(DCIAS) __DCIAS: cmpl #MMU_68040,_mmutype | 68040 jeq Ldciasx + cmpl #MMU_68060,_mmutype | 68060 + jeq Ldciasx movl sp@(4),a0 .word 0xf468 | cpushl dc,a0@ Ldciasx: @@ -1611,16 +1783,16 @@ Ldciasx: ENTRY(DCIU) __DCIU: -#if defined(M68040) +#if defined(M68040) || defined(M68060) cmpl #MMU_68040,_mmutype | 68040 - jne LmotommuA | no, skip + jgt LmotommuA | no, skip .word 0xf478 | cpusha dc rts LmotommuA: #endif rts -#if defined(M68040) +#if defined(M68040) || defined(M68060) ENTRY(ICPL) movl sp@(4),a0 | address .word 0xf488 | cinvl ic,a0@ @@ -1651,10 +1823,10 @@ ENTRY(DCFP) #endif ENTRY(PCIA) -#if defined(M68040) +#if defined(M68040) || defined(M68060) ENTRY(DCFA) cmpl #MMU_68040,_mmutype | 68040 - jne LmotommuB | no, skip + jgt LmotommuB | no, skip .word 0xf478 | cpusha dc rts LmotommuB: @@ -1692,25 +1864,32 @@ _getdfc: /* * Load a new user segment table pointer. */ -ENTRY(loadustp) +ENTRY(loadustp) /* XXX - smuprh */ movl sp@(4),d0 | new USTP moveq #PGSHIFT,d1 lsll d1,d0 | convert to addr -#if defined(M68040) - cmpl #MMU_68040,_mmutype | 68040? - jne LmotommuC | no, skip - .word 0xf518 | pflusha XXX TDR - .long 0x4e7b0806 | movc d0,urp - rts -LmotommuC: +#ifdef M68060 + cmpl #MMU_68060,_mmutype | 68040 or 68060? + jeq Lldustp060 | yes, goto Lldustp060 #endif - pflusha | XXX TDR + cmpl #MMU_68040,_mmutype + jeq Lldustp040 lea _protorp,a0 | CRP prototype movl d0,a0@(4) | stash USTP pmove a0@,crp | load root pointer movl #DC_CLEAR,d0 movc d0,cacr | invalidate on-chip d-cache rts | since pmove flushes TLB +#ifdef M68060 +Lldustp060: + movc cacr,d1 + orl #IC60_CUBC,d1 | clear user branch cache entries + movc d1,cacr +#endif +Lldustp040: + .word 0xf518 | pflusha XXX TDR + .long 0x4e7b0806 | movec d0,URP + rts ENTRY(ploadw) movl sp@(4),a0 | address to load @@ -1739,10 +1918,16 @@ Lspldone: /* * Save and restore 68881 state. + * Pretty awful looking since our assembler does not + * recognize FP mnemonics. */ ENTRY(m68881_save) movl sp@(4),a0 | save area pointer fsave a0@ | save state +#ifdef M68060 + cmpl #MMU_68060,_mmutype | 68040 or 68060? + jeq Lm68060fpsave | yes, goto Lm68060fpsave +#endif tstb a0@ | null state frame? jeq Lm68881sdone | yes, all done fmovem fp0-fp7,a0@(216) | save FP general registers @@ -1750,8 +1935,24 @@ ENTRY(m68881_save) Lm68881sdone: rts +#ifdef M68060 +Lm68060fpsave: + tstb a0@(2) | null state frame? + jeq Lm68060sdone | yes, all done + fmovem fp0-fp7,a0@(216) | save FP general registers + fmovem fpcr,a0@(312) | save FP control registers + fmovem fpsr,a0@(316) + fmovem fpi,a0@(320) +Lm68060sdone: + rts +#endif + ENTRY(m68881_restore) movl sp@(4),a0 | save area pointer +#ifdef M68060 + cmpl #MMU_68060,_mmutype | 68040 or 68060? + jeq Lm68060fprestore | yes, goto Lm68060fprestore +#endif tstb a0@ | null state frame? jeq Lm68881rdone | yes, easy fmovem a0@(312),fpcr/fpsr/fpi | restore FP control registers @@ -1760,6 +1961,19 @@ Lm68881rdone: frestore a0@ | restore state rts +#ifdef M68060 +Lm68060fprestore: + tstb a0@(2) | null state frame? + jeq Lm68060fprdone | yes, easy + fmovem a0@(312),fpcr | restore FP control registers + fmovem a0@(316),fpsr + fmovem a0@(320),fpi + fmovem a0@(216),fp0-fp7 | restore FP general registers +Lm68060fprdone: + frestore a0@ | restore state + rts +#endif + /* * Handle the nitty-gritty of rebooting the machine. * Basically we just turn off the MMU and jump to the appropriate ROM routine. @@ -1769,9 +1983,9 @@ Lm68881rdone: .globl _doboot _doboot: lea tmpstk,sp | physical SP in case of NMI -#if defined(M68040) +#if defined(M68040) || defined(M68060) cmpl #MMU_68040,_mmutype | 68040? - jne Lbootnot040 | no, skip + jgt Lbootnot040 | no, skip movl #0,d0 movc d0,cacr | caches off .long 0x4e7b0003 | movc d0,tc (turn off MMU) @@ -1831,6 +2045,22 @@ not147: .short MVMEPROM_EXIT | return to m68kbug /*NOTREACHED*/ +#ifdef M68060 + .globl _intemu60, _fpiemu60, _fpdemu60, _fpeaemu60 +_intemu60: + addql #1,L60iem + jra _I_CALL_TOP+128+0x00 +_fpiemu60: + addql #1,L60fpiem + jra _FP_CALL_TOP+128+0x30 +_fpdemu60: + addql #1,L60fpdem + jra _FP_CALL_TOP+128+0x38 +_fpeaemu60: + addql #1,L60fpeaem + jra _FP_CALL_TOP+128+0x40 +#endif + .data .globl _mmutype,_protorp,_cputype,_fputype _mmutype: @@ -1876,10 +2106,30 @@ _intrnames: .asciz "lev6" .asciz "nmi" .asciz "statclock" +#ifdef M68060 + .asciz "60intemu" + .asciz "60fpiemu" + .asciz "60fpdemu" + .asciz "60fpeaemu" + .asciz "60bpe" +#endif +#ifdef FPU_EMULATE + .asciz "fpe" +#endif _eintrnames: .even _intrcnt: .long 0,0,0,0,0,0,0,0,0,0 +#ifdef M68060 +L60iem: .long 0 +L60fpiem: .long 0 +L60fpdem: .long 0 +L60fpeaem: .long 0 +L60bpe: .long 0 +#endif +#ifdef FPU_EMULATE +Lfpecnt: .long 0 +#endif _eintrcnt: #include <mvme68k/mvme68k/vectors.s> diff --git a/sys/arch/mvme68k/mvme68k/machdep.c b/sys/arch/mvme68k/mvme68k/machdep.c index fff1f90c012..6cde1e3e49e 100644 --- a/sys/arch/mvme68k/mvme68k/machdep.c +++ b/sys/arch/mvme68k/mvme68k/machdep.c @@ -1,7 +1,8 @@ -/* $OpenBSD: machdep.c,v 1.30 1999/12/08 06:50:16 itojun Exp $ */ +/* $OpenBSD: machdep.c,v 1.31 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt + * Copyright (c) 1999 Steve Murphree, Jr. (68060 support) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -125,28 +126,28 @@ extern vm_offset_t avail_end; /* * Declare these as initialized data so we can patch them. */ -int nswbuf = 0; +int nswbuf = 0; #ifdef NBUF -int nbuf = NBUF; +int nbuf = NBUF; #else -int nbuf = 0; +int nbuf = 0; #endif #ifdef BUFPAGES -int bufpages = BUFPAGES; +int bufpages = BUFPAGES; #else -int bufpages = 0; +int bufpages = 0; #endif -int msgbufmapped; /* set when safe to use msgbuf */ -int maxmem; /* max memory per process */ -int physmem = MAXMEM; /* max supported memory, changes to actual */ +int msgbufmapped; /* set when safe to use msgbuf */ +int maxmem; /* max memory per process */ +int physmem = MAXMEM; /* max supported memory, changes to actual */ /* * safepri is a safe priority for sleep to set for a spin-wait * during autoconfiguration or after a panic. */ -int safepri = PSL_LOWIPL; +int safepri = PSL_LOWIPL; -extern u_int lowram; -extern short exframesize[]; +extern u_int lowram; +extern short exframesize[]; #ifdef COMPAT_HPUX extern struct emul emul_hpux; @@ -155,24 +156,55 @@ extern struct emul emul_hpux; extern struct emul emul_sunos; #endif +/* + * XXX this is to fake out the console routines, while + * booting. New and improved! :-) smurph + */ +void bootcnprobe __P((struct consdev *)); +void bootcninit __P((struct consdev *)); +void bootcnputc __P((dev_t, int)); +int bootcngetc __P((dev_t)); +extern void nullcnpollc __P((dev_t, int)); + +#define bootcnpollc nullcnpollc + +static struct consdev bootcons = { + NULL, + NULL, + bootcngetc, + bootcnputc, + bootcnpollc, + makedev(14,0), + 1}; + +void initvectors(void); + void mvme68k_init() { #if defined(MACHINE_NEW_NONCONTIG) extern vm_offset_t avail_start, avail_end; - + /* - * Tell the VM system about available physical memory. The - * hp300 only has one segment. - */ + * Tell the VM system about available physical memory. The + * hp300 only has one segment. + */ #if defined(UVM) uvm_page_physload(atop(avail_start), atop(avail_end), - atop(avail_start), atop(avail_end)); + atop(avail_start), atop(avail_end)); #else vm_page_physload(atop(avail_start), atop(avail_end), - atop(avail_start), atop(avail_end)); + atop(avail_start), atop(avail_end)); #endif /* UVM */ #endif /* MACHINE_NEW_NONCONTIG */ + + /* + * Put machine specific exception vectors in place. + */ + initvectors(); + + /* startup fake console driver. It will be replaced by consinit() */ + cn_tab = &bootcons; } /* @@ -187,6 +219,7 @@ consinit() /* * Initialize the console before we print anything out. */ + cn_tab = NULL; /* Get rid of fake console driver */ cninit(); #ifdef DDB @@ -226,11 +259,11 @@ cpu_startup() * avail_end was pre-decremented in pmap_bootstrap to compensate. */ for (i = 0; i < btoc(sizeof (struct msgbuf)); i++) - pmap_enter(pmap_kernel(), (vm_offset_t)msgbufp, - avail_end + i * NBPG, VM_PROT_READ|VM_PROT_WRITE, - TRUE, VM_PROT_READ|VM_PROT_WRITE); - - msgbufmapped = 1; + pmap_enter(pmap_kernel(), (vm_offset_t)msgbufp, + avail_end + i * NBPG, VM_PROT_READ|VM_PROT_WRITE, + TRUE, VM_PROT_READ|VM_PROT_WRITE); + + msgbufmapped = 1; /* * Good {morning,afternoon,evening,night}. @@ -255,7 +288,7 @@ cpu_startup() * addresses to the various data structures. */ firstaddr = 0; -again: + again: v = (caddr_t)firstaddr; #define valloc(name, type, num) \ @@ -281,7 +314,7 @@ again: valloc(msghdrs, struct msg, msginfo.msgtql); valloc(msqids, struct msqid_ds, msginfo.msgmni); #endif - + /* * Determine how many buffers to allocate. * We just allocate a flat 5%. Insure a minimum of 16 buffers. @@ -327,10 +360,10 @@ again: */ size = MAXBSIZE * nbuf; buffer_map = kmem_suballoc(kernel_map, (vm_offset_t *)&buffers, - &maxaddr, size, TRUE); + &maxaddr, size, TRUE); minaddr = (vm_offset_t)buffers; if (vm_map_find(buffer_map, vm_object_allocate(size), (vm_offset_t)0, - &minaddr, size, FALSE) != KERN_SUCCESS) + &minaddr, size, FALSE) != KERN_SUCCESS) panic("startup: cannot allocate buffers"); base = bufpages / nbuf; residual = bufpages % nbuf; @@ -355,22 +388,22 @@ again: * limits the number of processes exec'ing at any time. */ exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, - 16*NCARGS, TRUE); + 16*NCARGS, TRUE); /* * Allocate a submap for physio */ phys_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr, - VM_PHYS_SIZE, TRUE); + VM_PHYS_SIZE, TRUE); /* * Finally, allocate mbuf pool. Since mclrefcnt is an off-size * we use the more space efficient malloc in place of kmem_alloc. */ mclrefcnt = (char *)malloc(NMBCLUSTERS+CLBYTES/MCLBYTES, - M_MBUF, M_NOWAIT); + M_MBUF, M_NOWAIT); bzero(mclrefcnt, NMBCLUSTERS+CLBYTES/MCLBYTES); mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl, &maxaddr, - VM_MBUF_SIZE, FALSE); + VM_MBUF_SIZE, FALSE); /* * Initialize callouts */ @@ -384,7 +417,7 @@ again: #endif printf("avail mem = %d\n", ptoa(cnt.v_free_count)); printf("using %d buffers containing %d bytes of memory\n", - nbuf, bufpages * CLBYTES); + nbuf, bufpages * CLBYTES); #ifdef MFS /* * Check to see if a mini-root was loaded into memory. It resides @@ -428,10 +461,10 @@ again: */ void setregs(p, pack, stack, retval) - register struct proc *p; - struct exec_package *pack; - u_long stack; - register_t *retval; +register struct proc *p; +struct exec_package *pack; +u_long stack; +register_t *retval; { struct frame *frame = (struct frame *)p->p_md.md_regs; @@ -475,13 +508,13 @@ setregs(p, pack, stack, retval) /* * Info for CTL_HW */ -char cpu_model[120]; -extern char version[]; +char cpu_model[120]; +extern char version[]; -int cputyp; -int cpuspeed; +int cputyp; +int cpuspeed; -struct mvmeprom_brdid brdid; +struct mvmeprom_brdid brdid; identifycpu() { @@ -493,80 +526,95 @@ identifycpu() bzero(suffix, sizeof suffix); - mc = (mmutype == MMU_68040 ? "40" : - (mmutype == MMU_68030 ? "30" : "20")); + switch (mmutype) { + case MMU_68060: + mc = "60"; + break; + case MMU_68040: + mc = "40"; + break; + case MMU_68030: + mc = "30"; + break; + default: + mc = "20"; + } switch (cputyp) { #ifdef MVME147 - case CPU_147: - bcopy(&brdid.suffix, suffix, sizeof brdid.suffix); - sprintf(suffix, "MVME%x", brdid.model, suffix); - cpuspeed = pccspeed((struct pccreg *)IIOV(0xfffe1000)); - sprintf(speed, "%02d", cpuspeed); - break; + case CPU_147: + bcopy(&brdid.suffix, suffix, sizeof brdid.suffix); + sprintf(suffix, "MVME%x", brdid.model, suffix); + cpuspeed = pccspeed((struct pccreg *)IIOV(0xfffe1000)); + sprintf(speed, "%02d", cpuspeed); + break; #endif -#if defined(MVME162) || defined(MVME167) || defined(MVME177) - case CPU_162: - case CPU_167: - case CPU_177: - bzero(speed, sizeof speed); - speed[0] = brdid.speed[0]; - speed[1] = brdid.speed[1]; - if (brdid.speed[2] != '0' && - brdid.speed[3] != '0') { - speed[2] = '.'; - speed[3] = brdid.speed[2]; - speed[4] = brdid.speed[3]; - } - cpuspeed = (speed[0] - '0') * 10 + (speed[1] - '0'); - bcopy(brdid.longname, suffix, sizeof(brdid.longname)); - for (len = strlen(suffix)-1; len; len--) { - if (suffix[len] == ' ') - suffix[len] = '\0'; - else - break; - } - break; +#if defined(MVME162) || defined(MVME167) || defined(MVME172) || defined(MVME177) + case CPU_162: + case CPU_167: + case CPU_172: + case CPU_177: + bzero(speed, sizeof speed); + speed[0] = brdid.speed[0]; + speed[1] = brdid.speed[1]; + if (brdid.speed[2] != '0' && + brdid.speed[3] != '0') { + speed[2] = '.'; + speed[3] = brdid.speed[2]; + speed[4] = brdid.speed[3]; + } + cpuspeed = (speed[0] - '0') * 10 + (speed[1] - '0'); + bcopy(brdid.longname, suffix, sizeof(brdid.longname)); + for (len = strlen(suffix)-1; len; len--) { + if (suffix[len] == ' ') + suffix[len] = '\0'; + else + break; + } + break; #endif } sprintf(cpu_model, "Motorola %s: %sMHz MC680%s CPU", - suffix, speed, mc); + suffix, speed, mc); switch (mmutype) { - case MMU_68040: + case MMU_68060: + case MMU_68040: #ifdef FPSP - bcopy(&fpsp_tab, &fpvect_tab, - (&fpvect_end - &fpvect_tab) * sizeof (fpvect_tab)); - + bcopy(&fpsp_tab, &fpvect_tab, + (&fpvect_end - &fpvect_tab) * sizeof (fpvect_tab)); #endif - strcat(cpu_model, "+MMU"); - break; - case MMU_68030: - strcat(cpu_model, "+MMU"); - break; - case MMU_68851: - strcat(cpu_model, ", MC68851 MMU"); - break; - default: - printf("%s\nunknown MMU type %d\n", cpu_model, mmutype); - panic("startup"); + strcat(cpu_model, "+MMU"); + break; + case MMU_68030: + strcat(cpu_model, "+MMU"); + break; + case MMU_68851: + strcat(cpu_model, ", MC68851 MMU"); + break; + default: + printf("%s\nunknown MMU type %d\n", cpu_model, mmutype); + panic("startup"); } len = strlen(cpu_model); + if (mmutype == MMU_68060) + len += sprintf(cpu_model + len, + "+FPU, 8k on-chip physical I/D caches"); if (mmutype == MMU_68040) len += sprintf(cpu_model + len, - "+FPU, 4k on-chip physical I/D caches"); + "+FPU, 4k on-chip physical I/D caches"); #if defined(M68030) || defined(M68020) else { int fpu = fpu_gettype(); switch (fpu) { - case 0: - break; - case 1: - case 2: - len += sprintf(cpu_model + len, ", MC6888%d FPU", fpu); - break; - case 3: - len += sprintf(cpu_model + len, ", unknown FPU", speed); - break; + case 0: + break; + case 1: + case 2: + len += sprintf(cpu_model + len, ", MC6888%d FPU", fpu); + break; + case 3: + len += sprintf(cpu_model + len, ", unknown FPU", speed); + break; } } #endif @@ -577,13 +625,13 @@ identifycpu() * machine dependent system variables. */ cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p) - int *name; - u_int namelen; - void *oldp; - size_t *oldlenp; - void *newp; - size_t newlen; - struct proc *p; +int *name; +u_int namelen; +void *oldp; +size_t *oldlenp; +void *newp; +size_t newlen; +struct proc *p; { dev_t consdev; @@ -592,28 +640,28 @@ cpu_sysctl(name, namelen, oldp, oldlenp, newp, newlen, p) return (ENOTDIR); /* overloaded */ switch (name[0]) { - case CPU_CONSDEV: - if (cn_tab != NULL) - consdev = cn_tab->cn_dev; - else - consdev = NODEV; - return (sysctl_rdstruct(oldp, oldlenp, newp, &consdev, - sizeof consdev)); - default: - return (EOPNOTSUPP); + case CPU_CONSDEV: + if (cn_tab != NULL) + consdev = cn_tab->cn_dev; + else + consdev = NODEV; + return (sysctl_rdstruct(oldp, oldlenp, newp, &consdev, + sizeof consdev)); + default: + return (EOPNOTSUPP); } /* NOTREACHED */ } -int waittime = -1; +int waittime = -1; static struct haltvec *halts; /* XXX insert by priority */ void halt_establish(fn, pri) - void (*fn) __P((void)); - int pri; +void (*fn) __P((void)); +int pri; { struct haltvec *hv, *h; @@ -657,7 +705,7 @@ halt_establish(fn, pri) void boot(howto) - register int howto; +register int howto; { /* take a snap shot before clobbering any registers */ @@ -703,9 +751,9 @@ boot(howto) /* * These variables are needed by /sbin/savecore */ -u_long dumpmag = 0x8fca0101; /* magic number */ -int dumpsize = 0; /* pages */ -long dumplo = 0; /* blocks */ +u_long dumpmag = 0x8fca0101; /* magic number */ +int dumpsize = 0; /* pages */ +long dumplo = 0; /* blocks */ /* * This is called by configure to set dumplo and dumpsize. @@ -767,51 +815,123 @@ dumpsys() printf("dump "); switch ((*bdevsw[major(dumpdev)].d_dump)(dumpdev)) { + + case ENXIO: + printf("device bad\n"); + break; - case ENXIO: - printf("device bad\n"); - break; - - case EFAULT: - printf("device not ready\n"); - break; + case EFAULT: + printf("device not ready\n"); + break; - case EINVAL: - printf("area improper\n"); - break; + case EINVAL: + printf("area improper\n"); + break; - case EIO: - printf("i/o error\n"); - break; + case EIO: + printf("i/o error\n"); + break; - case EINTR: - printf("aborted from console\n"); - break; + case EINTR: + printf("aborted from console\n"); + break; - default: - printf("succeeded\n"); - break; + default: + printf("succeeded\n"); + break; } } +#if defined(M68060) +int m68060_pcr_init = 0x21; /* make this patchable */ +#endif + initcpu() { } +void +initvectors() +{ + typedef void trapfun __P((void)); + + /* XXX should init '40 vecs here, too */ +#if defined(M68060) || defined(M68040) + extern trapfun *vectab[256]; + extern trapfun addrerr4060; +#endif + +#ifdef M68060 + extern trapfun buserr60; +#if defined(M060SP) + /*extern u_int8_t I_CALL_TOP[];*/ + extern trapfun intemu60, fpiemu60, fpdemu60, fpeaemu60; + extern u_int8_t FP_CALL_TOP[]; +#else + extern trapfun illinst; +#endif + extern trapfun fpfault; +#endif + +#ifdef M68040 + extern trapfun buserr40; +#endif + +#ifdef FPU_EMULATE + extern trapfun fpemuli; +#endif + +#ifdef M68060 + if (cputyp == CPU_177 || cputyp == CPU_172) { + asm volatile ("movl %0,d0; .word 0x4e7b,0x0808" : : + "d"(m68060_pcr_init):"d0" ); + + /* bus/addrerr vectors */ + vectab[2] = buserr60; + vectab[3] = addrerr4060; +#if defined(M060SP) + + /* integer support */ + vectab[61] = intemu60/*(trapfun *)&I_CALL_TOP[128 + 0x00]*/; + + /* floating point support */ + /* + * XXX maybe we really should run-time check for the + * stack frame format here: + */ + vectab[11] = fpiemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x30]*/; + + vectab[55] = fpdemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x38]*/; + vectab[60] = fpeaemu60/*(trapfun *)&FP_CALL_TOP[128 + 0x40]*/; + + vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; + vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; + vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; + vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; + vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; + vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; +#else + vectab[61] = illinst; +#endif + vectab[48] = fpfault; + } +#endif +} + straytrap(pc, evec) - int pc; - u_short evec; +int pc; +u_short evec; { printf("unexpected trap (vector %d) from %x\n", - (evec & 0xFFF) >> 2, pc); + (evec & 0xFFF) >> 2, pc); } -int *nofault; +int *nofault; int badpaddr(addr, size) - register void *addr; - int size; +register void *addr; +int size; { int off = (int)addr & PGOFSET; caddr_t v, p = (void *)((int)addr & ~PGOFSET); @@ -828,14 +948,14 @@ badpaddr(addr, size) int badvaddr(addr, size) - register caddr_t addr; - int size; +register caddr_t addr; +int size; { register int i; - label_t faultbuf; + label_t faultbuf; #ifdef lint - i = *addr; if (i) return(0); + i = *addr; if (i) return (0); #endif nofault = (int *) &faultbuf; if (setjmp((label_t *)nofault)) { @@ -843,15 +963,15 @@ badvaddr(addr, size) return (1); } switch (size) { - case 1: - i = *(volatile char *)addr; - break; - case 2: - i = *(volatile short *)addr; - break; - case 4: - i = *(volatile long *)addr; - break; + case 1: + i = *(volatile char *)addr; + break; + case 2: + i = *(volatile short *)addr; + break; + case 4: + i = *(volatile long *)addr; + break; } nofault = (int *)0; return (0); @@ -913,7 +1033,7 @@ netintr() * drop into ddb. */ nmihand(frame) - struct frame *frame; +struct frame *frame; { #ifdef DDB printf("NMI ... going to debugger\n"); @@ -925,8 +1045,8 @@ nmihand(frame) } regdump(fp, sbytes) - struct frame *fp; /* must not be register */ - int sbytes; +struct frame *fp; /* must not be register */ +int sbytes; { static int doingdump = 0; register int i; @@ -938,7 +1058,7 @@ regdump(fp, sbytes) s = splhigh(); doingdump = 1; printf("pid = %d, pc = %s, ", - curproc ? curproc->p_pid : -1, hexstr(fp->f_pc, 8)); + curproc ? curproc->p_pid : -1, hexstr(fp->f_pc, 8)); printf("ps = %s, ", hexstr(fp->f_sr, 4)); printf("sfc = %s, ", hexstr(getsfc(), 4)); printf("dfc = %s\n", hexstr(getdfc(), 4)); @@ -954,7 +1074,7 @@ regdump(fp, sbytes) if (sbytes > 0) { if (fp->f_sr & PSL_S) { printf("\n\nKernel stack (%s):", - hexstr((int)(((int *)&fp)-1), 8)); + hexstr((int)(((int *)&fp)-1), 8)); dumpmem(((int *)&fp)-1, sbytes, 0); } else { printf("\n\nUser stack (%s):", hexstr(fp->f_regs[SP], 8)); @@ -968,8 +1088,8 @@ regdump(fp, sbytes) #define KSADDR ((int *)((u_int)curproc->p_addr + USPACE - NBPG)) dumpmem(ptr, sz, ustack) - register int *ptr; - int sz, ustack; +register int *ptr; +int sz, ustack; { register int i, val; extern char *hexstr(); @@ -984,7 +1104,7 @@ dumpmem(ptr, sz, ustack) break; } else { if (ustack == 0 && - (ptr < KSADDR || ptr > KSADDR+(NBPG/4-1))) + (ptr < KSADDR || ptr > KSADDR+(NBPG/4-1))) break; val = *ptr++; } @@ -995,14 +1115,14 @@ dumpmem(ptr, sz, ustack) char * hexstr(val, len) - register int val; - int len; +register int val; +int len; { static char nbuf[9]; register int x, i; if (len > 8) - return(""); + return (""); nbuf[len] = '\0'; for (i = len-1; i >= 0; --i) { x = val & 0xF; @@ -1012,7 +1132,7 @@ hexstr(val, len) nbuf[i] = x + '0'; val >>= 4; } - return(nbuf); + return (nbuf); } #ifdef STACKCHECK @@ -1020,14 +1140,14 @@ char oflowmsg[] = "k-stack overflow"; char uflowmsg[] = "k-stack underflow"; badkstack(oflow, fr) - int oflow; - struct frame fr; +int oflow; +struct frame fr; { extern char kstackatbase[]; printf("%s: sp should be %x\n", - oflow ? oflowmsg : uflowmsg, - kstackatbase - (exframesize[fr.f_format] + 8)); + oflow ? oflowmsg : uflowmsg, + kstackatbase - (exframesize[fr.f_format] + 8)); regdump(&fr, 0); panic(oflow ? oflowmsg : uflowmsg); } @@ -1041,8 +1161,8 @@ badkstack(oflow, fr) * understand and, if so, set up the vmcmds for it. */ cpu_exec_aout_makecmds(p, epp) - struct proc *p; - struct exec_package *epp; +struct proc *p; +struct exec_package *epp; { int error = ENOEXEC; struct exec *execp = epp->ep_hdr; @@ -1050,19 +1170,19 @@ cpu_exec_aout_makecmds(p, epp) #ifdef COMPAT_SUNOS { extern sunos_exec_aout_makecmds - __P((struct proc *, struct exec_package *)); + __P((struct proc *, struct exec_package *)); if ((error = sunos_exec_aout_makecmds(p, epp)) == 0) - return(0); + return (0); } #endif return (error); } -u_char myea[6] = { 0x08, 0x00, 0x3e, 0xff, 0xff, 0xff }; +u_char myea[6] = { 0x08, 0x00, 0x3e, 0xff, 0xff, 0xff}; void myetheraddr(ether) - u_char *ether; +u_char *ether; { bcopy(myea, ether, sizeof myea); } @@ -1075,9 +1195,9 @@ fpu_gettype() * A 68881 idle frame is 28 bytes and a 68882's is 60 bytes. * We, of course, need to have enough room for either. */ - int fpframe[60 / sizeof(int)]; - label_t faultbuf; - u_char b; + int fpframe[60 / sizeof(int)]; + label_t faultbuf; + u_char b; nofault = (int *) &faultbuf; if (setjmp((label_t *)nofault)) { @@ -1118,7 +1238,7 @@ fpu_gettype() #endif -#ifdef MVME162 +#if defined(MVME162) || defined(MVME172) #include <mvme68k/dev/mcreg.h> /* * XXX @@ -1132,29 +1252,29 @@ memsize162() struct mcreg *mc = (struct mcreg *)0xfff42000; switch (mc->mc_memoptions & MC_MEMOPTIONS_DRAMMASK) { - case MC_MEMOPTIONS_DRAM1M: - return (1*1024*1024); - case MC_MEMOPTIONS_DRAM2M: - return (2*1024*1024); - case MC_MEMOPTIONS_DRAM4M: - return (4*1024*1024); - case MC_MEMOPTIONS_DRAM4M2: - return (4*1024*1024); - case MC_MEMOPTIONS_DRAM8M: - return (8*1024*1024); - case MC_MEMOPTIONS_DRAM16M: - return (16*1024*1024); - default: - /* - * XXX if the machine has no MC-controlled memory, - * perhaps it has a MCECC or MEMC040 controller? - */ - return (memsize1x7()); + case MC_MEMOPTIONS_DRAM1M: + return (1*1024*1024); + case MC_MEMOPTIONS_DRAM2M: + return (2*1024*1024); + case MC_MEMOPTIONS_DRAM4M: + return (4*1024*1024); + case MC_MEMOPTIONS_DRAM4M2: + return (4*1024*1024); + case MC_MEMOPTIONS_DRAM8M: + return (8*1024*1024); + case MC_MEMOPTIONS_DRAM16M: + return (16*1024*1024); + default: + /* + * XXX if the machine has no MC-controlled memory, + * perhaps it has a MCECC or MEMC040 controller? + */ + return (memsize1x7()); } } #endif -#if defined(MVME162) || defined(MVME167) || defined(MVME177) +#if defined(MVME162) || defined(MVME167) || defined(MVME177) || defined(MVME172) #include <mvme68k/dev/memcreg.h> /* * XXX @@ -1166,9 +1286,99 @@ int memsize1x7() { struct memcreg *memc = (struct memcreg *)0xfff43000; - u_long x; + u_long x; x = MEMC_MEMCONF_RTOB(memc->memc_memconf); return (x); } #endif + +int foodebug = 0; + +int +memsize(void) +{ + volatile unsigned int *look; + unsigned int *max; + extern char *end; +#define MAXPHYSMEM (unsigned long)0x10000000 /* max physical memory */ +#define PATTERN 0x5a5a5a5a +#define STRIDE (4*1024) /* 4k at a time */ +#define Roundup(value, stride) (((unsigned)(value) + (stride) - 1) & ~((stride)-1)) + /* + * Put machine specific exception vectors in place. + */ + initvectors(); + /* + * count it up. + */ + max = (void*)MAXPHYSMEM; + for (look = (void*)Roundup(end, STRIDE); look < max; + look = (int*)((unsigned)look + STRIDE)) { + unsigned save; + + /* if can't access, we've reached the end */ + if (foodebug) printf("%x\n", look); + if (badvaddr((caddr_t)look, 2)) { +#if defined(DEBUG) + printf("%x\n", look); +#endif + look = (int *)((int)look - STRIDE); + break; + } + + /* + * If we write a value, we expect to read the same value back. + * We'll do this twice, the 2nd time with the opposite bit + * pattern from the first, to make sure we check all bits. + */ + save = *look; + if (*look = PATTERN, *look != PATTERN) + break; + if (*look = ~PATTERN, *look != ~PATTERN) + break; + *look = save; + } + physmem = btoc(trunc_page((unsigned)look)); /* in pages */ + return (trunc_page((unsigned)look)); +} + +/* + * Boot console routines: + * Enables printing of boot messages before consinit(). + */ + +void +bootcnprobe(cp) +struct consdev *cp; +{ + cp->cn_dev = makedev(14, 0); + cp->cn_pri = CN_NORMAL; + return; +} + +void +bootcninit(cp) +struct consdev *cp; +{ + /* Nothing to do */ +} + +int +bootcngetc(dev) +dev_t dev; +{ + return (bug_inchr()); +} + +void +bootcnputc(dev, c) +dev_t dev; +int c; +{ + int s; + char cc = (char)c; + if (cc == '\n') + bug_outchr('\r'); + bug_outchr(cc); +} diff --git a/sys/arch/mvme68k/mvme68k/pmap.c b/sys/arch/mvme68k/mvme68k/pmap.c index 621c71644ed..250913916be 100644 --- a/sys/arch/mvme68k/mvme68k/pmap.c +++ b/sys/arch/mvme68k/mvme68k/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.13 1999/09/27 20:30:32 smurph Exp $ */ +/* $OpenBSD: pmap.c,v 1.14 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -187,7 +187,6 @@ struct chgstats { #ifdef DEBUG int debugmap = 0; -int pmapdebug = 0x2000; #define PDB_FOLLOW 0x0001 #define PDB_INIT 0x0002 #define PDB_ENTER 0x0004 @@ -203,8 +202,10 @@ int pmapdebug = 0x2000; #define PDB_PARANOIA 0x2000 #define PDB_WIRING 0x4000 #define PDB_PVDUMP 0x8000 +#define PDB_ALL 0xFFFF +int pmapdebug = PDB_ALL; -#if defined(M68040) +#if defined(M68040) || defined(M68060) int dowriteback = 1; /* 68040: enable writeback caching */ int dokwriteback = 1; /* 68040: enable writeback caching of kernel AS */ #endif @@ -215,7 +216,7 @@ extern vm_offset_t pager_sva, pager_eva; /* * Get STEs and PTEs for user/kernel address space */ -#if defined(M68040) +#if defined(M68040) || defined(M68060) #define pmap_ste1(m, v) \ (&((m)->pm_stab[(vm_offset_t)(v) >> SG4_SHIFT1])) /* XXX assumes physically contiguous ST pages (if more than one) */ @@ -224,9 +225,9 @@ extern vm_offset_t pager_sva, pager_eva; - (m)->pm_stpa + (((v) & SG4_MASK2) >> SG4_SHIFT2)])) #define pmap_ste(m, v) \ (&((m)->pm_stab[(vm_offset_t)(v) \ - >> (mmutype == MMU_68040 ? SG4_SHIFT1 : SG_ISHIFT)])) + >> (mmutype <= MMU_68040 ? SG4_SHIFT1 : SG_ISHIFT)])) #define pmap_ste_v(m, v) \ - (mmutype == MMU_68040 \ + (mmutype <= MMU_68040 \ ? ((*pmap_ste1(m, v) & SG_V) && \ (*pmap_ste2(m, v) & SG_V)) \ : (*pmap_ste(m, v) & SG_V)) @@ -299,7 +300,7 @@ char *pmap_attributes; /* reference and modify bits */ TAILQ_HEAD(pv_page_list, pv_page) pv_page_freelist; int pv_nfree; -#if defined(M68040) +#if defined(M68040) || defined(M68060) int protostfree; /* prototype (default) free ST map */ #endif @@ -488,6 +489,17 @@ bogons: Segtabzero = (st_entry_t *) addr; Segtabzeropa = (st_entry_t *) pmap_extract(pmap_kernel(), addr); +#ifdef M68060 + if (mmutype == MMU_68060) { + addr2 = addr; + while (addr2 < addr + M68K_STSIZE) { + pmap_changebit(addr2, PG_CCB, 0); + pmap_changebit(addr2, PG_CI, 1); + addr2 += NBPG; + } + DCIS(); + } +#endif addr += M68K_STSIZE; pv_table = (struct pv_entry *) addr; @@ -551,6 +563,13 @@ bogons: kpt_free_list = kpt_pages; kpt_pages->kpt_va = addr2; kpt_pages->kpt_pa = pmap_extract(pmap_kernel(), addr2); +#ifdef M68060 + if (mmutype == MMU_68060) { + pmap_changebit(kpt_pages->kpt_pa, PG_CCB, 0); + pmap_changebit(kpt_pages->kpt_pa, PG_CI, 1); + DCIS(); + } +#endif } while (addr != addr2); #ifdef PMAPSTATS kpt_stats.kpttotal = atop(s); @@ -599,8 +618,8 @@ bogons: printf("pmap_init: pt_map [%x - %x)\n", addr, addr2); #endif -#if defined(M68040) - if (mmutype == MMU_68040) { +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) { protostfree = ~l2tobm(0); for (rv = MAXUL2SIZE; rv < sizeof(protostfree)*NBBY; rv++) protostfree &= ~l2tobm(rv); @@ -820,8 +839,8 @@ pmap_pinit(pmap) */ pmap->pm_stab = Segtabzero; pmap->pm_stpa = Segtabzeropa; -#if defined(M68040) - if (mmutype == MMU_68040) +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) pmap->pm_stfree = protostfree; #endif pmap->pm_stchanged = TRUE; @@ -1109,12 +1128,12 @@ pmap_protect(pmap, sva, eva, prot) pte = pmap_pte(pmap, sva); while (sva < nssva) { if (pmap_pte_v(pte) && pmap_pte_prot_chg(pte, isro)) { -#if defined(M68040) +#if defined(M68040) || defined(M68060) /* * Clear caches if making RO (see section * "7.3 Cache Coherency" in the manual). */ - if (isro && mmutype == MMU_68040) { + if (isro && mmutype <= MMU_68040) { vm_offset_t pa = pmap_pte_pa(pte); DCFP(pa); @@ -1357,15 +1376,15 @@ validate: npte |= PG_W; /* Don't cache if process can't take it, like SunOS ones. */ - if (mmutype == MMU_68040 && pmap != pmap_kernel() && + if (mmutype <= MMU_68040 && pmap != pmap_kernel() && (curproc->p_md.md_flags & MDP_UNCACHE_WX) && (prot & VM_PROT_EXECUTE) && (prot & VM_PROT_WRITE)) checkpv = cacheable = FALSE; if (!checkpv && !cacheable) npte |= PG_CI; -#if defined(M68040) - if (mmutype == MMU_68040 && (npte & (PG_PROT|PG_CI)) == PG_RW) +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040 && (npte & (PG_PROT|PG_CI)) == PG_RW) #ifdef DEBUG if (dowriteback && (dokwriteback || pmap != pmap_kernel())) #endif @@ -1380,8 +1399,8 @@ validate: * If so, we need not flush the TLB and caches. */ wired = ((*pte ^ npte) == PG_W); -#if defined(M68040) - if (mmutype == MMU_68040 && !wired) { +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040 && !wired) { DCFP(pa); ICPP(pa); } @@ -1517,6 +1536,10 @@ void pmap_update() if (pmapdebug & PDB_FOLLOW) printf("pmap_update()\n"); #endif +#if defined(M68060) + if (mmutype == MMU_68060) + DCIA(); +#endif TBIA(); } @@ -1604,7 +1627,7 @@ pmap_collect1(pmap, startpa, endpa) } while ((pv = pv->pv_next)); if (pv == NULL) continue; -#ifdef DEBUG +#ifdef DEBUG1 if (pv->pv_va < (vm_offset_t)Sysmap || pv->pv_va >= (vm_offset_t)Sysmap + HP_MAX_PTSIZE) printf("collect: kernel PT VA out of range\n"); @@ -2073,8 +2096,8 @@ pmap_remove_mapping(pmap, va, pte, flags) printf("remove: ste was %x@%x pte was %x@%x\n", *ste, ste, opte, pmap_pte(pmap, va)); #endif -#if defined(M68040) - if (mmutype == MMU_68040) { +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) { st_entry_t *este = &ste[NPTEPG/SG4_LEV3SIZE]; while (ste < este) @@ -2110,8 +2133,8 @@ pmap_remove_mapping(pmap, va, pte, flags) M68K_STSIZE); ptpmap->pm_stab = Segtabzero; ptpmap->pm_stpa = Segtabzeropa; -#if defined(M68040) - if (mmutype == MMU_68040) +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) ptpmap->pm_stfree = protostfree; #endif ptpmap->pm_stchanged = TRUE; @@ -2205,6 +2228,7 @@ pmap_changebit(pa, bit, setem) struct chgstats *chgp; #endif + #ifdef DEBUG if (pmapdebug & PDB_BITS) printf("pmap_changebit(%x, %x, %s)\n", @@ -2257,13 +2281,13 @@ pmap_changebit(pa, bit, setem) else npte = *pte & ~bit; if (*pte != npte) { -#if defined(M68040) +#if defined(M68040) || defined(M68060) /* * If we are changing caching status or * protection make sure the caches are * flushed (but only once). */ - if (firstpage && mmutype == MMU_68040 && + if (firstpage && mmutype <= MMU_68040 && (bit == PG_RO && setem || (bit & PG_CMASK))) { firstpage = FALSE; @@ -2302,6 +2326,9 @@ pmap_enter_ptpage(pmap, va) { register vm_offset_t ptpa; register struct pv_entry *pv; +#ifdef M68060 + u_int stpa; +#endif st_entry_t *ste; int s; @@ -2324,12 +2351,25 @@ pmap_enter_ptpage(pmap, va) kmem_alloc(st_map, M68K_STSIZE); pmap->pm_stpa = (st_entry_t *) pmap_extract(pmap_kernel(), (vm_offset_t)pmap->pm_stab); -#if defined(M68040) - if (mmutype == MMU_68040) { +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) { #ifdef DEBUG if (dowriteback && dokwriteback) #endif - pmap_changebit((vm_offset_t)pmap->pm_stpa, PG_CCB, 0); +#if defined(M68060) + stpa = (u_int)pmap->pm_stpa; + if (mmutype == MMU_68060) { + while (stpa < (u_int)pmap->pm_stpa + + M68K_STSIZE) { + pmap_changebit(stpa, PG_CCB, 0); + pmap_changebit(stpa, PG_CI, 1); + stpa += NBPG; + } + DCIS(); /* XXX */ + } + else +#endif + pmap_changebit((vm_offset_t)pmap->pm_stpa, PG_CCB, 0); pmap->pm_stfree = protostfree; } #endif @@ -2348,11 +2388,11 @@ pmap_enter_ptpage(pmap, va) } ste = pmap_ste(pmap, va); -#if defined(M68040) +#if defined(M68040) || defined(M68060) /* * Allocate level 2 descriptor block if necessary */ - if (mmutype == MMU_68040) { + if (mmutype <= MMU_68040) { if (*ste == SG_NV) { int ix; caddr_t addr; @@ -2421,6 +2461,13 @@ pmap_enter_ptpage(pmap, va) ptpa = kpt->kpt_pa; bzero((caddr_t)kpt->kpt_va, NBPG); pmap_enter(pmap, va, ptpa, VM_PROT_DEFAULT, TRUE, VM_PROT_DEFAULT); +#if defined(M68060) + if (mmutype == MMU_68060) { + pmap_changebit(ptpa, PG_CCB, 0); + pmap_changebit(ptpa, PG_CI, 1); + DCIS(); + } +#endif #ifdef DEBUG if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) { int ix = pmap_ste(pmap, va) - pmap_ste(pmap, 0); @@ -2461,7 +2508,7 @@ pmap_enter_ptpage(pmap, va) PHYS_TO_VM_PAGE(ptpa)->flags |= PG_PTPAGE; #endif } -#if defined(M68040) +#if defined(M68040) || defined(M68060) /* * Turn off copyback caching of page table pages, * could get ugly otherwise. @@ -2469,7 +2516,7 @@ pmap_enter_ptpage(pmap, va) #ifdef DEBUG if (dowriteback && dokwriteback) #endif - if (mmutype == MMU_68040) { + if (mmutype <= MMU_68040) { pt_entry_t *pte = pmap_pte(pmap_kernel(), va); #ifdef DEBUG if ((pmapdebug & PDB_PARANOIA) && (*pte & PG_CCB) == 0) @@ -2478,6 +2525,12 @@ pmap_enter_ptpage(pmap, va) va, ptpa, pte, *pte); #endif pmap_changebit(ptpa, PG_CCB, 0); +#ifdef M68060 + if (mmutype == MMU_68060) { + pmap_changebit(ptpa, PG_CI, 1); + DCIS(); + } +#endif } #endif /* @@ -2526,8 +2579,8 @@ pmap_enter_ptpage(pmap, va) * it would be difficult to identify ST pages in pmap_pageable to * release them. We also avoid the overhead of vm_map_pageable. */ -#if defined(M68040) - if (mmutype == MMU_68040) { +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) { st_entry_t *este; for (este = &ste[NPTEPG/SG4_LEV3SIZE]; ste < este; ste++) { diff --git a/sys/arch/mvme68k/mvme68k/pmap_bootstrap.c b/sys/arch/mvme68k/mvme68k/pmap_bootstrap.c index 30ba709b04c..9383afedf7b 100644 --- a/sys/arch/mvme68k/mvme68k/pmap_bootstrap.c +++ b/sys/arch/mvme68k/mvme68k/pmap_bootstrap.c @@ -1,7 +1,8 @@ -/* $OpenBSD: pmap_bootstrap.c,v 1.3 1996/04/28 10:59:08 deraadt Exp $ */ +/* $OpenBSD: pmap_bootstrap.c,v 1.4 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt + * Copyright (c) 1999 Steve Murphree, Jr. (68060 support) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -101,11 +102,383 @@ extern int protection_codes[]; * ledbase: SPU LEDs * msgbufp: kernel message buffer */ -caddr_t CADDR1, CADDR2, vmmap, ledbase; -struct msgbuf *msgbufp; +caddr_t CADDR1, CADDR2, vmmap, ledbase; +struct msgbuf *msgbufp; #define ETHERPAGES 16 -void *etherbuf; -int etherlen; +void *etherbuf; +int etherlen; + +void +pmap_bootstrap060(nextpa, firstpa) +vm_offset_t nextpa; +register vm_offset_t firstpa; +{ + vm_offset_t kstpa, kptpa, iiopa, eiopa, kptmpa, lkptpa, p0upa; + u_int nptpages, kstsize; + register st_entry_t protoste, *ste; + register pt_entry_t protopte, *pte, *epte; + + /* + * Calculate important physical addresses: + * + * kstpa kernel segment table 1 page (!040) + * N pages (040) + * + * kptpa statically allocated + * kernel PT pages Sysptsize+ pages + * + * iiopa internal IO space + * PT pages iiomapsize pages + * + * eiopa external IO space + * PT pages EIOMAPSIZE pages + * + * [ Sysptsize is the number of pages of PT, iiomapsize and + * EIOMAPSIZE are the number of PTEs, hence we need to round + * the total to a page boundary with IO maps at the end. ] + * + * kptmpa kernel PT map 1 page + * + * lkptpa last kernel PT page 1 page + * + * p0upa proc 0 u-area UPAGES pages + * + * The KVA corresponding to any of these PAs is: + * (PA - firstpa + KERNBASE). + * NPTEPG == 1024 + */ + kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); + kstpa = nextpa; + nextpa += kstsize * NBPG; + kptpa = nextpa; + nptpages = RELOC(Sysptsize, int) + + (RELOC(iiomapsize, int) + EIOMAPSIZE + NPTEPG - 1) / NPTEPG; + nextpa += nptpages * NBPG; + eiopa = nextpa - EIOMAPSIZE * sizeof(pt_entry_t); + iiopa = eiopa - RELOC(iiomapsize, int) * sizeof(pt_entry_t); + kptmpa = nextpa; + nextpa += NBPG; + lkptpa = nextpa; + nextpa += NBPG; + p0upa = nextpa; + nextpa += USPACE; + + RELOC(etherbuf, void *) = (void *)nextpa; + nextpa += ETHERPAGES * NBPG; + + /* + * Initialize segment table and kernel page table map. + * + * On the 68060, which has a mandatory 3-level structure, the + * segment table holds the level 1 table and part (or all) of + * the level 2 table. The first level consists of 128 descriptors + * (512 bytes) each mapping 32mb of address space. Each of these + * points to blocks of 128 second level descriptors (512 bytes) + * each mapping 256kb. Note that there may be additional "segment + * table" pages depending on how large MAXKL2SIZE is. + * + * Portions of the last segment of KVA space (0xFFF00000 - + * 0xFFFFFFFF) are mapped for a couple of purposes. 0xFFF00000 + * for UPAGES is used for mapping the current process u-area + * (u + kernel stack). The very last page (0xFFFFF000) is mapped + * to the last physical page of RAM to give us a region in which + * PA == VA. We use the first part of this page for enabling + * and disabling mapping. The last part of this page also contains + * info left by the boot ROM. + */ + + { + register int num; + + /* + * First invalidate the entire "segment table" pages + * (levels 1 and 2 have the same "invalid" value). + */ + pte = (u_int *)kstpa; + epte = &pte[kstsize * NPTEPG]; + while (pte < epte) + *pte++ = SG_NV; + /* + * Initialize level 2 descriptors (which immediately + * follow the level 1 table). We need: + * NPTEPG / SG4_LEV3SIZE + * level 2 descriptors to map each of the nptpages+1 + * pages of PTEs. Note that we set the "used" bit + * now to save the HW the expense of doing it. + */ + num = (nptpages + 1) * (NPTEPG / SG4_LEV3SIZE); + pte = &((u_int *)kstpa)[SG4_LEV1SIZE]; + epte = &pte[num]; + protoste = kptpa | SG_U | SG_RW | SG_V; + while (pte < epte) { + *pte++ = protoste; + protoste += (SG4_LEV3SIZE * sizeof(st_entry_t)); + } + /* + * Initialize level 1 descriptors. We need: + * roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE + * level 1 descriptors to map the `num' level 2's. + */ + pte = (u_int *)kstpa; + epte = &pte[roundup(num, SG4_LEV2SIZE) / SG4_LEV2SIZE]; + protoste = (u_int)&pte[SG4_LEV1SIZE] | SG_U | SG_RW | SG_V; + while (pte < epte) { + *pte++ = protoste; + protoste += (SG4_LEV2SIZE * sizeof(st_entry_t)); + } + /* + * Initialize the final level 1 descriptor to map the last + * block of level 2 descriptors. + */ + ste = &((u_int *)kstpa)[SG4_LEV1SIZE-1]; + pte = &((u_int *)kstpa)[kstsize*NPTEPG - SG4_LEV2SIZE]; + *ste = (u_int)pte | SG_U | SG_RW | SG_V; + /* + * Now initialize the final portion of that block of + * descriptors to map the "last PT page". + */ + pte = &((u_int *)kstpa)[kstsize*NPTEPG - NPTEPG/SG4_LEV3SIZE]; + epte = &pte[NPTEPG/SG4_LEV3SIZE]; + protoste = lkptpa | SG_U | SG_RW | SG_V; + while (pte < epte) { + *pte++ = protoste; + protoste += (SG4_LEV3SIZE * sizeof(st_entry_t)); + } + /* + * Initialize Sysptmap + */ + pte = (u_int *)kptmpa; + epte = &pte[nptpages+1]; + protopte = kptpa | PG_RW | PG_CI | PG_V | PG_U; + while (pte < epte) { + *pte++ = protopte; + protopte += NBPG; + } + /* + * Invalidate all but the last remaining entries in both. + */ + epte = &((u_int *)kptmpa)[NPTEPG-1]; + while (pte < epte) { + *pte++ = PG_NV | PG_U; /* XXX */ + } + pte = &((u_int *)kptmpa)[NPTEPG-1]; + *pte = lkptpa | PG_RW | PG_CI | PG_V | PG_U; + } + + /* + * Invalidate all but the final entry in the last kernel PT page + * (u-area PTEs will be validated later). The final entry maps + * the last page of physical memory. + */ + pte = (u_int *)lkptpa; + epte = &pte[NPTEPG-1]; + while (pte < epte) + *pte++ = PG_NV; +#ifdef MAXADDR + /* tmp double-map for cpu's with physmem at the end of memory */ + *pte = MAXADDR | PG_RW | PG_CI | PG_V | PG_U; +#endif + /* + * Initialize kernel page table. + * Start by invalidating the `nptpages' that we have allocated. + */ + pte = (u_int *)kptpa; + epte = &pte[nptpages * NPTEPG]; + while (pte < epte) + *pte++ = PG_NV | PG_U; + /* + * Validate PTEs for kernel text (RO) + */ + pte = &((u_int *)kptpa)[m68k_btop(KERNBASE)]; + epte = &pte[m68k_btop(m68k_trunc_page(&etext))]; +#if defined(KGDB) || defined(DDB) + protopte = firstpa | PG_RW | PG_V | PG_U; /* XXX RW for now */ +#else + protopte = firstpa | PG_RO | PG_V | PG_U; +#endif + *pte++ = firstpa | PG_NV; /* make *NULL fail in the kernel */ + protopte += NBPG; + while (pte < epte) { + *pte++ = protopte; + protopte += NBPG; + } + /* + * Validate PTEs for kernel data/bss, dynamic data allocated + * by us so far (nextpa - firstpa bytes), and pages for proc0 + * u-area and page table allocated below (RW). + */ + epte = &((u_int *)kptpa)[m68k_btop(nextpa - firstpa)]; + protopte = (protopte & ~PG_PROT) | PG_RW | PG_U; + /* + * Enable write-through caching of data pages + */ + protopte |= PG_CWT; /* XXX */; + while (pte < epte) { + *pte++ = protopte; + protopte += NBPG; + } + + pte = &((u_int *)kptpa)[m68k_btop(etherbuf)]; + epte = pte + ETHERPAGES; + while (pte < epte) { + *pte = (*pte & ~PG_CMASK) | PG_CIS | PG_U; + pte++; + } + RELOC(etherlen, int) = ETHERPAGES * NBPG; + + /* + * Finally, validate the internal IO space PTEs (RW+CI). + * We do this here since the 320/350 MMU registers (also + * used, but to a lesser extent, on other models) are mapped + * in this range and it would be nice to be able to access + * them after the MMU is turned on. + */ + pte = (u_int *)iiopa; + epte = (u_int *)eiopa; + protopte = RELOC(iiomapbase, int) | PG_RW | PG_CI | PG_V | PG_U; + while (pte < epte) { + *pte++ = protopte; + protopte += NBPG; + } + + /* + * Calculate important exported kernel virtual addresses + */ + /* + * Sysseg: base of kernel segment table + */ + RELOC(Sysseg, st_entry_t *) = + (st_entry_t *)(kstpa - firstpa); + /* + * Sysptmap: base of kernel page table map + */ + RELOC(Sysptmap, pt_entry_t *) = + (pt_entry_t *)(kptmpa - firstpa); + /* + * Sysmap: kernel page table (as mapped through Sysptmap) + * Immediately follows `nptpages' of static kernel page table. + */ + RELOC(Sysmap, pt_entry_t *) = + (pt_entry_t *)m68k_ptob(nptpages * NPTEPG); + /* + * intiobase, intiolimit: base and end of internal (DIO) IO space. + * iiomapsize pages prior to external IO space at end of static + * kernel page table. + */ + RELOC(intiobase, char *) = (char *) + m68k_ptob(nptpages*NPTEPG - (RELOC(iiomapsize, int)+EIOMAPSIZE)); + RELOC(intiolimit, char *) = (char *) + m68k_ptob(nptpages*NPTEPG - EIOMAPSIZE); + /* + * extiobase: base of external (DIO-II) IO space. + * EIOMAPSIZE pages at the end of the static kernel page table. + */ + RELOC(extiobase, char *) = + (char *)m68k_ptob(nptpages*NPTEPG - EIOMAPSIZE); + + /* + * Setup u-area for process 0. + */ + /* + * Zero the u-area. + * NOTE: `pte' and `epte' aren't PTEs here. + */ + pte = (u_int *)p0upa; + epte = (u_int *)(p0upa + USPACE); + while (pte < epte) + *pte++ = 0; + /* + * Remember the u-area address so it can be loaded in the + * proc struct p_addr field later. + */ + RELOC(proc0paddr, char *) = (char *)(p0upa - firstpa); + + /* + * VM data structures are now initialized, set up data for + * the pmap module. + */ + RELOC(avail_start, vm_offset_t) = nextpa; + RELOC(avail_end, vm_offset_t) = m68k_ptob(RELOC(maxmem, int)) + /* XXX allow for msgbuf */ + - m68k_round_page(sizeof(struct msgbuf)); + RELOC(mem_size, vm_size_t) = m68k_ptob(RELOC(physmem, int)); + RELOC(virtual_avail, vm_offset_t) = + VM_MIN_KERNEL_ADDRESS + (nextpa - firstpa); + RELOC(virtual_end, vm_offset_t) = VM_MAX_KERNEL_ADDRESS; + + /* + * Initialize protection array. + * XXX don't use a switch statement, it might produce an + * absolute "jmp" table. + */ + { + register int *kp; + + kp = &RELOC(protection_codes, int); + kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_NONE] = 0; + kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_NONE] = PG_RO; + kp[VM_PROT_READ|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO; + kp[VM_PROT_NONE|VM_PROT_NONE|VM_PROT_EXECUTE] = PG_RO; + kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW; + kp[VM_PROT_NONE|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW; + kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_NONE] = PG_RW; + kp[VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE] = PG_RW; + } + + /* + * Kernel page/segment table allocated in locore, + * just initialize pointers. + */ + { + struct pmap *kpm = &RELOC(kernel_pmap_store, struct pmap); + + kpm->pm_stab = RELOC(Sysseg, st_entry_t *); + kpm->pm_ptab = RELOC(Sysmap, pt_entry_t *); + simple_lock_init(&kpm->pm_lock); + kpm->pm_count = 1; + kpm->pm_stpa = (st_entry_t *)kstpa; + /* + * For the 060 we also initialize the free level 2 + * descriptor mask noting that we have used: + * 0: level 1 table + * 1 to `num': map page tables + * MAXKL2SIZE-1: maps last-page page table + */ + { + register int num; + + kpm->pm_stfree = ~l2tobm(0); + num = roundup((nptpages + 1) * (NPTEPG / SG4_LEV3SIZE), + SG4_LEV2SIZE) / SG4_LEV2SIZE; + while (num) + kpm->pm_stfree &= ~l2tobm(num--); + kpm->pm_stfree &= ~l2tobm(MAXKL2SIZE-1); + for (num = MAXKL2SIZE; + num < sizeof(kpm->pm_stfree)*NBBY; + num++) + kpm->pm_stfree &= ~l2tobm(num); + } + } + + /* + * Allocate some fixed, special purpose kernel virtual addresses + */ + { + vm_offset_t va = RELOC(virtual_avail, vm_offset_t); + + RELOC(CADDR1, caddr_t) = (caddr_t)va; + va += NBPG; + RELOC(CADDR2, caddr_t) = (caddr_t)va; + va += NBPG; + RELOC(vmmap, caddr_t) = (caddr_t)va; + va += NBPG; + RELOC(ledbase, caddr_t) = (caddr_t)va; + va += NBPG; + RELOC(msgbufp, struct msgbuf *) = (struct msgbuf *)va; + va += NBPG; + RELOC(virtual_avail, vm_offset_t) = va; + } +} /* * Bootstrap the VM system. @@ -120,8 +493,8 @@ int etherlen; */ void pmap_bootstrap(nextpa, firstpa) - vm_offset_t nextpa; - register vm_offset_t firstpa; +vm_offset_t nextpa; +register vm_offset_t firstpa; { vm_offset_t kstpa, kptpa, iiopa, eiopa, kptmpa, lkptpa, p0upa; u_int nptpages, kstsize; @@ -164,7 +537,7 @@ pmap_bootstrap(nextpa, firstpa) nextpa += kstsize * NBPG; kptpa = nextpa; nptpages = RELOC(Sysptsize, int) + - (RELOC(iiomapsize, int) + EIOMAPSIZE + NPTEPG - 1) / NPTEPG; + (RELOC(iiomapsize, int) + EIOMAPSIZE + NPTEPG - 1) / NPTEPG; nextpa += nptpages * NBPG; eiopa = nextpa - EIOMAPSIZE * sizeof(pt_entry_t); iiopa = eiopa - RELOC(iiomapsize, int) * sizeof(pt_entry_t); @@ -268,7 +641,7 @@ pmap_bootstrap(nextpa, firstpa) */ pte = (u_int *)kptmpa; epte = &pte[nptpages+1]; - protopte = kptpa | PG_RW | PG_CI | PG_V; + protopte = kptpa | PG_RW | PG_CI | PG_V | PG_U; while (pte < epte) { *pte++ = protopte; protopte += NBPG; @@ -281,7 +654,7 @@ pmap_bootstrap(nextpa, firstpa) *pte++ = PG_NV; } pte = &((u_int *)kptmpa)[NPTEPG-1]; - *pte = lkptpa | PG_RW | PG_CI | PG_V; + *pte = lkptpa | PG_RW | PG_CI | PG_V | PG_U; } else { /* * Map the page table pages in both the HW segment table @@ -325,7 +698,7 @@ pmap_bootstrap(nextpa, firstpa) *pte++ = PG_NV; #ifdef MAXADDR /* tmp double-map for cpu's with physmem at the end of memory */ - *pte = MAXADDR | PG_RW | PG_CI | PG_V; + *pte = MAXADDR | PG_RW | PG_CI | PG_V | PG_U; #endif /* * Initialize kernel page table. @@ -334,16 +707,16 @@ pmap_bootstrap(nextpa, firstpa) pte = (u_int *)kptpa; epte = &pte[nptpages * NPTEPG]; while (pte < epte) - *pte++ = PG_NV; + *pte++ = PG_NV | PG_U; /* * Validate PTEs for kernel text (RO) */ pte = &((u_int *)kptpa)[m68k_btop(KERNBASE)]; epte = &pte[m68k_btop(m68k_trunc_page(&etext))]; #if defined(KGDB) || defined(DDB) - protopte = firstpa | PG_RW | PG_V; /* XXX RW for now */ + protopte = firstpa | PG_RW | PG_V | PG_U; /* XXX RW for now */ #else - protopte = firstpa | PG_RO | PG_V; + protopte = firstpa | PG_RO | PG_V | PG_U; #endif *pte++ = firstpa | PG_NV; /* make *NULL fail in the kernel */ protopte += NBPG; @@ -357,7 +730,7 @@ pmap_bootstrap(nextpa, firstpa) * u-area and page table allocated below (RW). */ epte = &((u_int *)kptpa)[m68k_btop(nextpa - firstpa)]; - protopte = (protopte & ~PG_PROT) | PG_RW; + protopte = (protopte & ~PG_PROT) | PG_RW | PG_U; /* * Enable copy-back caching of data pages */ @@ -372,10 +745,9 @@ pmap_bootstrap(nextpa, firstpa) epte = pte + ETHERPAGES; if (RELOC(mmutype, int) == MMU_68040) while (pte < epte) { - *pte = (*pte & ~PG_CMASK) | PG_CIS; + *pte = (*pte & ~PG_CMASK) | PG_CIS | PG_U; pte++; - } - else + } else while (pte < epte) { *pte++ |= PG_CI; } @@ -390,7 +762,7 @@ pmap_bootstrap(nextpa, firstpa) */ pte = (u_int *)iiopa; epte = (u_int *)eiopa; - protopte = RELOC(iiomapbase, int) | PG_RW | PG_CI | PG_V; + protopte = RELOC(iiomapbase, int) | PG_RW | PG_CI | PG_V | PG_U; while (pte < epte) { *pte++ = protopte; protopte += NBPG; @@ -403,33 +775,33 @@ pmap_bootstrap(nextpa, firstpa) * Sysseg: base of kernel segment table */ RELOC(Sysseg, st_entry_t *) = - (st_entry_t *)(kstpa - firstpa); + (st_entry_t *)(kstpa - firstpa); /* * Sysptmap: base of kernel page table map */ RELOC(Sysptmap, pt_entry_t *) = - (pt_entry_t *)(kptmpa - firstpa); + (pt_entry_t *)(kptmpa - firstpa); /* * Sysmap: kernel page table (as mapped through Sysptmap) * Immediately follows `nptpages' of static kernel page table. */ RELOC(Sysmap, pt_entry_t *) = - (pt_entry_t *)m68k_ptob(nptpages * NPTEPG); + (pt_entry_t *)m68k_ptob(nptpages * NPTEPG); /* * intiobase, intiolimit: base and end of internal (DIO) IO space. * iiomapsize pages prior to external IO space at end of static * kernel page table. */ RELOC(intiobase, char *) = (char *) - m68k_ptob(nptpages*NPTEPG - (RELOC(iiomapsize, int)+EIOMAPSIZE)); + m68k_ptob(nptpages*NPTEPG - (RELOC(iiomapsize, int)+EIOMAPSIZE)); RELOC(intiolimit, char *) = (char *) - m68k_ptob(nptpages*NPTEPG - EIOMAPSIZE); + m68k_ptob(nptpages*NPTEPG - EIOMAPSIZE); /* * extiobase: base of external (DIO-II) IO space. * EIOMAPSIZE pages at the end of the static kernel page table. */ RELOC(extiobase, char *) = - (char *)m68k_ptob(nptpages*NPTEPG - EIOMAPSIZE); + (char *)m68k_ptob(nptpages*NPTEPG - EIOMAPSIZE); /* * Setup u-area for process 0. @@ -453,13 +825,12 @@ pmap_bootstrap(nextpa, firstpa) * the pmap module. */ RELOC(avail_start, vm_offset_t) = nextpa; - RELOC(avail_end, vm_offset_t) = - m68k_ptob(RELOC(maxmem, int)) - /* XXX allow for msgbuf */ - - m68k_round_page(sizeof(struct msgbuf)); + RELOC(avail_end, vm_offset_t) = m68k_ptob(RELOC(maxmem, int)) + /* XXX allow for msgbuf */ + - m68k_round_page(sizeof(struct msgbuf)); RELOC(mem_size, vm_size_t) = m68k_ptob(RELOC(physmem, int)); RELOC(virtual_avail, vm_offset_t) = - VM_MIN_KERNEL_ADDRESS + (nextpa - firstpa); + VM_MIN_KERNEL_ADDRESS + (nextpa - firstpa); RELOC(virtual_end, vm_offset_t) = VM_MAX_KERNEL_ADDRESS; /* @@ -502,16 +873,16 @@ pmap_bootstrap(nextpa, firstpa) */ if (RELOC(mmutype, int) == MMU_68040) { register int num; - + kpm->pm_stfree = ~l2tobm(0); num = roundup((nptpages + 1) * (NPTEPG / SG4_LEV3SIZE), - SG4_LEV2SIZE) / SG4_LEV2SIZE; + SG4_LEV2SIZE) / SG4_LEV2SIZE; while (num) kpm->pm_stfree &= ~l2tobm(num--); kpm->pm_stfree &= ~l2tobm(MAXKL2SIZE-1); for (num = MAXKL2SIZE; - num < sizeof(kpm->pm_stfree)*NBBY; - num++) + num < sizeof(kpm->pm_stfree)*NBBY; + num++) kpm->pm_stfree &= ~l2tobm(num); } } diff --git a/sys/arch/mvme68k/mvme68k/sys_machdep.c b/sys/arch/mvme68k/mvme68k/sys_machdep.c index 736457d888a..98d3a029bab 100644 --- a/sys/arch/mvme68k/mvme68k/sys_machdep.c +++ b/sys/arch/mvme68k/mvme68k/sys_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: sys_machdep.c,v 1.6 1999/06/06 15:38:34 deraadt Exp $ */ +/* $OpenBSD: sys_machdep.c,v 1.7 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -50,51 +50,51 @@ #include <vm/vm.h> #ifdef TRACE -int nvualarm; +int nvualarm; vtrace(p, uap, retval) - struct proc *p; - register struct vtrace_args /* { - syscallarg(int) request; - syscallarg(int) value; - } */ *uap; - register_t *retval; +struct proc *p; +register struct vtrace_args /* { + syscallarg(int) request; + syscallarg(int) value; +} */ *uap; +register_t *retval; { int vdoualarm(); switch (SCARG(uap, request)) { + + case VTR_DISABLE: /* disable a trace point */ + case VTR_ENABLE: /* enable a trace point */ + if (SCARG(uap, value) < 0 || SCARG(uap, value) >= TR_NFLAGS) + return (EINVAL); + *retval = traceflags[SCARG(uap, value)]; + traceflags[SCARG(uap, value)] = SCARG(uap, request); + break; - case VTR_DISABLE: /* disable a trace point */ - case VTR_ENABLE: /* enable a trace point */ - if (SCARG(uap, value) < 0 || SCARG(uap, value) >= TR_NFLAGS) - return (EINVAL); - *retval = traceflags[SCARG(uap, value)]; - traceflags[SCARG(uap, value)] = SCARG(uap, request); - break; + case VTR_VALUE: /* return a trace point setting */ + if (SCARG(uap, value) < 0 || SCARG(uap, value) >= TR_NFLAGS) + return (EINVAL); + *retval = traceflags[SCARG(uap, value)]; + break; - case VTR_VALUE: /* return a trace point setting */ - if (SCARG(uap, value) < 0 || SCARG(uap, value) >= TR_NFLAGS) - return (EINVAL); - *retval = traceflags[SCARG(uap, value)]; - break; + case VTR_UALARM: /* set a real-time ualarm, less than 1 min */ + if (SCARG(uap, value) <= 0 || SCARG(uap, value) > 60 * hz || + nvualarm > 5) + return (EINVAL); + nvualarm++; + timeout(vdoualarm, (void *)p->p_pid, SCARG(uap, value)); + break; - case VTR_UALARM: /* set a real-time ualarm, less than 1 min */ - if (SCARG(uap, value) <= 0 || SCARG(uap, value) > 60 * hz || - nvualarm > 5) - return (EINVAL); - nvualarm++; - timeout(vdoualarm, (void *)p->p_pid, SCARG(uap, value)); - break; - - case VTR_STAMP: - trace(TR_STAMP, SCARG(uap, value), p->p_pid); - break; + case VTR_STAMP: + trace(TR_STAMP, SCARG(uap, value), p->p_pid); + break; } return (0); } vdoualarm(arg) - void *arg; +void *arg; { register int pid = (int)arg; register struct proc *p; @@ -127,14 +127,14 @@ vdoualarm(arg) */ /*ARGSUSED1*/ cachectl(req, addr, len) - int req; - caddr_t addr; - int len; +int req; +caddr_t addr; +int len; { int error = 0; -#if defined(M68040) - if (mmutype == MMU_68040) { +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) { register int inc = 0; int pa = 0, doall = 0; caddr_t end; @@ -142,12 +142,16 @@ cachectl(req, addr, len) extern struct emul emul_hpux; if ((curproc->p_emul == &emul_hpux) && - len != 16 && len != NBPG) + len != 16 && len != NBPG) doall = 1; #endif - +#ifdef M68060 + if (mmutype == MMU_68040) { + doall = 1; + } +#endif if (addr == 0 || - (req & ~CC_EXTPURGE) != CC_PURGE && len > 2*NBPG) + (req & ~CC_EXTPURGE) != CC_PURGE && len > 2*NBPG) doall = 1; if (!doall) { @@ -167,77 +171,77 @@ cachectl(req, addr, len) * entire cache (XXX is this a rational thing to do?) */ if (!doall && - (pa == 0 || ((int)addr & PGOFSET) == 0)) { + (pa == 0 || ((int)addr & PGOFSET) == 0)) { pa = pmap_extract(curproc->p_vmspace->vm_map.pmap, - (vm_offset_t)addr); + (vm_offset_t)addr); if (pa == 0) doall = 1; } switch (req) { - case CC_EXTPURGE|CC_IPURGE: - case CC_IPURGE: - if (doall) { - DCFA(); - ICPA(); - } else if (inc == 16) { - DCFL(pa); - ICPL(pa); - } else if (inc == NBPG) { - DCFP(pa); - ICPP(pa); - } - break; + case CC_EXTPURGE|CC_IPURGE: + case CC_IPURGE: + if (doall) { + DCFA(); + ICPA(); + } else if (inc == 16) { + DCFL(pa); + ICPL(pa); + } else if (inc == NBPG) { + DCFP(pa); + ICPP(pa); + } + break; - case CC_EXTPURGE|CC_PURGE: - case CC_PURGE: - if (doall) - DCFA(); /* note: flush not purge */ - else if (inc == 16) - DCPL(pa); - else if (inc == NBPG) - DCPP(pa); - break; + case CC_EXTPURGE|CC_PURGE: + case CC_PURGE: + if (doall) + DCFA(); /* note: flush not purge */ + else if (inc == 16) + DCPL(pa); + else if (inc == NBPG) + DCPP(pa); + break; - case CC_EXTPURGE|CC_FLUSH: - case CC_FLUSH: - if (doall) - DCFA(); - else if (inc == 16) - DCFL(pa); - else if (inc == NBPG) - DCFP(pa); - break; + case CC_EXTPURGE|CC_FLUSH: + case CC_FLUSH: + if (doall) + DCFA(); + else if (inc == 16) + DCFL(pa); + else if (inc == NBPG) + DCFP(pa); + break; - default: - error = EINVAL; - break; + default: + error = EINVAL; + break; } if (doall) break; pa += inc; addr += inc; } while (addr < end); - return(error); + return (error); } #endif switch (req) { - case CC_EXTPURGE|CC_PURGE: - case CC_EXTPURGE|CC_FLUSH: - case CC_PURGE: - case CC_FLUSH: - DCIU(); - break; - case CC_EXTPURGE|CC_IPURGE: - DCIU(); - /* fall into... */ - case CC_IPURGE: - ICIA(); - break; - default: - error = EINVAL; - break; + case CC_EXTPURGE|CC_PURGE: + case CC_EXTPURGE|CC_FLUSH: + case CC_PURGE: + case CC_FLUSH: + DCIU(); + break; + case CC_EXTPURGE|CC_IPURGE: + DCIU(); + /* fall into... */ + case CC_IPURGE: + ICIA(); + break; + default: + error = EINVAL; + break; } - return(error); + return (error); } /* @@ -245,17 +249,17 @@ cachectl(req, addr, len) */ /*ARGSUSED1*/ dma_cachectl(addr, len) - caddr_t addr; - int len; +caddr_t addr; +int len; { -#ifdef M68040 - if (mmutype == MMU_68040) { +#if defined(M68040) || defined(M68060) + if (mmutype <= MMU_68040) { register int inc = 0; int pa = 0; caddr_t end; end = addr + len; - if (len <= 1024) { + if (len <= 1024 || mmutype == MMU_68060) { /* always line push line for 060 */ addr = (caddr_t)((int)addr & ~0xF); inc = 16; } else { @@ -281,14 +285,14 @@ dma_cachectl(addr, len) } while (addr < end); } #endif /* M68040 */ - return(0); + return (0); } int sys_sysarch(p, v, retval) - struct proc *p; - void *v; - register_t *retval; +struct proc *p; +void *v; +register_t *retval; { struct sysarch_args /* { syscallarg(int) op; diff --git a/sys/arch/mvme68k/mvme68k/trap.c b/sys/arch/mvme68k/mvme68k/trap.c index 65a105f9c46..823c8b02e5b 100644 --- a/sys/arch/mvme68k/mvme68k/trap.c +++ b/sys/arch/mvme68k/mvme68k/trap.c @@ -1,7 +1,8 @@ -/* $OpenBSD: trap.c,v 1.22 1999/09/27 20:30:32 smurph Exp $ */ +/* $OpenBSD: trap.c,v 1.23 2000/01/06 03:21:43 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt + * Copyright (c) 1999 Steve Murphree, Jr. (68060 support) * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -102,7 +103,7 @@ extern struct emul emul_sunos; #include <compat/hpux/hpux.h> #endif -char *trap_type[] = { +char *trap_type[] = { "Bus error", "Address error", "Illegal instruction", @@ -118,31 +119,33 @@ char *trap_type[] = { "Coprocessor violation", "Async system trap" }; -int trap_types = sizeof trap_type / sizeof trap_type[0]; +int trap_types = sizeof trap_type / sizeof trap_type[0]; /* * Size of various exception stack frames (minus the standard 8 bytes) */ -short exframesize[] = { - FMT0SIZE, /* type 0 - normal (68020/030/040) */ +short exframesize[] = { + FMT0SIZE, /* type 0 - normal (68020/030/040/060) */ FMT1SIZE, /* type 1 - throwaway (68020/030/040) */ - FMT2SIZE, /* type 2 - normal 6-word (68020/030/040) */ - FMT3SIZE, /* type 3 - FP post-instruction (68040) */ - -1, -1, -1, /* type 4-6 - undefined */ + FMT2SIZE, /* type 2 - normal 6-word (68020/030/040/060) */ + FMT3SIZE, /* type 3 - FP post-instruction (68040/060) */ + FMT4SIZE, /* type 4 - access error/fp disabled (68060) */ + -1, -1, /* type 5-6 - undefined */ FMT7SIZE, /* type 7 - access error (68040) */ - 58, /* type 8 - bus fault (68010) */ + 58, /* type 8 - bus fault (68010) */ FMT9SIZE, /* type 9 - coprocessor mid-instruction (68020/030) */ FMTASIZE, /* type A - short bus fault (68020/030) */ FMTBSIZE, /* type B - long bus fault (68020/030) */ -1, -1, -1, -1 /* type C-F - undefined */ }; -#ifdef M68040 -#define KDFAULT(c) (mmutype == MMU_68040 ? \ - ((c) & SSW4_TMMASK) == SSW4_TMKD : \ + +#if defined(M68040) || defined(M68060) +#define KDFAULT(c) (mmutype == MMU_68060 ? ((c) & FSLW_TM_SV) : \ + mmutype == MMU_68040 ? ((c) & SSW4_TMMASK) == SSW4_TMKD : \ ((c) & (SSW_DF|FC_SUPERD)) == (SSW_DF|FC_SUPERD)) -#define WRFAULT(c) (mmutype == MMU_68040 ? \ - ((c) & SSW4_RW) == 0 : \ +#define WRFAULT(c) (mmutype == MMU_68060 ? ((c) & FSLW_RW_W) : \ + mmutype == MMU_68040 ? ((c) & SSW4_RW) == 0 : \ ((c) & (SSW_DF|SSW_RW)) == SSW_DF) #else #define KDFAULT(c) (((c) & (SSW_DF|SSW_FCMASK)) == (SSW_DF|FC_SUPERD)) @@ -163,9 +166,10 @@ void (*sir_routines[NSIR])(); void *sir_args[NSIR]; u_char next_sir; -int writeback __P((struct frame *fp, int docachepush)); +int writeback __P((struct frame *fp, int docachepush)); + static inline void userret __P((struct proc *p, struct frame *fp, - u_quad_t oticks, u_int faultaddr, int fromtrap)); + u_quad_t oticks, u_int faultaddr, int fromtrap)); /* * trap and syscall both need the following work done before returning @@ -173,17 +177,17 @@ static inline void userret __P((struct proc *p, struct frame *fp, */ static inline void userret(p, fp, oticks, faultaddr, fromtrap) - register struct proc *p; - register struct frame *fp; - u_quad_t oticks; - u_int faultaddr; - int fromtrap; +register struct proc *p; +register struct frame *fp; +u_quad_t oticks; +u_int faultaddr; +int fromtrap; { int sig, s; -#ifdef M68040 +#if defined(M68040) || defined(M68060) int beenhere = 0; -again: + again: #endif /* take pending signals */ while ((sig = CURSIG(p)) != 0) @@ -213,10 +217,10 @@ again: if (p->p_flag & P_PROFIL) { extern int psratio; - addupc_task(p, fp->f_pc, - (int)(p->p_sticks - oticks) * psratio); + addupc_task(p, fp->f_pc, + (int)(p->p_sticks - oticks) * psratio); } -#ifdef M68040 +#if defined(M68040) /* * Deal with user mode writebacks (from trap, or from sigreturn). * If any writeback fails, go back and attempt signal delivery. @@ -230,9 +234,9 @@ again: #ifdef DEBUG if (mmudebug & MDB_WBFAILED) printf(fromtrap ? - "pid %d(%s): writeback aborted, pc=%x, fa=%x\n" : - "pid %d(%s): writeback aborted in sigreturn, pc=%x\n", - p->p_pid, p->p_comm, fp->f_pc, faultaddr); + "pid %d(%s): writeback aborted, pc=%x, fa=%x\n" : + "pid %d(%s): writeback aborted in sigreturn, pc=%x\n", + p->p_pid, p->p_comm, fp->f_pc, faultaddr); #endif } else if (sig = writeback(fp, fromtrap)) { register union sigval sv; @@ -251,14 +255,14 @@ again: /* * Trap is called from locore to handle most types of processor traps, * including events such as simulated software interrupts/AST's. - * System calls are broken out for efficiency. + * System calls are broken out for efficiency. T_ADDRERR */ /*ARGSUSED*/ trap(type, code, v, frame) - int type; - unsigned code; - register unsigned v; - struct frame frame; +int type; +unsigned code; +register unsigned v; +struct frame frame; { extern char fubail[], subail[]; register struct proc *p; @@ -283,379 +287,379 @@ trap(type, code, v, frame) p->p_md.md_regs = frame.f_regs; } switch (type) { - - default: -dopanic: - printf("trap type %d, code = %x, v = %x\n", type, code, v); + default: + dopanic: + printf("trap type %d, code = %x, v = %x\n", type, code, v); #ifdef DDB - if (kdb_trap(type, &frame)) - return; + if (kdb_trap(type, &frame)) + return; #endif - regdump(&frame, 128); - type &= ~T_USER; - if ((unsigned)type < trap_types) - panic(trap_type[type]); - panic("trap"); - - case T_BUSERR: /* kernel bus error */ - if (!p || !p->p_addr->u_pcb.pcb_onfault) - goto dopanic; - /* - * If we have arranged to catch this fault in any of the - * copy to/from user space routines, set PC to return to - * indicated location and set flag informing buserror code - * that it may need to clean up stack frame. - */ + regdump(&frame, 128); + type &= ~T_USER; + if ((unsigned)type < trap_types) + panic(trap_type[type]); + panic("trap"); + + case T_BUSERR: /* kernel bus error */ + if (!p || !p->p_addr->u_pcb.pcb_onfault) + goto dopanic; + /* + * If we have arranged to catch this fault in any of the + * copy to/from user space routines, set PC to return to + * indicated location and set flag informing buserror code + * that it may need to clean up stack frame. + */ copyfault: - frame.f_stackadj = exframesize[frame.f_format]; - frame.f_format = frame.f_vector = 0; - frame.f_pc = (int) p->p_addr->u_pcb.pcb_onfault; - return; + frame.f_stackadj = exframesize[frame.f_format]; + frame.f_format = frame.f_vector = 0; + frame.f_pc = (int) p->p_addr->u_pcb.pcb_onfault; + return; + + case T_BUSERR|T_USER: /* bus error */ + typ = BUS_OBJERR; + ucode = code & ~T_USER; + i = SIGBUS; + break; + case T_ADDRERR|T_USER: /* address error */ + typ = BUS_ADRALN; + ucode = code & ~T_USER; + i = SIGBUS; + break; - case T_BUSERR|T_USER: /* bus error */ - typ = BUS_OBJERR; - ucode = code & ~T_USER; - i = SIGBUS; - break; - case T_ADDRERR|T_USER: /* address error */ - typ = BUS_ADRALN; - ucode = code & ~T_USER; - i = SIGBUS; - break; - - case T_COPERR: /* kernel coprocessor violation */ - case T_FMTERR|T_USER: /* do all RTE errors come in as T_USER? */ - case T_FMTERR: /* ...just in case... */ - /* - * The user has most likely trashed the RTE or FP state info - * in the stack frame of a signal handler. - */ - printf("pid %d: kernel %s exception\n", p->p_pid, - type==T_COPERR ? "coprocessor" : "format"); - type |= T_USER; - p->p_sigacts->ps_sigact[SIGILL] = SIG_DFL; - i = sigmask(SIGILL); - p->p_sigignore &= ~i; - p->p_sigcatch &= ~i; - p->p_sigmask &= ~i; - i = SIGILL; - ucode = frame.f_format; /* XXX was ILL_RESAD_FAULT */ - typ = ILL_COPROC; - v = frame.f_pc; - break; - - case T_COPERR|T_USER: /* user coprocessor violation */ - /* What is a proper response here? */ - typ = FPE_FLTINV; - ucode = 0; - i = SIGFPE; - break; - - case T_FPERR|T_USER: /* 68881 exceptions */ - /* - * We pass along the 68881 status register which locore stashed - * in code for us. Note that there is a possibility that the - * bit pattern of this register will conflict with one of the - * FPE_* codes defined in signal.h. Fortunately for us, the - * only such codes we use are all in the range 1-7 and the low - * 3 bits of the status register are defined as 0 so there is - * no clash. - */ - typ = FPE_FLTRES; - ucode = code; - i = SIGFPE; - v = frame.f_pc; - break; - -#ifdef M68040 - case T_FPEMULI|T_USER: /* unimplemented FP instuction */ - case T_FPEMULD|T_USER: /* unimplemented FP data type */ - /* XXX need to FSAVE */ - printf("pid %d(%s): unimplemented FP %s at %x (EA %x)\n", - p->p_pid, p->p_comm, - frame.f_format == 2 ? "instruction" : "data type", - frame.f_pc, frame.f_fmt2.f_iaddr); - /* XXX need to FRESTORE */ - typ = FPE_FLTINV; - i = SIGFPE; - v = frame.f_pc; - break; + case T_COPERR: /* kernel coprocessor violation */ + case T_FMTERR|T_USER: /* do all RTE errors come in as T_USER? */ + case T_FMTERR: /* ...just in case... */ + /* + * The user has most likely trashed the RTE or FP state info + * in the stack frame of a signal handler. + */ + printf("pid %d: kernel %s exception\n", p->p_pid, + type==T_COPERR ? "coprocessor" : "format"); + type |= T_USER; + p->p_sigacts->ps_sigact[SIGILL] = SIG_DFL; + i = sigmask(SIGILL); + p->p_sigignore &= ~i; + p->p_sigcatch &= ~i; + p->p_sigmask &= ~i; + i = SIGILL; + ucode = frame.f_format; /* XXX was ILL_RESAD_FAULT */ + typ = ILL_COPROC; + v = frame.f_pc; + break; + + case T_COPERR|T_USER: /* user coprocessor violation */ + /* What is a proper response here? */ + typ = FPE_FLTINV; + ucode = 0; + i = SIGFPE; + break; + + case T_FPERR|T_USER: /* 68881 exceptions */ + /* + * We pass along the 68881 status register which locore stashed + * in code for us. Note that there is a possibility that the + * bit pattern of this register will conflict with one of the + * FPE_* codes defined in signal.h. Fortunately for us, the + * only such codes we use are all in the range 1-7 and the low + * 3 bits of the status register are defined as 0 so there is + * no clash. + */ + typ = FPE_FLTRES; + ucode = code; + i = SIGFPE; + v = frame.f_pc; + break; + +#if defined(M68040) || defined(M68060) + case T_FPEMULI|T_USER: /* unimplemented FP instuction */ + case T_FPEMULD|T_USER: /* unimplemented FP data type */ + /* XXX need to FSAVE */ + printf("pid %d(%s): unimplemented FP %s at %x (EA %x)\n", + p->p_pid, p->p_comm, + frame.f_format == 2 ? "instruction" : "data type", + frame.f_pc, frame.f_fmt2.f_iaddr); + /* XXX need to FRESTORE */ + typ = FPE_FLTINV; + i = SIGFPE; + v = frame.f_pc; + break; #endif - case T_ILLINST|T_USER: /* illegal instruction fault */ + case T_ILLINST|T_USER: /* illegal instruction fault */ #ifdef COMPAT_HPUX - if (p->p_emul == &emul_hpux) { - typ = 0; - ucode = HPUX_ILL_ILLINST_TRAP; + if (p->p_emul == &emul_hpux) { + typ = 0; + ucode = HPUX_ILL_ILLINST_TRAP; + i = SIGILL; + break; + } +#endif + ucode = frame.f_format; /* XXX was ILL_PRIVIN_FAULT */ + typ = ILL_ILLOPC; i = SIGILL; + v = frame.f_pc; break; - } -#endif - ucode = frame.f_format; /* XXX was ILL_PRIVIN_FAULT */ - typ = ILL_ILLOPC; - i = SIGILL; - v = frame.f_pc; - break; - case T_PRIVINST|T_USER: /* privileged instruction fault */ + case T_PRIVINST|T_USER: /* privileged instruction fault */ #ifdef COMPAT_HPUX - if (p->p_emul == &emul_hpux) - ucode = HPUX_ILL_PRIV_TRAP; - else + if (p->p_emul == &emul_hpux) + ucode = HPUX_ILL_PRIV_TRAP; + else #endif - ucode = frame.f_format; /* XXX was ILL_PRIVIN_FAULT */ - typ = ILL_PRVOPC; - i = SIGILL; - v = frame.f_pc; - break; + ucode = frame.f_format; /* XXX was ILL_PRIVIN_FAULT */ + typ = ILL_PRVOPC; + i = SIGILL; + v = frame.f_pc; + break; - case T_ZERODIV|T_USER: /* Divide by zero */ + case T_ZERODIV|T_USER: /* Divide by zero */ #ifdef COMPAT_HPUX - if (p->p_emul == &emul_hpux) - ucode = HPUX_FPE_INTDIV_TRAP; - else + if (p->p_emul == &emul_hpux) + ucode = HPUX_FPE_INTDIV_TRAP; + else #endif - ucode = frame.f_format; /* XXX was FPE_INTDIV_TRAP */ - typ = FPE_INTDIV; - i = SIGFPE; - v = frame.f_pc; - break; + ucode = frame.f_format; /* XXX was FPE_INTDIV_TRAP */ + typ = FPE_INTDIV; + i = SIGFPE; + v = frame.f_pc; + break; - case T_CHKINST|T_USER: /* CHK instruction trap */ + case T_CHKINST|T_USER: /* CHK instruction trap */ #ifdef COMPAT_HPUX - if (p->p_emul == &emul_hpux) { - /* handled differently under hp-ux */ - i = SIGILL; - ucode = HPUX_ILL_CHK_TRAP; - break; - } + if (p->p_emul == &emul_hpux) { + /* handled differently under hp-ux */ + i = SIGILL; + ucode = HPUX_ILL_CHK_TRAP; + break; + } #endif - ucode = frame.f_format; /* XXX was FPE_SUBRNG_TRAP */ - typ = FPE_FLTSUB; - i = SIGFPE; - v = frame.f_pc; - break; + ucode = frame.f_format; /* XXX was FPE_SUBRNG_TRAP */ + typ = FPE_FLTSUB; + i = SIGFPE; + v = frame.f_pc; + break; - case T_TRAPVINST|T_USER: /* TRAPV instruction trap */ + case T_TRAPVINST|T_USER: /* TRAPV instruction trap */ #ifdef COMPAT_HPUX - if (p->p_emul == &emul_hpux) { - /* handled differently under hp-ux */ + if (p->p_emul == &emul_hpux) { + /* handled differently under hp-ux */ + i = SIGILL; + ucode = HPUX_ILL_TRAPV_TRAP; + break; + } +#endif + ucode = frame.f_format; /* XXX was FPE_INTOVF_TRAP */ + typ = ILL_ILLTRP; i = SIGILL; - ucode = HPUX_ILL_TRAPV_TRAP; + v = frame.f_pc; break; - } -#endif - ucode = frame.f_format; /* XXX was FPE_INTOVF_TRAP */ - typ = ILL_ILLTRP; - i = SIGILL; - v = frame.f_pc; - break; - /* - * XXX: Trace traps are a nightmare. - * - * HP-UX uses trap #1 for breakpoints, - * HPBSD uses trap #2, - * SUN 3.x uses trap #15, - * KGDB uses trap #15 (for kernel breakpoints; handled elsewhere). - * - * HPBSD and HP-UX traps both get mapped by locore.s into T_TRACE. - * SUN 3.x traps get passed through as T_TRAP15 and are not really - * supported yet. - */ - case T_TRACE: /* kernel trace trap */ - case T_TRAP15: /* SUN trace trap */ + /* + * XXX: Trace traps are a nightmare. + * + * HP-UX uses trap #1 for breakpoints, + * HPBSD uses trap #2, + * SUN 3.x uses trap #15, + * KGDB uses trap #15 (for kernel breakpoints; handled elsewhere). + * + * HPBSD and HP-UX traps both get mapped by locore.s into T_TRACE. + * SUN 3.x traps get passed through as T_TRAP15 and are not really + * supported yet. + */ + case T_TRACE: /* kernel trace trap */ + case T_TRAP15: /* SUN trace trap */ #ifdef DDB - if (kdb_trap(type, &frame)) - return; + if (kdb_trap(type, &frame)) + return; #endif - frame.f_sr &= ~PSL_T; - i = SIGTRAP; - typ = TRAP_TRACE; - break; + frame.f_sr &= ~PSL_T; + i = SIGTRAP; + typ = TRAP_TRACE; + break; - case T_TRACE|T_USER: /* user trace trap */ - case T_TRAP15|T_USER: /* SUN user trace trap */ + case T_TRACE|T_USER: /* user trace trap */ + case T_TRAP15|T_USER: /* SUN user trace trap */ #ifdef COMPAT_SUNOS - /* - * SunOS uses Trap #2 for a "CPU cache flush" - * Just flush the on-chip caches and return. - * XXX - Too bad m68k BSD uses trap 2... - */ - if (p->p_emul == &emul_sunos) { - ICIA(); - DCIU(); - /* get out fast */ - return; - } + /* + * SunOS uses Trap #2 for a "CPU cache flush" + * Just flush the on-chip caches and return. + * XXX - Too bad m68k BSD uses trap 2... + */ + if (p->p_emul == &emul_sunos) { + ICIA(); + DCIU(); + /* get out fast */ + return; + } #endif - frame.f_sr &= ~PSL_T; - i = SIGTRAP; - typ = TRAP_TRACE; - break; + frame.f_sr &= ~PSL_T; + i = SIGTRAP; + typ = TRAP_TRACE; + break; - case T_ASTFLT: /* system async trap, cannot happen */ - goto dopanic; + case T_ASTFLT: /* system async trap, cannot happen */ + goto dopanic; - case T_ASTFLT|T_USER: /* user async trap */ - astpending = 0; - /* - * We check for software interrupts first. This is because - * they are at a higher level than ASTs, and on a VAX would - * interrupt the AST. We assume that if we are processing - * an AST that we must be at IPL0 so we don't bother to - * check. Note that we ensure that we are at least at SIR - * IPL while processing the SIR. - */ - spl1(); - /* fall into... */ - - case T_SSIR: /* software interrupt */ - case T_SSIR|T_USER: - while (bit = ffs(ssir)) { - --bit; - ssir &= ~(1 << bit); - cnt.v_soft++; - if (sir_routines[bit]) - sir_routines[bit](sir_args[bit]); - } - /* - * If this was not an AST trap, we are all done. - */ - if (type != (T_ASTFLT|T_USER)) { - cnt.v_trap--; - return; - } - spl0(); - if (p->p_flag & P_OWEUPC) { - p->p_flag &= ~P_OWEUPC; - ADDUPROF(p); - } - goto out; + case T_ASTFLT|T_USER: /* user async trap */ + astpending = 0; + /* + * We check for software interrupts first. This is because + * they are at a higher level than ASTs, and on a VAX would + * interrupt the AST. We assume that if we are processing + * an AST that we must be at IPL0 so we don't bother to + * check. Note that we ensure that we are at least at SIR + * IPL while processing the SIR. + */ + spl1(); + /* fall into... */ + + case T_SSIR: /* software interrupt */ + case T_SSIR|T_USER: + while (bit = ffs(ssir)) { + --bit; + ssir &= ~(1 << bit); + cnt.v_soft++; + if (sir_routines[bit]) + sir_routines[bit](sir_args[bit]); + } + /* + * If this was not an AST trap, we are all done. + */ + if (type != (T_ASTFLT|T_USER)) { + cnt.v_trap--; + return; + } + spl0(); + if (p->p_flag & P_OWEUPC) { + p->p_flag &= ~P_OWEUPC; + ADDUPROF(p); + } + goto out; - case T_MMUFLT: /* kernel mode page fault */ - /* - * If we were doing profiling ticks or other user mode - * stuff from interrupt code, Just Say No. - */ - if (p && (p->p_addr->u_pcb.pcb_onfault == fubail || - p->p_addr->u_pcb.pcb_onfault == subail)) - goto copyfault; - /* fall into ... */ - - case T_MMUFLT|T_USER: /* page fault */ - { - register vm_offset_t va; - register struct vmspace *vm = NULL; - register vm_map_t map; - int rv; - vm_prot_t ftype, vftype; - extern vm_map_t kernel_map; - - /* vmspace only significant if T_USER */ - if (p) - vm = p->p_vmspace; + case T_MMUFLT: /* kernel mode page fault */ + /* + * If we were doing profiling ticks or other user mode + * stuff from interrupt code, Just Say No. + */ + if (p && (p->p_addr->u_pcb.pcb_onfault == fubail || + p->p_addr->u_pcb.pcb_onfault == subail)) { + goto copyfault; + } + /* fall into ... */ + + case T_MMUFLT|T_USER: /* page fault */ + { + register vm_offset_t va; + register struct vmspace *vm = NULL; + register vm_map_t map; + int rv; + vm_prot_t ftype, vftype; + extern vm_map_t kernel_map; + + /* vmspace only significant if T_USER */ + if (p) + vm = p->p_vmspace; #ifdef DEBUG - if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) - printf("trap: T_MMUFLT pid=%d, code=%x, v=%x, pc=%x, sr=%x\n", - p->p_pid, code, v, frame.f_pc, frame.f_sr); + if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) + printf("trap: T_MMUFLT pid=%d, code=%x, v=%x, pc=%x, sr=%x\n", + p->p_pid, code, v, frame.f_pc, frame.f_sr); #endif - /* - * It is only a kernel address space fault iff: - * 1. (type & T_USER) == 0 and - * 2. pcb_onfault not set or - * 3. pcb_onfault set but supervisor space data fault - * The last can occur during an exec() copyin where the - * argument space is lazy-allocated. - */ - if (type == T_MMUFLT && - ((p && !p->p_addr->u_pcb.pcb_onfault) || KDFAULT(code))) - map = kernel_map; - else - map = &vm->vm_map; - if (WRFAULT(code)) { - vftype = VM_PROT_WRITE; - ftype = VM_PROT_READ | VM_PROT_WRITE; - } else - vftype = ftype = VM_PROT_READ; - va = trunc_page((vm_offset_t)v); - - if (map == kernel_map && va == 0) { - printf("trap: bad kernel access at %x\n", v); - goto dopanic; - } + /* + * It is only a kernel address space fault iff: + * 1. (type & T_USER) == 0 and + * 2. pcb_onfault not set or + * 3. pcb_onfault set but supervisor space data fault + * The last can occur during an exec() copyin where the + * argument space is lazy-allocated. + */ + if (type == T_MMUFLT && + ((p && !p->p_addr->u_pcb.pcb_onfault) || KDFAULT(code))) + map = kernel_map; + else + map = &vm->vm_map; + if (WRFAULT(code)) { + vftype = VM_PROT_WRITE; + ftype = VM_PROT_READ | VM_PROT_WRITE; + } else + vftype = ftype = VM_PROT_READ; + va = trunc_page((vm_offset_t)v); + + if (map == kernel_map && va == 0) { + printf("trap: bad kernel access at %x\n", v); + goto dopanic; + } #ifdef COMPAT_HPUX - if (ISHPMMADDR(va)) { - vm_offset_t bva; - - rv = pmap_mapmulti(map->pmap, va); - if (rv != KERN_SUCCESS) { - bva = HPMMBASEADDR(va); - rv = vm_fault(map, bva, ftype, FALSE); - if (rv == KERN_SUCCESS) - (void) pmap_mapmulti(map->pmap, va); - } - } else + if (ISHPMMADDR(va)) { + vm_offset_t bva; + + rv = pmap_mapmulti(map->pmap, va); + if (rv != KERN_SUCCESS) { + bva = HPMMBASEADDR(va); + rv = vm_fault(map, bva, ftype, FALSE); + if (rv == KERN_SUCCESS) + (void) pmap_mapmulti(map->pmap, va); + } + } else #endif - rv = vm_fault(map, va, ftype, FALSE); + rv = vm_fault(map, va, ftype, FALSE); #ifdef DEBUG - if (rv && MDB_ISPID(p->p_pid)) - printf("vm_fault(%x, %x, %x, 0) -> %x\n", - map, va, ftype, rv); + if (rv && MDB_ISPID(p->p_pid)) + printf("vm_fault(%x, %x, %x, 0) -> %x\n", + map, va, ftype, rv); #endif - /* - * If this was a stack access we keep track of the maximum - * accessed stack size. Also, if vm_fault gets a protection - * failure it is due to accessing the stack region outside - * the current limit and we need to reflect that as an access - * error. - */ - if ((caddr_t)va >= vm->vm_maxsaddr && map != kernel_map) { - if (rv == KERN_SUCCESS) { - unsigned nss; - - nss = clrnd(btoc(USRSTACK-(unsigned)va)); - if (nss > vm->vm_ssize) - vm->vm_ssize = nss; - } else if (rv == KERN_PROTECTION_FAILURE) - rv = KERN_INVALID_ADDRESS; - } - if (rv == KERN_SUCCESS) { - if (type == T_MMUFLT) { + /* + * If this was a stack access we keep track of the maximum + * accessed stack size. Also, if vm_fault gets a protection + * failure it is due to accessing the stack region outside + * the current limit and we need to reflect that as an access + * error. + */ + if ((caddr_t)va >= vm->vm_maxsaddr && map != kernel_map) { + if (rv == KERN_SUCCESS) { + unsigned nss; + + nss = clrnd(btoc(USRSTACK-(unsigned)va)); + if (nss > vm->vm_ssize) + vm->vm_ssize = nss; + } else if (rv == KERN_PROTECTION_FAILURE) + rv = KERN_INVALID_ADDRESS; + } + if (rv == KERN_SUCCESS) { + if (type == T_MMUFLT) { #if defined(M68040) - if (mmutype == MMU_68040) - (void) writeback(&frame, 1); + if (mmutype == MMU_68040) + (void) writeback(&frame, 1); #endif - return; + return; + } + goto out; + } + if (type == T_MMUFLT) { + if (p && p->p_addr->u_pcb.pcb_onfault) + goto copyfault; + printf("vm_fault(%x, %x, %x, 0) -> %x\n", + map, va, ftype, rv); + printf(" type %x, code [mmu,,ssw]: %x\n", + type, code); + goto dopanic; + } + frame.f_pad = code & 0xffff; + ucode = vftype; + typ = SEGV_MAPERR; + i = SIGSEGV; + break; } - goto out; - } - if (type == T_MMUFLT) { - if (p && p->p_addr->u_pcb.pcb_onfault) - goto copyfault; - printf("vm_fault(%x, %x, %x, 0) -> %x\n", - map, va, ftype, rv); - printf(" type %x, code [mmu,,ssw]: %x\n", - type, code); - goto dopanic; - } - frame.f_pad = code & 0xffff; - ucode = vftype; - typ = SEGV_MAPERR; - i = SIGSEGV; - break; - } } sv.sival_int = v; trapsignal(p, i, ucode, typ, sv); if ((type & T_USER) == 0) return; -out: + out: userret(p, &frame, sticks, v, 1); } -#ifdef M68040 +#if defined(M68040) #ifdef DEBUG struct writebackstats { int calls; @@ -665,18 +669,18 @@ struct writebackstats { int wbsize[4]; } wbstats; -char *f7sz[] = { "longword", "byte", "word", "line" }; -char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK" }; +char *f7sz[] = { "longword", "byte", "word", "line"}; +char *f7tt[] = { "normal", "MOVE16", "AFC", "ACK"}; char *f7tm[] = { "d-push", "u-data", "u-code", "M-data", - "M-code", "k-data", "k-code", "RES" }; + "M-code", "k-data", "k-code", "RES"}; char wberrstr[] = - "WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n"; +"WARNING: pid %d(%s) writeback [%s] failed, pc=%x fa=%x wba=%x wbd=%x\n"; #endif int writeback(fp, docachepush) - struct frame *fp; - int docachepush; +struct frame *fp; +int docachepush; { register struct fmt7 *f = &fp->f_fmt7; register struct proc *p = curproc; @@ -703,11 +707,11 @@ writeback(fp, docachepush) #ifdef DEBUG if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) { printf(" pushing %s to PA %x, data %x", - f7sz[(f->f_ssw & SSW4_SZMASK) >> 5], - f->f_fa, f->f_pd0); + f7sz[(f->f_ssw & SSW4_SZMASK) >> 5], + f->f_fa, f->f_pd0); if ((f->f_ssw & SSW4_SZMASK) == SSW4_SZLN) printf("/%x/%x/%x", - f->f_pd1, f->f_pd2, f->f_pd3); + f->f_pd1, f->f_pd2, f->f_pd3); printf("\n"); } if (f->f_wb1s & SSW4_WBSV) @@ -720,15 +724,15 @@ writeback(fp, docachepush) */ if (docachepush) { pmap_enter(pmap_kernel(), (vm_offset_t)vmmap, - trunc_page(f->f_fa), VM_PROT_WRITE, TRUE, VM_PROT_WRITE); + trunc_page(f->f_fa), VM_PROT_WRITE, TRUE, VM_PROT_WRITE); fa = (u_int)&vmmap[(f->f_fa & PGOFSET) & ~0xF]; bcopy((caddr_t)&f->f_pd0, (caddr_t)fa, 16); DCFL(pmap_extract(pmap_kernel(), (vm_offset_t)fa)); pmap_remove(pmap_kernel(), (vm_offset_t)vmmap, - (vm_offset_t)&vmmap[NBPG]); + (vm_offset_t)&vmmap[NBPG]); } else printf("WARNING: pid %d(%s) uid %d: CPUSH not done\n", - p->p_pid, p->p_comm, p->p_ucred->cr_uid); + p->p_pid, p->p_comm, p->p_ucred->cr_uid); } else if ((f->f_ssw & (SSW4_RW|SSW4_TTMASK)) == SSW4_TTM16) { /* * MOVE16 fault. @@ -738,8 +742,8 @@ writeback(fp, docachepush) #ifdef DEBUG if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) printf(" MOVE16 to VA %x(%x), data %x/%x/%x/%x\n", - f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1, - f->f_pd2, f->f_pd3); + f->f_fa, f->f_fa & ~0xF, f->f_pd0, f->f_pd1, + f->f_pd2, f->f_pd3); if (f->f_wb1s & SSW4_WBSV) panic("writeback: MOVE16 with WB1S valid"); wbstats.move16s++; @@ -753,8 +757,8 @@ writeback(fp, docachepush) #ifdef DEBUG if (mmudebug & MDB_WBFAILED) printf(wberrstr, p->p_pid, p->p_comm, - "MOVE16", fp->f_pc, f->f_fa, - f->f_fa & ~0xF, f->f_pd0); + "MOVE16", fp->f_pc, f->f_fa, + f->f_fa & ~0xF, f->f_pd0); #endif } } else if (f->f_wb1s & SSW4_WBSV) { @@ -773,40 +777,40 @@ writeback(fp, docachepush) #endif off = (f->f_wb1a & 3) * 8; switch (f->f_wb1s & SSW4_SZMASK) { - case SSW4_SZLW: - if (off) - wb1d = (wb1d >> (32 - off)) | (wb1d << off); - if (KDFAULT(f->f_wb1s)) - *(long *)f->f_wb1a = wb1d; - else - err = suword((caddr_t)f->f_wb1a, wb1d); - break; - case SSW4_SZB: - off = 24 - off; - if (off) - wb1d >>= off; - if (KDFAULT(f->f_wb1s)) - *(char *)f->f_wb1a = wb1d; - else - err = subyte((caddr_t)f->f_wb1a, wb1d); - break; - case SSW4_SZW: - off = (off + 16) % 32; - if (off) - wb1d = (wb1d >> (32 - off)) | (wb1d << off); - if (KDFAULT(f->f_wb1s)) - *(short *)f->f_wb1a = wb1d; - else - err = susword((caddr_t)f->f_wb1a, wb1d); - break; + case SSW4_SZLW: + if (off) + wb1d = (wb1d >> (32 - off)) | (wb1d << off); + if (KDFAULT(f->f_wb1s)) + *(long *)f->f_wb1a = wb1d; + else + err = suword((caddr_t)f->f_wb1a, wb1d); + break; + case SSW4_SZB: + off = 24 - off; + if (off) + wb1d >>= off; + if (KDFAULT(f->f_wb1s)) + *(char *)f->f_wb1a = wb1d; + else + err = subyte((caddr_t)f->f_wb1a, wb1d); + break; + case SSW4_SZW: + off = (off + 16) % 32; + if (off) + wb1d = (wb1d >> (32 - off)) | (wb1d << off); + if (KDFAULT(f->f_wb1s)) + *(short *)f->f_wb1a = wb1d; + else + err = susword((caddr_t)f->f_wb1a, wb1d); + break; } if (err) { fa = f->f_wb1a; #ifdef DEBUG if (mmudebug & MDB_WBFAILED) printf(wberrstr, p->p_pid, p->p_comm, - "#1", fp->f_pc, f->f_fa, - f->f_wb1a, f->f_wb1d); + "#1", fp->f_pc, f->f_fa, + f->f_wb1a, f->f_wb1d); #endif } } @@ -817,7 +821,7 @@ writeback(fp, docachepush) * a MOVE16 was already dealt with above. Ignore it. */ if (err == 0 && (f->f_wb2s & SSW4_WBSV) && - (f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) { + (f->f_wb2s & SSW4_SZMASK) != SSW4_SZLN) { #ifdef DEBUG if ((mmudebug & MDB_WBFOLLOW) || MDB_ISPID(p->p_pid)) dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d); @@ -825,32 +829,32 @@ writeback(fp, docachepush) wbstats.wbsize[(f->f_wb2s&SSW4_SZMASK)>>5]++; #endif switch (f->f_wb2s & SSW4_SZMASK) { - case SSW4_SZLW: - if (KDFAULT(f->f_wb2s)) - *(long *)f->f_wb2a = f->f_wb2d; - else - err = suword((caddr_t)f->f_wb2a, f->f_wb2d); - break; - case SSW4_SZB: - if (KDFAULT(f->f_wb2s)) - *(char *)f->f_wb2a = f->f_wb2d; - else - err = subyte((caddr_t)f->f_wb2a, f->f_wb2d); - break; - case SSW4_SZW: - if (KDFAULT(f->f_wb2s)) - *(short *)f->f_wb2a = f->f_wb2d; - else - err = susword((caddr_t)f->f_wb2a, f->f_wb2d); - break; + case SSW4_SZLW: + if (KDFAULT(f->f_wb2s)) + *(long *)f->f_wb2a = f->f_wb2d; + else + err = suword((caddr_t)f->f_wb2a, f->f_wb2d); + break; + case SSW4_SZB: + if (KDFAULT(f->f_wb2s)) + *(char *)f->f_wb2a = f->f_wb2d; + else + err = subyte((caddr_t)f->f_wb2a, f->f_wb2d); + break; + case SSW4_SZW: + if (KDFAULT(f->f_wb2s)) + *(short *)f->f_wb2a = f->f_wb2d; + else + err = susword((caddr_t)f->f_wb2a, f->f_wb2d); + break; } if (err) { fa = f->f_wb2a; #ifdef DEBUG if (mmudebug & MDB_WBFAILED) { printf(wberrstr, p->p_pid, p->p_comm, - "#2", fp->f_pc, f->f_fa, - f->f_wb2a, f->f_wb2d); + "#2", fp->f_pc, f->f_fa, + f->f_wb2a, f->f_wb2d); dumpssw(f->f_ssw); dumpwb(2, f->f_wb2s, f->f_wb2a, f->f_wb2d); } @@ -865,27 +869,27 @@ writeback(fp, docachepush) wbstats.wbsize[(f->f_wb3s&SSW4_SZMASK)>>5]++; #endif switch (f->f_wb3s & SSW4_SZMASK) { - case SSW4_SZLW: - if (KDFAULT(f->f_wb3s)) - *(long *)f->f_wb3a = f->f_wb3d; - else - err = suword((caddr_t)f->f_wb3a, f->f_wb3d); - break; - case SSW4_SZB: - if (KDFAULT(f->f_wb3s)) - *(char *)f->f_wb3a = f->f_wb3d; - else - err = subyte((caddr_t)f->f_wb3a, f->f_wb3d); - break; - case SSW4_SZW: - if (KDFAULT(f->f_wb3s)) - *(short *)f->f_wb3a = f->f_wb3d; - else - err = susword((caddr_t)f->f_wb3a, f->f_wb3d); - break; + case SSW4_SZLW: + if (KDFAULT(f->f_wb3s)) + *(long *)f->f_wb3a = f->f_wb3d; + else + err = suword((caddr_t)f->f_wb3a, f->f_wb3d); + break; + case SSW4_SZB: + if (KDFAULT(f->f_wb3s)) + *(char *)f->f_wb3a = f->f_wb3d; + else + err = subyte((caddr_t)f->f_wb3a, f->f_wb3d); + break; + case SSW4_SZW: + if (KDFAULT(f->f_wb3s)) + *(short *)f->f_wb3a = f->f_wb3d; + else + err = susword((caddr_t)f->f_wb3a, f->f_wb3d); + break; #ifdef DEBUG - case SSW4_SZLN: - panic("writeback: wb3s indicates LINE write"); + case SSW4_SZLN: + panic("writeback: wb3s indicates LINE write"); #endif } if (err) { @@ -893,8 +897,8 @@ writeback(fp, docachepush) #ifdef DEBUG if (mmudebug & MDB_WBFAILED) printf(wberrstr, p->p_pid, p->p_comm, - "#3", fp->f_pc, f->f_fa, - f->f_wb3a, f->f_wb3d); + "#3", fp->f_pc, f->f_fa, + f->f_wb3a, f->f_wb3d); #endif } } @@ -904,12 +908,12 @@ writeback(fp, docachepush) */ if (err) err = SIGSEGV; - return(err); + return (err); } #ifdef DEBUG dumpssw(ssw) - register u_short ssw; +register u_short ssw; { printf(" SSW: %x: ", ssw); if (ssw & SSW4_CP) @@ -929,22 +933,22 @@ dumpssw(ssw) if (ssw & SSW4_RW) printf("RW,"); printf(" SZ=%s, TT=%s, TM=%s\n", - f7sz[(ssw & SSW4_SZMASK) >> 5], - f7tt[(ssw & SSW4_TTMASK) >> 3], - f7tm[ssw & SSW4_TMMASK]); + f7sz[(ssw & SSW4_SZMASK) >> 5], + f7tt[(ssw & SSW4_TTMASK) >> 3], + f7tm[ssw & SSW4_TMMASK]); } dumpwb(num, s, a, d) - int num; - u_short s; - u_int a, d; +int num; +u_short s; +u_int a, d; { register struct proc *p = curproc; vm_offset_t pa; printf(" writeback #%d: VA %x, data %x, SZ=%s, TT=%s, TM=%s\n", - num, a, d, f7sz[(s & SSW4_SZMASK) >> 5], - f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]); + num, a, d, f7sz[(s & SSW4_SZMASK) >> 5], + f7tt[(s & SSW4_TTMASK) >> 3], f7tm[s & SSW4_TMMASK]); printf(" PA "); pa = pmap_extract(&p->p_vmspace->vm_pmap, (vm_offset_t)a); if (pa == 0) @@ -960,8 +964,8 @@ dumpwb(num, s, a, d) * Process a system call. */ syscall(code, frame) - register_t code; - struct frame frame; +register_t code; +struct frame frame; { register caddr_t params; register struct sysent *callp; @@ -1018,42 +1022,42 @@ syscall(code, frame) params = (caddr_t)frame.f_regs[SP] + sizeof(int); switch (code) { - case SYS_syscall: - /* - * Code is first argument, followed by actual args. - */ - code = fuword(params); - params += sizeof(int); - /* - * XXX sigreturn requires special stack manipulation - * that is only done if entered via the sigreturn - * trap. Cannot allow it here so make sure we fail. - */ - if (code == SYS_sigreturn) - code = nsys; - break; - case SYS___syscall: - /* - * Like syscall, but code is a quad, so as to maintain - * quad alignment for the rest of the arguments. - */ - if (callp != sysent) + case SYS_syscall: + /* + * Code is first argument, followed by actual args. + */ + code = fuword(params); + params += sizeof(int); + /* + * XXX sigreturn requires special stack manipulation + * that is only done if entered via the sigreturn + * trap. Cannot allow it here so make sure we fail. + */ + if (code == SYS_sigreturn) + code = nsys; + break; + case SYS___syscall: + /* + * Like syscall, but code is a quad, so as to maintain + * quad alignment for the rest of the arguments. + */ + if (callp != sysent) + break; + code = fuword(params + _QUAD_LOWWORD * sizeof(int)); + params += sizeof(quad_t); + break; + default: break; - code = fuword(params + _QUAD_LOWWORD * sizeof(int)); - params += sizeof(quad_t); - break; - default: - break; } if (code < 0 || code >= nsys) callp += p->p_emul->e_nosys; /* illegal */ else - callp += code; + callp += code; argsize = callp->sy_argsize; if (argsize) error = copyin(params, (caddr_t)args, argsize); else - error = 0; + error = 0; #ifdef SYSCALL_DEBUG scdebug_call(p, code, args); #endif @@ -1067,28 +1071,28 @@ syscall(code, frame) rval[1] = frame.f_regs[D1]; error = (*callp->sy_call)(p, args, rval); switch (error) { - case 0: - frame.f_regs[D0] = rval[0]; - frame.f_regs[D1] = rval[1]; - frame.f_sr &= ~PSL_C; /* carry bit */ - break; - case ERESTART: - /* - * We always enter through a `trap' instruction, which is 2 - * bytes, so adjust the pc by that amount. - */ - frame.f_pc = opc - 2; - break; - case EJUSTRETURN: - /* nothing to do */ - break; - default: - bad: - if (p->p_emul->e_errno) - error = p->p_emul->e_errno[error]; - frame.f_regs[D0] = error; - frame.f_sr |= PSL_C; /* carry bit */ - break; + case 0: + frame.f_regs[D0] = rval[0]; + frame.f_regs[D1] = rval[1]; + frame.f_sr &= ~PSL_C; /* carry bit */ + break; + case ERESTART: + /* + * We always enter through a `trap' instruction, which is 2 + * bytes, so adjust the pc by that amount. + */ + frame.f_pc = opc - 2; + break; + case EJUSTRETURN: + /* nothing to do */ + break; + default: + bad: + if (p->p_emul->e_errno) + error = p->p_emul->e_errno[error]; + frame.f_regs[D0] = error; + frame.f_sr |= PSL_C; /* carry bit */ + break; } #ifdef SYSCALL_DEBUG @@ -1108,8 +1112,8 @@ syscall(code, frame) void child_return(p, frame) - struct proc *p; - struct frame frame; +struct proc *p; +struct frame frame; { frame.f_regs[D0] = 0; @@ -1128,8 +1132,8 @@ child_return(p, frame) */ u_long allocate_sir(proc, arg) - void (*proc)(); - void *arg; +void (*proc)(); +void *arg; { int bit; @@ -1160,9 +1164,9 @@ struct intrhand *intrs[256]; #ifndef INTR_ASM int hardintr(pc, evec, frame) - int pc; - int evec; - void *frame; +int pc; +int evec; +void *frame; { int vec = (evec & 0xfff) >> 2; /* XXX should be m68k macro? */ extern u_long intrcnt[]; /* XXX from locore */ @@ -1195,7 +1199,7 @@ hardintr(pc, evec, frame) */ int intr_findvec(start, end) - int start, end; +int start, end; { extern u_long *vectab[], hardtrap, badtrap; int vec; @@ -1216,8 +1220,8 @@ intr_findvec(start, end) */ int intr_establish(vec, ih) - int vec; - struct intrhand *ih; +int vec; +struct intrhand *ih; { extern u_long *vectab[], hardtrap, badtrap; struct intrhand *ihx; @@ -1252,8 +1256,8 @@ db_prom_cmd() } struct db_command db_machine_cmds[] = { - { "prom", db_prom_cmd, 0, 0 }, - { (char *)0, } + { "prom", db_prom_cmd, 0, 0}, + { (char *)0,} }; void diff --git a/sys/arch/mvme68k/stand/libsa/Makefile b/sys/arch/mvme68k/stand/libsa/Makefile index 270b4e308ab..a644acc01bb 100644 --- a/sys/arch/mvme68k/stand/libsa/Makefile +++ b/sys/arch/mvme68k/stand/libsa/Makefile @@ -1,4 +1,4 @@ -# $OpenBSD: Makefile,v 1.13 1997/04/22 16:07:57 gvf Exp $ +# $OpenBSD: Makefile,v 1.14 2000/01/06 03:21:43 smurph Exp $ LIB=sa @@ -35,7 +35,7 @@ SRCS= ${SRC_net} ${SRC_sa} ${SRC_mvme} ${SRC_here} ${SRC_kern} #DEFS= -DCOMPAT_UFS DEFS= -D__INTERNAL_LIBSA_CREAD INCL= -I${.CURDIR} -I${.CURDIR}/../libbug -I${S}/lib/libsa -I${S} -COPTS= #-fno-defer-pop +COPTS= #-fno-defer-pop -m68060 CFLAGS+= ${XCFLAGS} -O2 ${COPTS} ${DEFS} ${DBG} ${INCL} .PATH: ${DIR_SA} ${DIR_KERN} diff --git a/sys/arch/mvme68k/stand/netboot/Makefile b/sys/arch/mvme68k/stand/netboot/Makefile index 6a7406ed935..d292652ab51 100644 --- a/sys/arch/mvme68k/stand/netboot/Makefile +++ b/sys/arch/mvme68k/stand/netboot/Makefile @@ -1,4 +1,4 @@ -# $OpenBSD: Makefile,v 1.8 1997/10/20 00:33:48 deraadt Exp $ +# $OpenBSD: Makefile,v 1.9 2000/01/06 03:21:43 smurph Exp $ RELOC=0x3F0000 SIZE?= size @@ -7,7 +7,7 @@ S= ${.CURDIR}/../../../.. DEFS= -DSUN_BOOTPARAMS INCPATH=-I${.CURDIR} -I${.CURDIR}/../libsa -I${.CURDIR}/../libbug \ -I${S} -I${S}/lib/libsa -CFLAGS= -O2 ${DEFS} ${INCPATH} ${COPTS} +CFLAGS= -O2 ${DEFS} ${INCPATH} ${COPTS} -m68060 CLEANFILES+=netboot netboot.bin .include "${S}/arch/mvme68k/stand/bugcrt/Makefile.inc" diff --git a/sys/arch/mvme68k/stand/netboot/boot.c b/sys/arch/mvme68k/stand/netboot/boot.c index 1797c1fb153..1cefa334041 100644 --- a/sys/arch/mvme68k/stand/netboot/boot.c +++ b/sys/arch/mvme68k/stand/netboot/boot.c @@ -1,4 +1,4 @@ -/* $OpenBSD: boot.c,v 1.6 1997/04/22 16:01:21 gvf Exp $ */ +/* $OpenBSD: boot.c,v 1.7 2000/01/06 03:21:44 smurph Exp $ */ /*- * Copyright (c) 1995 Theo de Raadt @@ -76,8 +76,8 @@ */ #define LOADADDR 0x10000 -extern char *version; -char line[80]; +extern char *version; +char line[80]; main() { @@ -99,7 +99,7 @@ main() if (line[0]) { bugargs.arg_start = line; cp = line; - while (cp < (line + sizeof(line) - 1) && *cp) + while (cp < (line + sizeof(line) - 1) && *cp) cp++; bugargs.arg_end = cp; ret =parse_args(&file, &howto); diff --git a/sys/arch/mvme68k/stand/netboot/if_ie.c b/sys/arch/mvme68k/stand/netboot/if_ie.c index feb174df23d..5bf1447d5e7 100644 --- a/sys/arch/mvme68k/stand/netboot/if_ie.c +++ b/sys/arch/mvme68k/stand/netboot/if_ie.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_ie.c,v 1.6 1999/01/11 05:11:41 millert Exp $ */ +/* $OpenBSD: if_ie.c,v 1.7 2000/01/06 03:21:44 smurph Exp $ */ /* * Copyright (c) 1995 Theo de Raadt @@ -445,7 +445,7 @@ ie_init(desc, machdep_hint) bzero(&ie_softc, sizeof(ie_softc)); ie_softc.sc_reg = (struct iereg *) ie_config[desc->io_netif->nif_unit].phys_addr; - ie_softc.sc_mem = (struct iemem *) 0x1e0000; + ie_softc.sc_mem = (struct iemem *) 0x2e0000; ie_reset(desc->io_netif, desc->myea); printf("device: %s%d attached to %s\n", nif->nif_driver->netif_bname, nif->nif_unit, ether_sprintf(desc->myea)); |