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authorTom Cosgrove <tom@cvs.openbsd.org>2006-10-16 15:51:27 +0000
committerTom Cosgrove <tom@cvs.openbsd.org>2006-10-16 15:51:27 +0000
commit350d6caeb950ec163b01c4130d740fa1c8a08e0f (patch)
treec461219d5921bb37c72b9efb8f5a8d53f3326b71 /sys/arch
parent4809c8fe09c0a966b59af026f6c234ac59cc5166 (diff)
Fix some more "is is"s. ok otto@.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/amd64/include/pte.h4
-rw-r--r--sys/arch/i386/i386/mptramp.s4
2 files changed, 4 insertions, 4 deletions
diff --git a/sys/arch/amd64/include/pte.h b/sys/arch/amd64/include/pte.h
index bc262c0d93e..c14138a7e45 100644
--- a/sys/arch/amd64/include/pte.h
+++ b/sys/arch/amd64/include/pte.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pte.h,v 1.4 2004/02/23 08:32:36 mickey Exp $ */
+/* $OpenBSD: pte.h,v 1.5 2006/10/16 15:51:26 tom Exp $ */
/* $NetBSD: pte.h,v 1.1 2003/04/26 18:39:47 fvdl Exp $ */
/*
@@ -43,7 +43,7 @@
* amd64 MMU hardware structure:
*
* the (first generation) amd64 MMU is a 4-level MMU which maps 2^48 bytes
- * of virtual memory. The pagesize we use is is 4K (4096 [0x1000] bytes),
+ * of virtual memory. The pagesize we use is 4K (4096 [0x1000] bytes),
* although 2M and 4M can be used as well. The indexes in the levels
* are 9 bits wide (512 64bit entries per level), dividing the bits
* 9-9-9-9-12.
diff --git a/sys/arch/i386/i386/mptramp.s b/sys/arch/i386/i386/mptramp.s
index 38e83191ff2..7ec527bd359 100644
--- a/sys/arch/i386/i386/mptramp.s
+++ b/sys/arch/i386/i386/mptramp.s
@@ -1,4 +1,4 @@
-/* $OpenBSD: mptramp.s,v 1.6 2006/04/27 15:37:51 mickey Exp $ */
+/* $OpenBSD: mptramp.s,v 1.7 2006/10/16 15:51:26 tom Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -226,7 +226,7 @@ _TRMP_LABEL(gdt_table)
GDTE(0x93,0xcf) # Kernel data
_TRMP_LABEL(gdt_desc)
.word 0x17 # limit 3 entries
- .long gdt_table # where is is gdt
+ .long gdt_table # where is gdt
_C_LABEL(cpu_spinup_trampoline_end): #end of code copied to MP_TRAMPOLINE
mp_cont: