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authorgene <gene@cvs.openbsd.org>1998-05-03 07:15:16 +0000
committergene <gene@cvs.openbsd.org>1998-05-03 07:15:16 +0000
commit35b4aab675876b9f2342a913a6b0a90d4e8ed8d4 (patch)
tree9d386598d81ad3dcd5342c149efb94cea025e993 /sys/arch
parent2e3f8791cecd6cbc2880a0bc48ad74fa481095c5 (diff)
Fallout from new cpu.h work.
Also, in the cpu.h merge, we grabbed a few new machine classes. Add MRG mappings for several of them.
Diffstat (limited to 'sys/arch')
-rw-r--r--sys/arch/mac68k/mac68k/machdep.c163
1 files changed, 135 insertions, 28 deletions
diff --git a/sys/arch/mac68k/mac68k/machdep.c b/sys/arch/mac68k/mac68k/machdep.c
index 02036a3fccb..1eaa1295815 100644
--- a/sys/arch/mac68k/mac68k/machdep.c
+++ b/sys/arch/mac68k/mac68k/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.51 1998/04/27 02:01:46 gene Exp $ */
+/* $OpenBSD: machdep.c,v 1.52 1998/05/03 07:15:15 gene Exp $ */
/* $NetBSD: machdep.c,v 1.134 1997/02/14 06:15:30 scottr Exp $ */
/*
@@ -118,7 +118,6 @@
#include <machine/autoconf.h>
#include <machine/cpu.h>
-#include <machine/macinfo.h>
#include <machine/reg.h>
#include <machine/psl.h>
#include <machine/pte.h>
@@ -145,7 +144,7 @@ char machine[] = "mac68k"; /* cpu "architecture" */
struct mac68k_machine_S mac68k_machine;
-volatile u_char *Via1Base, *Via2Base;
+volatile u_char *Via1Base, *Via2Base, *PSCBase = NULL;
u_long NuBusBase = NBBASE;
u_long IOBase;
@@ -207,6 +206,20 @@ int physmem = MAXMEM; /* max supported memory, changes to actual */
int safepri = PSL_LOWIPL;
/*
+ * Some of the below are not used yet, but might be used someday on the
+ * Q700/900/950 where the interrupt controller may be reprogrammed to
+ * interrupt on different levels as listed in locore.s
+ */
+unsigned short mac68k_ttyipl = PSL_S | PSL_IPL1;
+unsigned short mac68k_bioipl = PSL_S | PSL_IPL2;
+unsigned short mac68k_netipl = PSL_S | PSL_IPL2;
+unsigned short mac68k_impipl = PSL_S | PSL_IPL2;
+unsigned short mac68k_clockipl = PSL_S | PSL_IPL2;
+unsigned short mac68k_statclockipl = PSL_S | PSL_IPL2;
+unsigned short mac68k_schedipl = PSL_S | PSL_IPL3;
+
+
+/*
* Extent maps to manage all memory space, including I/O ranges. Allocate
* storage for 8 regions in each, initially. Later, iomem_malloc_safe
* will indicate that it's safe to use malloc() to dynamically allocate
@@ -219,6 +232,10 @@ static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
struct extent *iomem_ex;
int iomem_malloc_safe;
+/* XXX should be in locore.s for consistency */
+int astpending=0;
+int want_resched=0;
+
static void identifycpu __P((void));
static u_long get_physical __P((u_int, u_long *));
void dumpsys __P((void));
@@ -1935,6 +1952,35 @@ static romvec_t romvecs[] =
(caddr_t) 0x4081c406, /* FixDiv */
(caddr_t) 0x4081c312, /* FixMul */
},
+ /*
+ * Vectors verified for the Mac IIfx
+ */
+ { /* 18 */
+ "Mac IIfx ROMs",
+ (caddr_t) 0x40809f4a, /* ADB interrupt */
+ (caddr_t) 0x0, /* PM ADB interrupt */
+ (caddr_t) 0x4080a4d8, /* ADBBase + 130 interupt */
+ (caddr_t) 0x4080a360, /* CountADBs */
+ (caddr_t) 0x4080a37a, /* GetIndADB */
+ (caddr_t) 0x4080a3a6, /* GetADBInfo */
+ (caddr_t) 0x4080a3ac, /* SetADBInfo */
+ (caddr_t) 0x4080a752, /* ADBReInit */
+ (caddr_t) 0x4080a3dc, /* ADBOp */
+ (caddr_t) 0x0, /* PMgrOp */
+ (caddr_t) 0x4080c05c, /* WriteParam */
+ (caddr_t) 0x4080c086, /* SetDateTime */
+ (caddr_t) 0x4080c5cc, /* InitUtil */
+ (caddr_t) 0x4080b186, /* ReadXPRam */
+ (caddr_t) 0x4080b190, /* WriteXPRam */
+ (caddr_t) 0x4080b1e4, /* jClkNoMem */
+ (caddr_t) 0x4080a818, /* ADBAlternateInit */
+ (caddr_t) 0x0, /* Egret */
+ (caddr_t) 0x0, /* InitEgret */
+ (caddr_t) 0x408037c0, /* ADBReInit_JTBL */
+ (caddr_t) 0x4087eb90, /* ROMResourceMap List Head */
+ (caddr_t) 0x4081c406, /* FixDiv */
+ (caddr_t) 0x4081c312, /* FixMul */
+ },
/* Please fill these in! -BG */
};
@@ -1952,7 +1998,7 @@ struct cpu_model_info cpu_models[] = {
{MACH_MACIISI, "IIsi ", "", MACH_CLASSIIsi, &romvecs[2]},
{MACH_MACIIVI, "IIvi ", "", MACH_CLASSIIvx, &romvecs[2]},
{MACH_MACIIVX, "IIvx ", "", MACH_CLASSIIvx, &romvecs[2]},
- {MACH_MACIIFX, "IIfx ", "", MACH_CLASSIIfx, NULL},
+ {MACH_MACIIFX, "IIfx ", "", MACH_CLASSIIfx, &romvecs[18]},
/* The Centris/Quadra series. */
{MACH_MACQ700, "Quadra", " 700 ", MACH_CLASSQ, &romvecs[4]},
@@ -1962,9 +2008,10 @@ struct cpu_model_info cpu_models[] = {
{MACH_MACQ650, "Quadra", " 650 ", MACH_CLASSQ, &romvecs[6]},
{MACH_MACC650, "Centris", " 650 ", MACH_CLASSQ, &romvecs[6]},
{MACH_MACQ605, "Quadra", " 605 ", MACH_CLASSQ, &romvecs[9]},
+ {MACH_MACQ605_33, "Quadra", " 605/33 ", MACH_CLASSQ, &romvecs[9]},
{MACH_MACC610, "Centris", " 610 ", MACH_CLASSQ, &romvecs[6]},
{MACH_MACQ610, "Quadra", " 610 ", MACH_CLASSQ, &romvecs[6]},
- {MACH_MACQ630, "Quadra", " 630 ", MACH_CLASSQ, &romvecs[13]},
+ {MACH_MACQ630, "Quadra", " 630 ", MACH_CLASSQ2, &romvecs[13]},
{MACH_MACC660AV, "Centris", " 660AV ", MACH_CLASSAV, &romvecs[7]},
{MACH_MACQ840AV, "Quadra", " 840AV ", MACH_CLASSAV, &romvecs[7]},
@@ -2000,6 +2047,7 @@ struct cpu_model_info cpu_models[] = {
{MACH_MACLCII, "LC", " II ", MACH_CLASSLC, &romvecs[3]},
{MACH_MACLCIII, "LC", " III ", MACH_CLASSLC, &romvecs[14]},
{MACH_MACLC475, "LC", " 475 ", MACH_CLASSQ, &romvecs[9]},
+ {MACH_MACLC475_33, "LC", " 475/33 ", MACH_CLASSQ, &romvecs[9]},
{MACH_MACLC520, "LC", " 520 ", MACH_CLASSLC, &romvecs[15]},
{MACH_MACLC575, "LC", " 575 ", MACH_CLASSQ2, &romvecs[16]},
{MACH_MACCCLASSIC, "Color Classic ", "", MACH_CLASSLC, &romvecs[3]},
@@ -2017,16 +2065,38 @@ struct {
caddr_t fbbase;
u_long fblen;
} intvid_info[] = {
- {MACH_MACPB140, (caddr_t) 0xfee00000, 32 * 1024},
- {MACH_MACPB145, (caddr_t) 0xfee00000, 32 * 1024},
- {MACH_MACPB170, (caddr_t) 0xfee00000, 32 * 1024},
- {MACH_MACPB160, (caddr_t) 0x60000000, 128 * 1024},
- {MACH_MACPB165, (caddr_t) 0x60000000, 128 * 1024},
- {MACH_MACPB180, (caddr_t) 0x60000000, 128 * 1024},
- {MACH_MACPB165C, (caddr_t) 0xfc040000, 512 * 1024},
- {MACH_MACPB180C, (caddr_t) 0xfc040000, 512 * 1024},
- {MACH_MACPB500, (caddr_t) 0x60000000, 512 * 1024},
- {0, (caddr_t) 0x0, 0},
+ { MACH_MACCLASSICII, (caddr_t)0xfee09a80, 21888 },
+ { MACH_MACPB140, (caddr_t)0xfee00000, 32 * 1024 },
+ { MACH_MACPB145, (caddr_t)0xfee00000, 32 * 1024 },
+ { MACH_MACPB170, (caddr_t)0xfee00000, 32 * 1024 },
+ { MACH_MACPB150, (caddr_t)0x60000000, 128 * 1024 },
+ { MACH_MACPB160, (caddr_t)0x60000000, 128 * 1024 },
+ { MACH_MACPB165, (caddr_t)0x60000000, 128 * 1024 },
+ { MACH_MACPB180, (caddr_t)0x60000000, 128 * 1024 },
+ { MACH_MACCCLASSIC, (caddr_t)0x50f40000, 512 * 1024 },
+ { MACH_MACPB165C, (caddr_t)0xfc040000, 512 * 1024 },
+ { MACH_MACPB180C, (caddr_t)0xfc040000, 512 * 1024 },
+ { MACH_MACPB500, (caddr_t)0x60000000, 512 * 1024 },
+ { MACH_MACLC520, (caddr_t)0x60000000, 1024 * 1024 },
+#ifdef MADHATTER
+ { MACH_MACLC475, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACLC475_33, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACLC575, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACC610, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACC650, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACQ605, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACQ605_33, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACQ610, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACQ630, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACQ650, (caddr_t)0xf9000000, 1024 * 1024 },
+#endif
+ { MACH_MACQ700, (caddr_t)0xf9000000, 1024 * 1024 },
+#ifdef MADHATTER
+ { MACH_MACQ800, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACQ900, (caddr_t)0xf9000000, 1024 * 1024 },
+ { MACH_MACQ950, (caddr_t)0xf9000000, 1024 * 1024 },
+#endif
+ { 0, (caddr_t)0x0, 0 },
}; /* End of intvid_info[] initialization. */
/*
@@ -2055,7 +2125,8 @@ mach_cputype()
static void
identifycpu()
{
- char *mpu;
+ extern u_int delay_factor;
+ char *mpu;
switch (cputype) {
case CPU_68020:
@@ -2076,6 +2147,7 @@ identifycpu()
cpu_models[mac68k_machine.cpu_model_index].model_minor,
mpu);
printf("%s\n", cpu_model);
+ printf("cpu: delay factor %d\n", delay_factor);
}
static void get_machine_info __P((void));
@@ -2137,6 +2209,7 @@ setmachdep()
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
via_reg(VIA2, vIER) = 0x7f; /* disable VIA2 int */
@@ -2147,8 +2220,10 @@ setmachdep()
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
- via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
+ /* Disable everything but PM; we need it. */
+ via_reg(VIA1, vIER) = 0x6f; /* disable VIA1 int */
/* Are we disabling something important? */
via_reg(VIA2, vIER) = 0x7f; /* disable VIA2 int */
if (cputype == CPU_68040)
@@ -2164,22 +2239,22 @@ setmachdep()
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
- via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
+ /* Disable everything but PM; we need it. */
+ via_reg(VIA1, vIER) = 0x6f; /* disable VIA1 int */
/* Are we disabling something important? */
via_reg(VIA2, rIER) = 0x7f; /* disable VIA2 int */
break;
case MACH_CLASSQ:
case MACH_CLASSQ2:
- mac68k_vidlog = mac68k_vidphys = 0xf9000000;
- /* Not really, but using too little memory would be wrong */
- mac68k_vidlen = 2 * 1024 * 1024;
mac68k_machine.sonic = 1;
case MACH_CLASSAV:
VIA2 = 1;
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi96 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
via_reg(VIA2, vIER) = 0x7f; /* disable VIA2 int */
@@ -2189,6 +2264,7 @@ setmachdep()
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
via_reg(VIA2, rIER) = 0x7f; /* disable RBV int */
@@ -2198,6 +2274,7 @@ setmachdep()
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
via_reg(VIA2, rIER) = 0x7f; /* disable RBV int */
@@ -2207,6 +2284,7 @@ setmachdep()
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
via_reg(VIA2, rIER) = 0x7f; /* disable RBV int */
@@ -2216,13 +2294,22 @@ setmachdep()
IOBase = 0x50f00000;
Via1Base = (volatile u_char *) IOBase;
mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
mac68k_machine.sccClkConst = 115200;
via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
via_reg(VIA2, rIER) = 0x7f; /* disable RBV int */
break;
+ case MACH_CLASSIIfx:
+ VIA2 = 0xd;
+ IOBase = 0x50f00000;
+ Via1Base = (volatile u_char *) IOBase;
+ mac68k_machine.scsi80 = 1;
+ mac68k_machine.zs_chip = 0;
+ mac68k_machine.sccClkConst = 115200; /* XXX unverified */
+ via_reg(VIA1, vIER) = 0x7f; /* disable VIA1 int */
+ break;
default:
case MACH_CLASSH:
- case MACH_CLASSIIfx:
break;
}
@@ -2281,6 +2368,7 @@ mac68k_set_io_offsets(base)
switch (current_mac_model->machineid) {
case MACH_MACQ900:
case MACH_MACQ950:
+ mac68k_machine.scsi96_2 = 1;
case MACH_MACQ700:
SCSIBase = base + 0xf000;
break;
@@ -2303,9 +2391,15 @@ mac68k_set_io_offsets(base)
Via1Base = (volatile u_char *) base;
sccA = (volatile u_char *) base + 0x4000;
SCSIBase = base + 0x18000;
+ PSCBase = (volatile u_char *) base + 0x31000;
+ mac68k_bioipl = PSL_S | PSL_IPL4;
+ mac68k_netipl = PSL_S | PSL_IPL4;
+ mac68k_impipl = PSL_S | PSL_IPL4;
+ mac68k_statclockipl = PSL_S | PSL_IPL4;
break;
case MACH_CLASSII:
case MACH_CLASSPB:
+ case MACH_CLASSDUO:
case MACH_CLASSIIci:
case MACH_CLASSIIsi:
case MACH_CLASSIIvx:
@@ -2314,10 +2408,20 @@ mac68k_set_io_offsets(base)
sccA = (volatile u_char *) base + 0x4000;
SCSIBase = base;
break;
+ case MACH_CLASSIIfx:
+ /*
+ * Note that sccA base address is based on having
+ * the serial port in `compatible' mode (set in
+ * the Serial Switch control panel before booting).
+ */
+ Via1Base = (volatile u_char *) base;
+ sccA = (volatile u_char *) base + 0x4020;
+ SCSIBase = base;
+ break;
default:
case MACH_CLASSH:
- case MACH_CLASSIIfx:
- panic("Mac IIfx machine class:unsupported machine class.");
+ panic("Unknown/unsupported machine class (%d).",
+ current_mac_model->class);
break;
}
Via2Base = Via1Base + 0x2000 * VIA2;
@@ -2529,7 +2633,9 @@ get_mapping(void)
}
len = nbnumranges == 0 ? 0 : nblen[nbnumranges - 1];
- /* printf ("0x%x --> 0x%x\n", addr, phys); */
+#if 0
+ printf ("0x%lx --> 0x%lx\n", addr, phys);
+#endif
if (nbnumranges > 0
&& addr == nblog[nbnumranges - 1] + len
&& phys == nbphys[nbnumranges - 1]) { /* Same as last one */
@@ -2562,7 +2668,7 @@ get_mapping(void)
nblen[nbnumranges - 1] = -nblen[nbnumranges - 1];
same = 0;
}
-#if 1
+#if 0
printf("Non-system RAM (nubus, etc.):\n");
for (i = 0; i < nbnumranges; i++) {
printf(" Log = 0x%lx, Phys = 0x%lx, Len = 0x%lx (%lu)\n",
@@ -2589,6 +2695,7 @@ get_mapping(void)
}
if (i == nbnumranges) {
if (0x60000000 <= videoaddr && videoaddr < 0x70000000) {
+ printf("Checking for Internal Video ");
/*
* Kludge for IIvx internal video (60b0 0000).
* PB 520 (6000 0000)
@@ -2605,8 +2712,8 @@ get_mapping(void)
/*
* Kludge for AV internal video
*/
- check_video("AV video (0x50100100)", 2 * 1024 * 1024,
- 2 * 1024 * 1024);
+ check_video("AV video (0x50100100)", 1 * 1024 * 1024,
+ 1 * 1024 * 1024);
} else {
printf( " no internal video at address 0 -- "
"videoaddr is 0x%lx.\n", videoaddr);